Change the default value for the "enable_verifier" setting so the
verifier runs unless it is explicitly disabled.
Most projects using Cretonne are best off running the verifier always
until they start caring about compile time performance. Then they can
easily disable the verifier.
The reserved register heaps are not implemented in the Cretonne
legalizer, so IR generated by the dummy environment would trip
assertions when compiled.
Use a heap with a vmctx base address instead, and also demonstrate how
vmctx arguments are added to all signatures to achieve this.
* Use imm64 rather than offset32
* Add predicate to enforce signed 32-bit limit to imm
* Remove AdjustSpImm format
* Add encoding tests for adjust_sp_imm
* Adjust use of adjust_sp_imm in Intel prologue_epilogue to match
This test was failing because the hash computes values greater than
0x7fffffff, which 32-bit python2 promotes to long, which `hex` formats
with a trailing 'L'. The code that uses it appears to be ok with a
long value, so it's just the test that needs to handle it.
Fix as suggested here:
https://stackoverflow.com/questions/5917203/python-trailing-l-problem
* wasm testsuite: ignore hidden files in test dir
and report a rejected file. it was picking up vim .swp files
* wasmtests: correct wat syntax in icall.wat
Like before, we store a redundant EBB with each predecessor instruction
which allows invalidate_ebb_successors() to clean up the successor's
predecessor lists even after instructions have been moved around in the
layout.
Define two public iterator types in the flowgraph module, PredIter and
SuccIter, which are by-value iterators over an EBB's predecessors and
successors respectively.
Provide matching pred_iter() and succ_iter() methods for inspecting the
CFG. Remove the get_predecessors() method which returned a slice.
Update the uses of get_predecessors(), none of which depended on it
being a slice.
This abstraction makes it possible to change the internal representation
of the CFG.
* Treat VMContext as standard positional argument when using Native CallConv.
This requires threading the CallConv through legalize_args and into ArgAssigner.
* Stash CallConv in the intel-specific Args struct, for use ArgAssigner.
