Commit Graph

8716 Commits

Author SHA1 Message Date
Andrew Brown
43b9337162 Fix typo
Also, the IDE auto-formatted the length of several other comments.
2021-07-07 12:07:04 -07:00
Nick Fitzgerald
be60fec6ba Fix error messages reporting number of expected vs actual params
We previously had some off-by-one errors in our error messages and this led to
very confusing messages like "expected 0 types, found 0" that were quite
annoying to debug as an API consumer.
2021-07-07 11:32:40 -07:00
Chris Fallin
c71ad9490e Merge pull request #3056 from afonso360/aarch64-fix-overflow-imm
aarch64: Fix incorrect encoding of large const values in icmp.
2021-07-03 16:05:49 -07:00
Afonso Bordado
eebae8d4c8 aarch64: Fix incorrect encoding of large const values in icmp.
When encoding constants as immediates into an RSE Imm12 instruction we need to take special care to check if the value that we are trying to input does not overflow its type when viewed as a signed value. (i.e. iconst.i8 200)

We cannot both put an immediate and sign extend it, so we need to lower it into a separate reg, and emit the sign extend into the instruction.

For more details see the [cg_clif bug report](https://github.com/bjorn3/rustc_codegen_cranelift/issues/1184#issuecomment-873214796).
2021-07-03 22:42:15 +01:00
Chris Fallin
ed20e4070f Merge pull request #3057 from bjorn3/display_setting_value
Implement Display for settings::Value
2021-07-03 12:03:05 -07:00
bjorn3
37115c10e0 Implement Display for settings::Value 2021-07-03 14:34:42 +02:00
Benjamin Bouvier
93b7cdd6a2 Fix a few typos in the architecture doc (#3054) 2021-07-02 13:09:58 -05:00
Chris Fallin
518ce2512d Merge pull request #3055 from bnjbvr/ben-dce
Remove some dead code in Cranelift
2021-07-02 10:07:05 -07:00
Benjamin Bouvier
4c595f4f9d Remove unused store_stackslot/load_stackslot trait methods. 2021-07-02 18:09:33 +02:00
Benjamin Bouvier
91c65d739f Remove unused code in machinst 2021-07-02 18:09:33 +02:00
Alex Crichton
aa5d837428 Start a high-level architecture document for Wasmtime (#3019)
* Start a high-level architecture document for Wasmtime

This commit cleands up some existing documentation by removing a number
of "noop README files" and starting a high-level overview of the
architecture of Wasmtime. I've placed this documentation under the
contributing section of the book since it seems most useful for possible
contributors.

I've surely left some things out in this pass, and am happy to add more!

* Review comments

* More rewording

* typos
2021-07-02 09:02:26 -05:00
Afonso Bordado
ce537cf431 cranelift: Add fuel mechanism to the interpreter 2021-07-02 06:26:16 -07:00
Chris Fallin
f2d2f3a841 Merge pull request #3044 from akirilov-arm/simd_i32x4_trunc_sat_f64x2
Enable the simd_i32x4_trunc_sat_f64x2 test for AArch64
2021-07-01 09:28:39 -07:00
Alex Crichton
b9985fe2e5 Change the injection count of fuel in a store from u32 to u64 (#3048)
* Change the injection count of fuel in a store from u32 to u64

This commit updates the type of the amount of times to inject fuel in
the `out_of_fuel_async_yield` to `u64` instead of `u32`. This should
allow effectively infinite fuel to get injected, even if a small amount
of fuel is injected per iteration.

Closes #2927
Closes #3046

* Fix tokio example
2021-07-01 10:46:21 -05:00
Afonso Bordado
7453bd5f0d Cranelift CLIF-level differential fuzzer (#3038)
* cranelift: Initial fuzzer implementation

* cranelift: Generate multiple test cases in fuzzer

* cranelift: Separate function generator in fuzzer

* cranelift: Insert random instructions in fuzzer

* cranelift: Rename gen_testcase

* cranelift: Implement div for unsigned values in interpreter

* cranelift: Run all test cases in fuzzer

* cranelift: Comment options in function_runner

* cranelift: Improve fuzzgen README.md

* cranelift: Fuzzgen remove unused variable

* cranelift: Fuzzer code style fixes

Thanks! @bjorn3

* cranelift: Fix nits in CLIF fuzzer

Thanks @cfallin!

* cranelift: Implement Arbitrary for TestCase

* cranelift: Remove gen_testcase

* cranelift: Move fuzzers to wasmtime fuzz directory

* cranelift: CLIF-Fuzzer ignore tests that produce traps

* cranelift: CLIF-Fuzzer create new fuzz target to validate generated testcases

* cranelift: Store clif-fuzzer config in a separate struct

* cranelift: Generate variables upfront per function

* cranelift: Prevent publishing of fuzzgen crate
2021-07-01 06:32:01 -07:00
Benjamin Bouvier
a603fc5bd5 Add a way to display only the trap's reason (without the backtrace) (#3033) 2021-06-30 09:34:47 -05:00
Tshepang Lekhonkhobe
a3e08ee535 this option is default since early 2018 (#3042)
WASI was only added in Rust about a year from then
2021-06-30 09:34:34 -05:00
Afonso Bordado
a4770a7e28 cranelift: Prevent overflow errors in interpreter for add,sub,mul 2021-06-30 06:32:16 -07:00
Anton Kirilov
330f02aa09 Enable the simd_i32x4_trunc_sat_f64x2 test for AArch64
Also, reorganize the AArch64-specific VCode instructions for unary
narrowing and widening vector operations, so that they are more
straightforward to use.

Copyright (c) 2021, Arm Limited.
2021-06-30 12:17:53 +01:00
Alex Crichton
c5609bc364 Update documentation of enter/exit hooks (#3041)
Clarify that they're executed not only around imports but also around
function calls. Additionally spell out the semantics around traps a bit
more clearly too.
2021-06-29 12:57:39 -05:00
Johnnie Birch
1acb40b2aa Fix return type of for truc_sat and convert instructions
Type_of says is to determine the return value for a webassembly
operator. Truc_sat and convert simd instructions appear to be misplaced.
2021-06-28 15:20:39 -07:00
Chris Fallin
522cc8aa84 Merge pull request #3035 from akirilov-arm/simd_i16x8_q15mulr_sat_s
Enable the simd_i16x8_q15mulr_sat_s test on AArch64
2021-06-28 09:49:52 -07:00
Anton Kirilov
98f1ac789e Enable the simd_i16x8_q15mulr_sat_s test on AArch64
Copyright (c) 2021, Arm Limited.
2021-06-28 12:24:31 +01:00
Chris Fallin
d42c8692bc x64 backend: be explicit about unimplemented opcodes.
As discussed in #3035, most backends have explicit
`unimplemented!(...)` match-arms for opcode lowering cases that are not
yet implemented; this allows the backend maintainer to easily see what
is not yet implemented, and avoiding a catch-all wildcard arm is less
error-prone as opcodes are added in the future.

However, the x64 backend was the exception: as @akirilov-arm pointed
out, it had a wildcard match arm. This fixes the issue by explicitly
listing all opcodes the x64 backend does not yet implement.

As per our tests, these opcodes are not used or need by Wasm lowering;
but, it is good to know that they exist, so that we can eventually
either support or remove them.

This was a good exercise for me as I wasn't aware of a few of these in
particular: e.g., aarch64 supports `bmask` while x64 does not, and there
isn't a good reason why x64 shouldn't, especially if others hope to use
Cranelift as a SIMD-capable general codegen in the future.

The `unimplemented!()` cases are separate from `panic!()` ones: my
convention here was to split out those that are logically just *missing*
from those that should be *impossible*, mostly due to expected removal
by legalization before we reach the lowering step.
2021-06-26 15:29:14 -07:00
Chris Fallin
bc6f75107d Merge pull request #3032 from afonso360/aarch64-rmw
aarch64: Implement missing atomic rmw ops
2021-06-25 09:59:40 -07:00
Alex Crichton
7e31a0bbce Update documentation in Config about Send futures
Futures are indeed `Send` now!
2021-06-25 07:38:47 -07:00
Afonso Bordado
e85eb77c45 aarch64: Implement missing atomic rmw ops 2021-06-25 07:51:46 +01:00
Alex Crichton
1047c4e156 Fix fuzzers requesting 4gb memories (#3029)
Wasmtime was updated to reject creation of memories exactly 4gb in size
in #3013, but the fuzzers still had the assumption that any request to
create a host object for a particular wasm type would succeed.
Unfortunately now, though, a request to create a 4gb memory fails. This
is an expected failure, though, so the fix here was to catch the error
and allow it.
2021-06-24 14:53:18 -05:00
katelyn martin
ab536126dd update WASI submodule (#3025)
* wasi-common: update wasi submodule

This updates the WASI submodule, pulling in changes to the witx crate,
now that there is a 0.9.1 version including some bug fixes. See
WebAssembly/WASI#434 for more information.

* wiggle: update witx dependencies

* publish: verify and vendor witx-cli

* adjust root workspace members

This commit removes some items from the root manifest's workspace
members array, and adds `witx-cli` to the root `workspace.exclude`
array.

The motivation for this stems from a cargo bug described in
rust-lang/cargo#6745: `workspace.exclude` does not work if it is nested
under a `workspace.members` path.

See WebAssembly/WASI#438 for the underlying change to the WASI submodule
which reorganized the `witx-cli` crate, and WebAssembly/WASI#398 for the
original PR introducing `witx-cli`.

See [this
comment](https://github.com/bytecodealliance/wasmtime/pull/3025#issuecomment-867741175)
for more details about the compilation errors, and failed alternative
approaches that necessitated this change.

N.B. This is not a functional change, these crates are still implicitly
workspace members as transitive dependencies, but this will allow us to
side-step the aforementioned cargo bug.

Co-Authored-By: Alex Crichton <alex@alexcrichton.com>

Co-authored-by: Alex Crichton <alex@alexcrichton.com>
2021-06-24 14:21:48 -05:00
Chris Fallin
652f21e3e0 Merge pull request #3026 from afonso360/aarch64-elf-tls
aarch64: Implement TLS ELF GD Relocations
2021-06-24 11:54:34 -07:00
Chris Fallin
7d47ba12c5 Merge pull request #3028 from cfallin/x86-legacy
cranelift-codegen: move old x86 and RISC-V backends to isa/legacy/.
2021-06-24 11:38:08 -07:00
Chris Fallin
0c0a94155e Merge pull request #3027 from afonso360/aarch64-i128-select
aarch64: Implement lowering i128 select
2021-06-24 11:25:18 -07:00
Chris Fallin
4b2723abb0 cranelift-codegen: move old x86 and RISC-V backends to isa/legacy/.
These backends will be removed in the future (see
bytecodealliance/rfcs#12 and the pending #3009 in this repo).

In the meantime, to more clearly communicate that they are using
"legacy" APIs and will eventually be removed, this PR places them in an
`isa/legacy/` subdirectory. No functional changes otherwise.
2021-06-24 11:03:47 -07:00
Afonso Bordado
7a5948f729 aarch64: Implement lowering i128 select 2021-06-24 16:19:25 +01:00
Afonso Bordado
b8ad99e435 aarch64: Implement TLS ELF GD Relocations
Implement the `TlsValue` opcode in the aarch64 backend for ELF_GD.

This is a little bit unusual as the default TLS mechanism for aarch64 is TLS Descriptors in other compilers.
However currently we only recognize elf_gd so lets start with that as a TLS implementation.
2021-06-24 12:21:44 +01:00
Chris Fallin
8172620763 Merge pull request #3024 from uweigand/poll-timeout
Increase timeout for poll_oneoff tests
2021-06-23 11:42:21 -07:00
Nick Fitzgerald
edfbd7729b Merge pull request #3023 from alexcrichton/refactor-instance
Simplify the list of builtin intrinsics Wasmtime needs
2021-06-23 11:21:09 -07:00
Ulrich Weigand
c881c01cde Increase timeout for poll_oneoff tests
This increases the timeout from 50ms to 200ms, which makes the
tests reliably pass on my machine using the CI scripts againt
the s390x-linux-user qemu target.
2021-06-23 20:04:31 +02:00
Alex Crichton
a273add815 Simplify the list of builtin intrinsics Wasmtime needs
This commit slims down the list of builtin intrinsics. It removes the
duplicated intrinsics for imported and locally defined items, instead
always using one intrinsic for both. This was previously inconsistently
applied where some intrinsics got two copies (one for imported one for
local) and other intrinsics got only one copy. This does add an extra
branch in intrinsics since they need to determine whether something is
local or not, but that's generally much lower cost than the intrinsics
themselves.

This also removes the `memory32_size` intrinsic, instead inlining the
codegen directly into the clif IR. This matches what the `table.size`
instruction does and removes the need for a few functions on a
`wasmtime_runtime::Instance`.
2021-06-23 10:30:31 -07:00
Alex Crichton
324d80729a Refactor some internal accessors of Instance (#3021)
This commit removes some one-use methods to inline them at their use
site, and otherwise adds bounds checks to other functions like
`imported_function` where previously the `FuncIndex` may have been
accidentally out of bounds, which would cause memory unsafety. There's
no actual bug this was fixing, just trying to improve the safety of the
code internally a little.
2021-06-23 12:12:38 -05:00
Ulrich Weigand
83007b79e3 Fix access to VMMemoryDefinition::current_length on big-endian (#3013)
The current_length member is defined as "usize" in Rust code,
but generated wasm code refers to it as if it were "u32".
While this happens to mostly work on little-endian machines
(as long as the length is < 4GB), it will always fail on
big-endian machines.

Fixed by making current_length "u32" in Rust as well, and
ensuring the actual memory size is always less than 4GB.
2021-06-23 11:45:32 -05:00
Chris Fallin
b8c0ac72f1 Merge pull request #3012 from uweigand/s390x-addcarry
s390x: Basic support for IaddIfcout
2021-06-22 12:19:24 -07:00
Ulrich Weigand
3c678a7900 s390x: Basic support for IaddIfcout
This adds enough support for the IaddIfcout opcode to make the
code emitted by dynamic_addr work on s390x.

Note: On s390x, the condition code mask that has to be used to
implement unsigned_add_overflow_condition does not match any of
the masks for the "normal" condition codes, so this design is
not really a good match for s390x ...
2021-06-22 20:36:06 +02:00
Chris Fallin
4a6594c514 Merge pull request #3011 from cfallin/bint-x64
Fix `bint` on x64, and make `bextend` consistent with bool representation.
2021-06-22 11:26:20 -07:00
Chris Fallin
efe3930215 Fix bint on x64, and make bextend consistent with bool representation.
There has been occasional confusion with the representation that we use
for bool-typed values in registers, at least when these are wider than
one bit. Does a `b8` store `true` as 1, or as all-ones (`0xff`)?

We've settled on the latter because of some use-cases where the wide
bool becomes a mask -- see #2058 for more on this.

This is fine, and transparent, to most operations within CLIF, because
the bool-typed value still has only two semantically-visible states,
namely `true` and `false`.

However, we have to be careful with bool-to-int conversions. `bint` on
aarch64 correctly masked the all-ones value down to 0 or 1, as required
by the instruction specification, but on x64 it did not. This PR fixes
that bug and makes x64 consistent with aarch64.

While staring at this code I realized that `bextend` was also not
consistent with the all-ones invariant: it should do a sign-extend, not
a zero-extend as it previously did. This is also rectified and tested.
(Aarch64 also already had this case implemented correctly.)

Fixes #3003.
2021-06-22 10:56:56 -07:00
Chris Fallin
4b25e3e10a Merge pull request #3014 from uweigand/fix-srcloc
Fix updating srclocs in truncate_last_branch
2021-06-22 10:26:11 -07:00
Chris Fallin
fa1a04d002 Merge pull request #3005 from afonso360/aarch64-i128-extend
aarch64: Implement uextend/sextend for  i128 values
2021-06-22 10:24:30 -07:00
Ulrich Weigand
1a865fb0f5 Fix WASI fd_readdir on big-endian (#3016)
This code assumes that the Dirent structure has the same memory
layout on the host (Rust code) as in wasm code.  This is not true
if the host is big-endian, as wasm is always little-endian.

Fixed by always byte-swapping Dirent fields to little-endian
before passing them on to wasm code.
2021-06-22 10:39:38 -05:00
Ulrich Weigand
acdb388580 Fix offsets_static_dynamic_oh_my failure on s390x (#3015)
The test unconditionally emits a SIMD load, which fails on s390x
as we do not yet support SIMD.  Disable this particular part of
the test on s390x.
2021-06-22 09:14:07 -05:00
Ulrich Weigand
a90ab8a0cf Fix updating srclocs in truncate_last_branch
The truncate_last_branch removes an instruction that had already
been added to the buffer, and must update various bookkeeping.

However, updating the "srclocs" field is incorrect: if there is
a srclocs entry that spans both the removed branch *and some
previous instruction*, that whole srclocs entry is removed,
which makes those previous instructions now uncovered by any
srclocs record.  This can cause subsequent problems e.g. if
one of those instructions traps.

Fixed by just truncating instead of fully removing the srclocs
record in this case.
2021-06-22 13:53:47 +02:00