* Use imm64 rather than offset32
* Add predicate to enforce signed 32-bit limit to imm
* Remove AdjustSpImm format
* Add encoding tests for adjust_sp_imm
* Adjust use of adjust_sp_imm in Intel prologue_epilogue to match
This test was failing because the hash computes values greater than
0x7fffffff, which 32-bit python2 promotes to long, which `hex` formats
with a trailing 'L'. The code that uses it appears to be ok with a
long value, so it's just the test that needs to handle it.
Fix as suggested here:
https://stackoverflow.com/questions/5917203/python-trailing-l-problem
* wasm testsuite: ignore hidden files in test dir
and report a rejected file. it was picking up vim .swp files
* wasmtests: correct wat syntax in icall.wat
Like before, we store a redundant EBB with each predecessor instruction
which allows invalidate_ebb_successors() to clean up the successor's
predecessor lists even after instructions have been moved around in the
layout.
This was supposed to be Q3 + 1.5 IQR, but a braino meant we actually used
Q3 + 2/3 IQR.
Since the distribution of test case times is far from gaussian, bump the
"slow" limit up even further to Q3 + 3 IQR.
This reverts commit 0538615ccc0b600d4f534dae2ee966d5ed0df9b7.
Fixes#196. The pager functionality wasn't working as intended since
long error messages appear on stdout which isn't captured by the pager.
Define two public iterator types in the flowgraph module, PredIter and
SuccIter, which are by-value iterators over an EBB's predecessors and
successors respectively.
Provide matching pred_iter() and succ_iter() methods for inspecting the
CFG. Remove the get_predecessors() method which returned a slice.
Update the uses of get_predecessors(), none of which depended on it
being a slice.
This abstraction makes it possible to change the internal representation
of the CFG.
* Treat VMContext as standard positional argument when using Native CallConv.
This requires threading the CallConv through legalize_args and into ArgAssigner.
* Stash CallConv in the intel-specific Args struct, for use ArgAssigner.
This has two advantages over the previous Vec<Ebb>:
- Duplicates are removed.
- Clearing the control flow graph is constant time.
The set of EBB successors is simply ordered by EBB number.
The control flow graph does not guarantee any particular ordering for
its successor lists, and the post-order we are computing for building
the dominator tree needs to be "split-invariant".
See #146 for details.
- Discover EBB successors directly from the EBB instruction sequence to
guarantee that the post-order we compute is canonical/split-invariant.
- Use an alternative graph DFS algorithm which doesn't require indexing
into a slice of successors.
This changes cfg_postorder in some cases because the edge pruning when
converting the (DAG) CFG to a tree for the DFT is different.
