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Add adjust_sp_imm instruction. Note: This enables using rsp and rbp as normal registers. Which is... wrong.

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Tyler McMullen
2017-11-27 15:32:28 -08:00
committed by Jakob Stoklund Olesen
parent 32509ebacd
commit ffab87318e
9 changed files with 32 additions and 4 deletions
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lib/cretonne/meta/base/formats.py
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@@ -69,6 +69,7 @@ RegSpill = InstructionFormat(
VALUE, ('src', regunit), ('dst', entities.stack_slot))
RegFill = InstructionFormat(
VALUE, ('src', entities.stack_slot), ('dst', regunit))
AdjustSpImm = InstructionFormat(offset32)
Trap = InstructionFormat(trapcode)
CondTrap = InstructionFormat(VALUE, trapcode)