Use capstone to validate precise-output tests (#5780)

Use the capstone library to disassemble precise-output tests, in addition to pretty-printing their vcode.
This commit is contained in:
Trevor Elliott
2023-02-15 16:35:10 -08:00
committed by GitHub
parent eabd43a178
commit f04decc4a1
277 changed files with 39340 additions and 98 deletions

View File

@@ -8,9 +8,16 @@ block0(v0: i64, v1: i64):
return
}
; VCode:
; block0:
; atomic_store.i64 a0,(a1)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; fence rw, w
; sd a0, 0(a1)
; ret
function %atomic_store_i64_sym(i64) {
gv0 = symbol colocated %sym
@@ -20,10 +27,22 @@ block0(v0: i64):
return
}
; VCode:
; block0:
; load_sym t2,%sym+0
; atomic_store.i64 a0,(t2)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; auipc t2, 0
; ld t2, 0xc(t2)
; j 0xc
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %sym 0
; .byte 0x00, 0x00, 0x00, 0x00
; fence rw, w
; sd a0, 0(t2)
; ret
function %atomic_store_imm_i64(i64) {
block0(v0: i64):
@@ -32,11 +51,20 @@ block0(v0: i64):
return
}
; VCode:
; block0:
; lui a1,3
; addi a1,a1,57
; atomic_store.i64 a1,(a0)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; lui a1, 3
; addi a1, a1, 0x39
; fence rw, w
; sd a1, 0(a0)
; ret
function %atomic_store_i32(i32, i64) {
block0(v0: i32, v1: i64):
@@ -44,9 +72,16 @@ block0(v0: i32, v1: i64):
return
}
; VCode:
; block0:
; atomic_store.i32 a0,(a1)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; fence rw, w
; sw a0, 0(a1)
; ret
function %atomic_store_i32_sym(i32) {
gv0 = symbol colocated %sym
@@ -56,10 +91,22 @@ block0(v0: i32):
return
}
; VCode:
; block0:
; load_sym t2,%sym+0
; atomic_store.i32 a0,(t2)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; auipc t2, 0
; ld t2, 0xc(t2)
; j 0xc
; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %sym 0
; .byte 0x00, 0x00, 0x00, 0x00
; fence rw, w
; sw a0, 0(t2)
; ret
function %atomic_store_imm_i32(i64) {
block0(v0: i64):
@@ -68,9 +115,18 @@ block0(v0: i64):
return
}
; VCode:
; block0:
; lui a1,3
; addi a1,a1,57
; atomic_store.i32 a1,(a0)
; ret
;
; Disassembled:
; block0: ; offset 0x0
; lui a1, 3
; addi a1, a1, 0x39
; fence rw, w
; sw a1, 0(a0)
; ret