f04decc4a1
Use the capstone library to disassemble precise-output tests, in addition to pretty-printing their vcode.
133 lines
2.1 KiB
Plaintext
133 lines
2.1 KiB
Plaintext
test compile precise-output
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set unwind_info=false
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target riscv64
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function %atomic_store_i64(i64, i64) {
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block0(v0: i64, v1: i64):
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atomic_store.i64 v0, v1
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return
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}
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; VCode:
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; block0:
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; atomic_store.i64 a0,(a1)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fence rw, w
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; sd a0, 0(a1)
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; ret
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function %atomic_store_i64_sym(i64) {
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gv0 = symbol colocated %sym
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block0(v0: i64):
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v1 = symbol_value.i64 gv0
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atomic_store.i64 v0, v1
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return
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}
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; VCode:
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; block0:
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; load_sym t2,%sym+0
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; atomic_store.i64 a0,(t2)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; auipc t2, 0
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; ld t2, 0xc(t2)
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; j 0xc
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; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %sym 0
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; .byte 0x00, 0x00, 0x00, 0x00
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; fence rw, w
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; sd a0, 0(t2)
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; ret
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function %atomic_store_imm_i64(i64) {
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block0(v0: i64):
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v1 = iconst.i64 12345
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atomic_store.i64 v1, v0
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return
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}
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; VCode:
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; block0:
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; lui a1,3
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; addi a1,a1,57
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; atomic_store.i64 a1,(a0)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lui a1, 3
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; addi a1, a1, 0x39
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; fence rw, w
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; sd a1, 0(a0)
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; ret
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function %atomic_store_i32(i32, i64) {
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block0(v0: i32, v1: i64):
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atomic_store.i32 v0, v1
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return
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}
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; VCode:
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; block0:
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; atomic_store.i32 a0,(a1)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; fence rw, w
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; sw a0, 0(a1)
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; ret
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function %atomic_store_i32_sym(i32) {
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gv0 = symbol colocated %sym
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block0(v0: i32):
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v1 = symbol_value.i64 gv0
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atomic_store.i32 v0, v1
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return
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}
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; VCode:
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; block0:
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; load_sym t2,%sym+0
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; atomic_store.i32 a0,(t2)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; auipc t2, 0
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; ld t2, 0xc(t2)
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; j 0xc
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; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %sym 0
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; .byte 0x00, 0x00, 0x00, 0x00
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; fence rw, w
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; sw a0, 0(t2)
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; ret
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function %atomic_store_imm_i32(i64) {
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block0(v0: i64):
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v1 = iconst.i32 12345
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atomic_store.i32 v1, v0
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return
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}
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; VCode:
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; block0:
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; lui a1,3
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; addi a1,a1,57
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; atomic_store.i32 a1,(a0)
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; lui a1, 3
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; addi a1, a1, 0x39
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; fence rw, w
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; sw a1, 0(a0)
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; ret
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