x64: Run more filetests with AVX support (#6063)

This commit goes through the `runtests` folder of the `filetests`
test suite and ensure that everything which uses simd or float-related
instructions on x64 is executed with the baseline support for x86_64 in
addition to adding in AVX support. Most of the instructions used have
AVX equivalents so this should help test all of the equivalents in
addition to the codegen filetests in the x64 folder.
This commit is contained in:
Alex Crichton
2023-03-20 14:13:14 -05:00
committed by GitHub
parent ad0f169d64
commit dd7fa81b20
76 changed files with 126 additions and 1 deletions

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@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
function %bitcast_if32(i32) -> f32 {

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@@ -2,6 +2,8 @@ test interpret
test run
target x86_64
target x86_64 has_sse41=false
set enable_simd
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
target riscv64
function %fcvt_to_sint(f32) -> i32 {

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@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target aarch64
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
function %bnot_f32(f32) -> f32 {
block0(v0: f32):

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@@ -2,6 +2,8 @@ test interpret
test run
target x86_64
target x86_64 has_sse41=false
set enable_simd
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target riscv64
; target s390x FIXME: This currently fails under qemu due to a qemu bug

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -2,6 +2,7 @@ test run
set enable_simd
target aarch64
; target s390x FIXME: This currently fails under qemu due to a qemu bug
target x86_64
target x86_64 skylake
function %fmin_pseudo_f32x4(f32x4, f32x4) -> f32x4 {

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target riscv64
; target s390x FIXME: This currently fails under qemu due to a qemu bug

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

View File

@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
target riscv64

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target s390x
target aarch64
target riscv64

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -2,6 +2,8 @@ test interpret
test run
target x86_64
target x86_64 has_sse41=false
set enable_simd
target x86_64 has_avx
target aarch64
target s390x
target riscv64

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@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
function %bitcast_if32x4(i32x4) -> f32x4 {

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@@ -3,6 +3,7 @@ target aarch64
target s390x
set opt_level=speed_and_size
set enable_simd
target x86_64
target x86_64 skylake
function %mask_from_icmp(i32x4, i32x4) -> i32x4 {

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@@ -3,6 +3,7 @@ set enable_simd
target aarch64
target s390x
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %bitselect_i32x4(i32x4, i32x4, i32x4) -> i32x4 {
block0(v0: i32x4, v1: i32x4, v2: i32x4):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %fcvt_from_sint(i32x4) -> f32x4 {
block0(v0: i32x4):

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@@ -3,6 +3,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %fcmp_eq_f32x4() -> i8 {

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@@ -3,6 +3,7 @@
; simd-arithmetic-nondeterministic*.clif as well.
test run
set enable_simd
target x86_64
target x86_64 skylake
function %fmax_f64x2(f64x2, f64x2) -> f64x2 {

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %iabs_i8x16(i8x16) -> i8x16 {
block0(v0: i8x16):

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@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

View File

@@ -1,6 +1,8 @@
test interpret
test run
set enable_simd
target x86_64
target x86_64 has_avx
target aarch64
target s390x

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %simd_icmp_uge_i8(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %simd_icmp_ugt_i8(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %simd_icmp_ule_i8(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %simd_icmp_ult_i8(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -2,6 +2,7 @@ test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 skylake

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@@ -3,6 +3,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %bnot() -> i32 {
block0:

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@@ -1,7 +1,9 @@
test run
test interpret
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
function %smin_i8x16(i8x16, i8x16) -> i8x16 {

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %saddsat_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -3,6 +3,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %scalartovector_i32(i32) -> i32x4 {
block0(v0: i32):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %snarrow_i16x8(i16x8, i16x8) -> i8x16 {
block0(v0: i16x8, v1: i16x8):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %sqmulrs_i16x8(i16x8, i16x8) -> i16x8 {
block0(v0: i16x8, v1: i16x8):

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@@ -2,6 +2,7 @@ test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 skylake

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %ssubsat_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %swidenhigh_i8x16(i8x16) -> i16x8 {
block0(v0: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %swidenlow_i8x16(i8x16) -> i16x8 {
block0(v0: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %swizzle_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %uaddsat_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %unarrow_i16x8(i16x8, i16x8) -> i8x16 {
block0(v0: i16x8, v1: i16x8):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %usubsat_i8x16(i8x16, i8x16) -> i8x16 {
block0(v0: i8x16, v1: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %uwidenhigh_i8x16(i8x16) -> i16x8 {
block0(v0: i8x16):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %uwidenlow_i8x16(i8x16) -> i16x8 {
block0(v0: i8x16):

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %vall_true_i8x16(i8x16) -> i8 {
block0(v0: i8x16):

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@@ -1,8 +1,10 @@
test interpret
test run
set enable_simd
target aarch64
target s390x
target x86_64
target x86_64 has_avx
function %vany_true_i8x16(i8x16) -> i8 {
block0(v0: i8x16):

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@@ -3,6 +3,7 @@ target s390x
target aarch64
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %vconst_zeroes() -> i8 {

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %vhighbits_i8x16(i8x16) -> i16 {
block0(v0: i8x16):

View File

@@ -3,6 +3,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
function %wpdps(i16x8, i16x8) -> i32x4 {
block0(v0: i16x8, v1: i16x8):

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@@ -4,6 +4,7 @@ target aarch64
target s390x
set enable_simd
target x86_64 has_sse3 has_ssse3 has_sse41
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
target riscv64

View File

@@ -1,7 +1,9 @@
test interpret
test run
set enable_simd
target aarch64
target x86_64
target x86_64 has_avx
target s390x
target riscv64

View File

@@ -1,6 +1,8 @@
test run
set enable_llvm_abi_extensions
set enable_simd
target x86_64
target x86_64 has_avx
; Regression test for unaligned loads to xmm registers when relying on automatic
; conversion to XmmMem arguments in ISLE.