dd7fa81b20
This commit goes through the `runtests` folder of the `filetests` test suite and ensure that everything which uses simd or float-related instructions on x64 is executed with the baseline support for x86_64 in addition to adding in AVX support. Most of the instructions used have AVX equivalents so this should help test all of the equivalents in addition to the codegen filetests in the x64 folder.
112 lines
5.0 KiB
Plaintext
112 lines
5.0 KiB
Plaintext
test run
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test interpret
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set enable_simd
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target aarch64
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target x86_64
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target x86_64 has_avx
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target s390x
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function %smin_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = smin v0, v1
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return v2
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}
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; run: %smin_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ]
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; run: %smin_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f ]
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function %smin_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = smin v0, v1
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return v2
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}
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; run: %smin_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x1234 0x1234 0x9876 0x0987 0x0123 0x1234 0x4567 0x3456 ]
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function %smin_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = smin v0, v1
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return v2
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}
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; run: %smin_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xBAADF00D 0xDEADBEEF 0x98763210 0xBADAB00F ]
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function %umin_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = umin v0, v1
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return v2
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}
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; run: %umin_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f ]
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; run: %umin_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x10 0x01 0x12 0x03 0x14 0x05 0x16 0x07 0x18 0x09 0x1a 0x0b 0x1c 0x0d 0x1e 0x0f ]
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function %umin_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = umin v0, v1
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return v2
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}
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; run: %umin_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x1234 0x1234 0x6789 0x0987 0x0123 0x1234 0x4567 0x3456 ]
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function %umin_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = umin v0, v1
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return v2
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}
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; run: %umin_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xBAADF00D 0x12349876 0x98763210 0x43216789 ]
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function %smax_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = smax v0, v1
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return v2
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}
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; run: %smax_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]
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; run: %smax_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x10 0x01 0x12 0x03 0x14 0x05 0x16 0x07 0x18 0x09 0x1a 0x0b 0x1c 0x0d 0x1e 0x0f ]
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function %smax_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = smax v0, v1
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return v2
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}
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; run: %smax_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x4567 0x5678 0x6789 0x5432 0x7654 0x3210 0x7890 0x3456 ]
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function %smax_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = smax v0, v1
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return v2
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}
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; run: %smax_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xCA11ACAB 0x12349876 0xC00FFFEE 0x43216789 ]
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function %umax_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = umax v0, v1
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return v2
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}
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; run: %umax_i8x16([0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f], [0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]) == [ 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ]
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; run: %umax_i8x16([0x90 0x01 0x92 0x03 0x94 0x05 0x96 0x07 0x98 0x09 0x9a 0x0b 0x9c 0x0d 0x9e 0x0f], [0x10 0x91 0x12 0x93 0x14 0x95 0x16 0x97 0x18 0x99 0x1a 0x9b 0x1c 0x9d 0x1e 0x9f ]) == [ 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f ]
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function %umax_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = umax v0, v1
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return v2
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}
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; run: %umax_i16x8([0x1234 0x5678 0x9876 0x5432 0x7654 0x1234 0x4567 0x3456 ], [ 0x4567 0x1234 0x6789 0x0987 0x0123 0x3210 0x7890 0x3456 ]) == [ 0x4567 0x5678 0x9876 0x5432 0x7654 0x3210 0x7890 0x3456 ]
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function %umax_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = umax v0, v1
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return v2
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}
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; run: %umax_i32x4([0xBAADF00D 0xDEADBEEF 0xC00FFFEE 0xBADAB00F], [0xCA11ACAB 0x12349876 0x98763210 0x43216789]) == [ 0xCA11ACAB 0xDEADBEEF 0xC00FFFEE 0xBADAB00F ]
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