Cranelift: Do not optimize heap bounds checking comparison in legalization (#5272)
That optimization is only for 12-bit immediates in Aarch64, which is now handled in backend lowering, so we can simplify this code a bit now.
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@@ -189,37 +189,22 @@ fn static_addr(
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let mut spectre_oob_comparison = None;
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let index = cast_index_to_pointer_ty(index, index_ty, addr_ty, &mut pos);
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if index_ty != ir::types::I32 || limit < 0xffff_ffff {
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// Here we want to test the condition `index > limit` and if that's
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// true then this is an out-of-bounds access and needs to trap. For ARM
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// and other RISC architectures it's easier to test against an immediate
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// that's even instead of odd, so if `limit` is odd then we instead test
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// for `index >= limit + 1`.
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//
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// The thinking behind this is that:
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//
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// A >= B + 1 => A - 1 >= B => A > B
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//
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// where the last step here is true because A/B are integers, which
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// should mean that `A >= B + 1` is an equivalent check for `A > B`
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let (cc, lhs, limit_imm) = if limit & 1 == 1 {
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let limit = limit as i64 + 1;
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(IntCC::UnsignedGreaterThanOrEqual, index, limit)
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} else {
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let limit = limit as i64;
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(IntCC::UnsignedGreaterThan, index, limit)
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};
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let oob = pos.ins().icmp_imm(cc, lhs, limit_imm);
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// Here we want to test the condition `index > limit` and if that's true
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// then this is an out-of-bounds access and needs to trap.
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let oob = pos
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.ins()
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.icmp_imm(IntCC::UnsignedGreaterThan, index, limit as i64);
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trace!(" inserting: {}", pos.func.dfg.display_value_inst(oob));
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let trapnz = pos.ins().trapnz(oob, ir::TrapCode::HeapOutOfBounds);
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trace!(" inserting: {}", pos.func.dfg.display_inst(trapnz));
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if isa.flags().enable_heap_access_spectre_mitigation() {
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let limit = pos.ins().iconst(addr_ty, limit_imm);
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let limit = pos.ins().iconst(addr_ty, limit as i64);
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trace!(" inserting: {}", pos.func.dfg.display_value_inst(limit));
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spectre_oob_comparison = Some(SpectreOobComparison {
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cc,
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lhs,
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cc: IntCC::UnsignedGreaterThan,
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lhs: index,
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rhs: limit,
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});
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}
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