Cranelift: Remove ifcmp_sp opcode. (#4578)

This was temporarily added back in #3502 due to a need from Lucet; now
that Lucet is EOL, the opcode is no longer needed and we can remove it.
This commit is contained in:
Chris Fallin
2022-08-02 13:15:39 -07:00
committed by GitHub
parent 43f1765272
commit 8dddd6f1f7
6 changed files with 2 additions and 70 deletions

View File

@@ -1590,21 +1590,6 @@ pub(crate) fn define(
.operands_out(vec![a]),
);
ig.push(
Inst::new(
"ifcmp_sp",
r#"
Compare ``addr`` with the stack pointer and set the CPU flags.
This is like `ifcmp` where ``addr`` is the LHS operand and the stack
pointer is the RHS.
"#,
&formats.unary,
)
.operands_in(vec![addr])
.operands_out(vec![flags]),
);
let x = &Operand::new("x", TxN).with_doc("Vector to split");
let lo = &Operand::new("lo", &TxN.half_vector()).with_doc("Low-numbered lanes of `x`");
let hi = &Operand::new("hi", &TxN.half_vector()).with_doc("High-numbered lanes of `x`");

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@@ -1794,7 +1794,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
Opcode::ExtractVector => implemented_in_isle(ctx),
Opcode::ConstAddr | Opcode::Vconcat | Opcode::Vsplit | Opcode::IfcmpSp => {
Opcode::ConstAddr | Opcode::Vconcat | Opcode::Vsplit => {
return Err(CodegenError::Unsupported(format!(
"Unimplemented lowering: {}",
op

View File

@@ -221,7 +221,6 @@ impl LowerBackend for S390xBackend {
panic!("global_value should have been removed by legalization!");
}
Opcode::Ifcmp
| Opcode::IfcmpSp
| Opcode::Ffcmp
| Opcode::Trapff
| Opcode::Trueif

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@@ -2796,7 +2796,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
panic!("table_addr should have been removed by legalization!");
}
Opcode::IfcmpSp | Opcode::Copy => {
Opcode::Copy => {
panic!("Unused opcode should not be encountered.");
}
@@ -3011,23 +3011,6 @@ impl LowerBackend for X64Backend {
let cond_code = emit_cmp(ctx, ifcmp, cond_code);
let cc = CC::from_intcc(cond_code);
ctx.emit(Inst::jmp_cond(cc, taken, not_taken));
} else if let Some(ifcmp_sp) = matches_input(ctx, flag_input, Opcode::IfcmpSp) {
let operand = put_input_in_reg(
ctx,
InsnInput {
insn: ifcmp_sp,
input: 0,
},
);
let ty = ctx.input_ty(ifcmp_sp, 0);
ctx.emit(Inst::cmp_rmi_r(
OperandSize::from_ty(ty),
RegMemImm::reg(regs::rsp()),
operand,
));
let cond_code = ctx.data(branches[0]).cond_code().unwrap();
let cc = CC::from_intcc(cond_code);
ctx.emit(Inst::jmp_cond(cc, taken, not_taken));
} else {
// Should be disallowed by flags checks in verifier.
unimplemented!("Brif with non-ifcmp input");

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@@ -1,34 +0,0 @@
test compile precise-output
target x86_64
function %f(i64) -> i32 {
block0(v0: i64):
v1 = ifcmp_sp v0
brif ugt v1, block1
jump block2
block1:
v2 = iconst.i32 0
return v2
block2:
v3 = iconst.i32 1
return v3
}
; pushq %rbp
; movq %rsp, %rbp
; block0:
; cmpq %rsp, %rdi
; jnbe label1; j label2
; block1:
; xorl %eax, %eax, %eax
; movq %rbp, %rsp
; popq %rbp
; ret
; block2:
; movl $1, %eax
; movq %rbp, %rsp
; popq %rbp
; ret

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@@ -448,7 +448,6 @@ where
assign(Value::or(mask_a, mask_b)?)
}
Opcode::Copy => assign(arg(0)?),
Opcode::IfcmpSp => unimplemented!("IfcmpSp"),
Opcode::Icmp => assign(icmp(
ctrl_ty,
inst.cond_code().unwrap(),