diff --git a/cranelift/codegen/meta/src/shared/instructions.rs b/cranelift/codegen/meta/src/shared/instructions.rs
index de231f3157..65019f4cd6 100644
--- a/cranelift/codegen/meta/src/shared/instructions.rs
+++ b/cranelift/codegen/meta/src/shared/instructions.rs
@@ -1590,21 +1590,6 @@ pub(crate) fn define(
         .operands_out(vec![a]),
     );
 
-    ig.push(
-        Inst::new(
-            "ifcmp_sp",
-            r#"
-    Compare ``addr`` with the stack pointer and set the CPU flags.
-
-    This is like `ifcmp` where ``addr`` is the LHS operand and the stack
-    pointer is the RHS.
-    "#,
-            &formats.unary,
-        )
-        .operands_in(vec![addr])
-        .operands_out(vec![flags]),
-    );
-
     let x = &Operand::new("x", TxN).with_doc("Vector to split");
     let lo = &Operand::new("lo", &TxN.half_vector()).with_doc("Low-numbered lanes of `x`");
     let hi = &Operand::new("hi", &TxN.half_vector()).with_doc("High-numbered lanes of `x`");
diff --git a/cranelift/codegen/src/isa/aarch64/lower_inst.rs b/cranelift/codegen/src/isa/aarch64/lower_inst.rs
index 65863ea135..a406f65f11 100644
--- a/cranelift/codegen/src/isa/aarch64/lower_inst.rs
+++ b/cranelift/codegen/src/isa/aarch64/lower_inst.rs
@@ -1794,7 +1794,7 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
 
         Opcode::ExtractVector => implemented_in_isle(ctx),
 
-        Opcode::ConstAddr | Opcode::Vconcat | Opcode::Vsplit | Opcode::IfcmpSp => {
+        Opcode::ConstAddr | Opcode::Vconcat | Opcode::Vsplit => {
             return Err(CodegenError::Unsupported(format!(
                 "Unimplemented lowering: {}",
                 op
diff --git a/cranelift/codegen/src/isa/s390x/lower.rs b/cranelift/codegen/src/isa/s390x/lower.rs
index abd28679ce..21dd114bbc 100644
--- a/cranelift/codegen/src/isa/s390x/lower.rs
+++ b/cranelift/codegen/src/isa/s390x/lower.rs
@@ -221,7 +221,6 @@ impl LowerBackend for S390xBackend {
                 panic!("global_value should have been removed by legalization!");
             }
             Opcode::Ifcmp
-            | Opcode::IfcmpSp
             | Opcode::Ffcmp
             | Opcode::Trapff
             | Opcode::Trueif
diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs
index 18ed87b6ad..96d2ce91cc 100644
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -2796,7 +2796,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
             panic!("table_addr should have been removed by legalization!");
         }
 
-        Opcode::IfcmpSp | Opcode::Copy => {
+        Opcode::Copy => {
             panic!("Unused opcode should not be encountered.");
         }
 
@@ -3011,23 +3011,6 @@ impl LowerBackend for X64Backend {
                         let cond_code = emit_cmp(ctx, ifcmp, cond_code);
                         let cc = CC::from_intcc(cond_code);
                         ctx.emit(Inst::jmp_cond(cc, taken, not_taken));
-                    } else if let Some(ifcmp_sp) = matches_input(ctx, flag_input, Opcode::IfcmpSp) {
-                        let operand = put_input_in_reg(
-                            ctx,
-                            InsnInput {
-                                insn: ifcmp_sp,
-                                input: 0,
-                            },
-                        );
-                        let ty = ctx.input_ty(ifcmp_sp, 0);
-                        ctx.emit(Inst::cmp_rmi_r(
-                            OperandSize::from_ty(ty),
-                            RegMemImm::reg(regs::rsp()),
-                            operand,
-                        ));
-                        let cond_code = ctx.data(branches[0]).cond_code().unwrap();
-                        let cc = CC::from_intcc(cond_code);
-                        ctx.emit(Inst::jmp_cond(cc, taken, not_taken));
                     } else {
                         // Should be disallowed by flags checks in verifier.
                         unimplemented!("Brif with non-ifcmp input");
diff --git a/cranelift/filetests/filetests/isa/x64/ifcmp-sp.clif b/cranelift/filetests/filetests/isa/x64/ifcmp-sp.clif
deleted file mode 100644
index b3c82b4460..0000000000
--- a/cranelift/filetests/filetests/isa/x64/ifcmp-sp.clif
+++ /dev/null
@@ -1,34 +0,0 @@
-test compile precise-output
-target x86_64
-
-function %f(i64) -> i32 {
-block0(v0: i64):
-    v1 = ifcmp_sp v0
-    brif ugt v1, block1
-    jump block2
-
-block1:
-    v2 = iconst.i32 0
-    return v2
-
-block2:
-    v3 = iconst.i32 1
-    return v3
-}
-
-;   pushq   %rbp
-;   movq    %rsp, %rbp
-; block0:
-;   cmpq    %rsp, %rdi
-;   jnbe    label1; j label2
-; block1:
-;   xorl    %eax, %eax, %eax
-;   movq    %rbp, %rsp
-;   popq    %rbp
-;   ret
-; block2:
-;   movl    $1, %eax
-;   movq    %rbp, %rsp
-;   popq    %rbp
-;   ret
-
diff --git a/cranelift/interpreter/src/step.rs b/cranelift/interpreter/src/step.rs
index 62310dc347..8f0b461e77 100644
--- a/cranelift/interpreter/src/step.rs
+++ b/cranelift/interpreter/src/step.rs
@@ -448,7 +448,6 @@ where
             assign(Value::or(mask_a, mask_b)?)
         }
         Opcode::Copy => assign(arg(0)?),
-        Opcode::IfcmpSp => unimplemented!("IfcmpSp"),
         Opcode::Icmp => assign(icmp(
             ctrl_ty,
             inst.cond_code().unwrap(),