x64: Migrate {s,u}{div,rem} to ISLE (#6008)

* x64: Add precise-output tests for div traps

This adds a suite of `*.clif` files which are intended to test the
`avoid_div_traps=true` compilation of the `{s,u}{div,rem}` instructions.

* x64: Remove conditional regalloc in `Div` instruction

Move the 8-bit `Div` logic into a dedicated `Div8` instruction to avoid
having conditionally-used registers with respect to regalloc.

* x64: Migrate non-trapping, `udiv`/`urem` to ISLE

* x64: Port checked `udiv` to ISLE

* x64: Migrate urem entirely to ISLE

* x64: Use `test` instead of `cmp` to compare-to-zero

* x64: Port `sdiv` lowering to ISLE

* x64: Port `srem` lowering to ISLE

* Tidy up regalloc behavior and fix tests

* Update docs and winch

* Review comments

* Reword again

* More refactoring test fixes

* More test fixes

cranelift/filetests/filetests/isa/x64/div-checks.clif

@@ -19,8 +19,8 @@ block0(v0: i8, v1: i8):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %al, %dl, %sil, %al, %dl, tmp=(none)
+;   cbw %al, %al
+;   checked_srem_seq %al, %sil, %al
 ;   shrq    $8, %rax, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -32,15 +32,11 @@ block0(v0: i8, v1: i8):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpb $0, %sil
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpb $0xff, %sil
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cbtw
+;   cmpb $0xff, %sil
+;   jne 0x1d
+;   movl $0, %eax
+;   jmp 0x20
 ;   idivb %sil ; trap: int_divz
 ;   shrq $8, %rax
 ;   movq %rbp, %rsp
@@ -59,8 +55,8 @@ block0(v0: i16, v1: i16):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %ax, %dx, %si, %ax, %dx, tmp=(none)
+;   cwd %ax, %dx
+;   checked_srem_seq %ax, %dx, %si, %ax, %dx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -72,15 +68,11 @@ block0(v0: i16, v1: i16):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpw $0, %si
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpw $-1, %si
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cwtd
+;   cmpw $-1, %si
+;   jne 0x1d
+;   movl $0, %edx
+;   jmp 0x20
 ;   idivw %si ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -99,8 +91,8 @@ block0(v0: i32, v1: i32):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %eax, %edx, %esi, %eax, %edx, tmp=(none)
+;   cdq %eax, %edx
+;   checked_srem_seq %eax, %edx, %esi, %eax, %edx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -112,15 +104,11 @@ block0(v0: i32, v1: i32):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpl $0, %esi
-;   jne 0x14
-;   ud2 ; trap: int_divz
-;   cmpl $-1, %esi
-;   jne 0x27
-;   movl $0, %eax
-;   jmp 0x2a
 ;   cltd
+;   cmpl $-1, %esi
+;   jne 0x1b
+;   movl $0, %edx
+;   jmp 0x1d
 ;   idivl %esi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -139,8 +127,8 @@ block0(v0: i64, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %rax, %rdx, %rsi, %rax, %rdx, tmp=(none)
+;   cqo %rax, %rdx
+;   checked_srem_seq %rax, %rdx, %rsi, %rax, %rdx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -152,15 +140,11 @@ block0(v0: i64, v1: i64):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpq $0, %rsi
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpq $-1, %rsi
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cqto
+;   cmpq $-1, %rsi
+;   jne 0x1d
+;   movl $0, %edx
+;   jmp 0x20
 ;   idivq %rsi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp

cranelift/filetests/filetests/isa/x64/sdiv-checked.clif

@@ -0,0 +1,285 @@
+test compile precise-output
+set avoid_div_traps=true
+target x86_64
+
+function %f1(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cbw %al, %al
+;   validate_sdiv_divisor %sil, %al
+;   idiv    %al, %sil, %al
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cbtw
+;   cmpb $0, %sil
+;   jne 0x15
+;   ud2 ; trap: int_divz
+;   cmpb $0xff, %sil
+;   jne 0x2a
+;   cmpb $0x80, %al
+;   jne 0x2a
+;   ud2 ; trap: int_ovf
+;   idivb %sil ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f2(i16, i16) -> i16 {
+block0(v0: i16, v1: i16):
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   validate_sdiv_divisor %si, %di
+;   movq    %rdi, %rax
+;   cwd %ax, %dx
+;   idiv    %ax, %dx, %si, %ax, %dx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   cmpw $0, %si
+;   jne 0x10
+;   ud2 ; trap: int_divz
+;   cmpw $-1, %si
+;   jne 0x27
+;   cmpw $0x8000, %di
+;   jne 0x27
+;   ud2 ; trap: int_ovf
+;   movq %rdi, %rax
+;   cwtd
+;   idivw %si ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f3(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   validate_sdiv_divisor %esi, %edi
+;   movq    %rdi, %rax
+;   cdq %eax, %edx
+;   idiv    %eax, %edx, %esi, %eax, %edx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   cmpl $0, %esi
+;   jne 0xf
+;   ud2 ; trap: int_divz
+;   cmpl $-1, %esi
+;   jne 0x26
+;   cmpl $0x80000000, %edi
+;   jne 0x26
+;   ud2 ; trap: int_ovf
+;   movq %rdi, %rax
+;   cltd
+;   idivl %esi ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f4(i64, i64) -> i64 {
+block0(v0: i64, v1: i64):
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   validate_sdiv_divisor %rsi, %rdi %rcx
+;   movq    %rdi, %rax
+;   cqo %rax, %rdx
+;   idiv    %rax, %rdx, %rsi, %rax, %rdx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   cmpq $0, %rsi
+;   jne 0x10
+;   ud2 ; trap: int_divz
+;   cmpq $-1, %rsi
+;   jne 0x2f
+;   movabsq $9223372036854775808, %rcx
+;   cmpq %rcx, %rdi
+;   jne 0x2f
+;   ud2 ; trap: int_ovf
+;   movq %rdi, %rax
+;   cqto
+;   idivq %rsi ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i8_imm(i8) -> i8 {
+block0(v0: i8):
+  v1 = iconst.i8 17
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cbw %al, %al
+;   movl    $17, %edx
+;   idiv    %al, %dl, %al
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cbtw
+;   movl $0x11, %edx
+;   idivb %dl ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i16_imm(i16) -> i16 {
+block0(v0: i16):
+  v1 = iconst.i16 17
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movl    $17, %ecx
+;   movq    %rdi, %rax
+;   cwd %ax, %dx
+;   idiv    %ax, %dx, %cx, %ax, %dx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movl $0x11, %ecx
+;   movq %rdi, %rax
+;   cwtd
+;   idivw %cx ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i32_imm(i32) -> i32 {
+block0(v0: i32):
+  v1 = iconst.i32 17
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movl    $17, %ecx
+;   movq    %rdi, %rax
+;   cdq %eax, %edx
+;   idiv    %eax, %edx, %ecx, %eax, %edx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movl $0x11, %ecx
+;   movq %rdi, %rax
+;   cltd
+;   idivl %ecx ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i64_imm(i64) -> i64 {
+block0(v0: i64):
+  v1 = iconst.i64 17
+  v2 = sdiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movl    $17, %ecx
+;   movq    %rdi, %rax
+;   cqo %rax, %rdx
+;   idiv    %rax, %rdx, %rcx, %rax, %rdx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movl $0x11, %ecx
+;   movq %rdi, %rax
+;   cqto
+;   idivq %rcx ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+

cranelift/filetests/filetests/isa/x64/sdiv.clif

@@ -13,7 +13,7 @@ block0(v0: i8, v1: i8):
 ; block0:
 ;   movq    %rdi, %rax
 ;   cbw %al, %al
-;   idiv    %al, (none), %sil, %al, (none)
+;   idiv    %al, %sil, %al
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret

cranelift/filetests/filetests/isa/x64/srem-checked.clif

@@ -0,0 +1,300 @@
+test compile precise-output
+set avoid_div_traps=true
+target x86_64
+
+function %f1(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cbw %al, %al
+;   testb   %sil, %sil
+;   jnz ; ud2 int_divz ;
+;   checked_srem_seq %al, %sil, %al
+;   shrq    $8, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cbtw
+;   testb %sil, %sil
+;   jne 0x14
+;   ud2 ; trap: int_divz
+;   cmpb $0xff, %sil
+;   jne 0x28
+;   movl $0, %eax
+;   jmp 0x2b
+;   idivb %sil ; trap: int_divz
+;   shrq $8, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f2(i16, i16) -> i16 {
+block0(v0: i16, v1: i16):
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   testw   %si, %si
+;   jnz ; ud2 int_divz ;
+;   movq    %rdi, %rax
+;   cwd %ax, %dx
+;   checked_srem_seq %ax, %dx, %si, %ax, %dx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   testw %si, %si
+;   jne 0xf
+;   ud2 ; trap: int_divz
+;   movq %rdi, %rax
+;   cwtd
+;   cmpw $-1, %si
+;   jne 0x28
+;   movl $0, %edx
+;   jmp 0x2b
+;   idivw %si ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f3(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   testl   %esi, %esi
+;   jnz ; ud2 int_divz ;
+;   movq    %rdi, %rax
+;   cdq %eax, %edx
+;   checked_srem_seq %eax, %edx, %esi, %eax, %edx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   testl %esi, %esi
+;   jne 0xe
+;   ud2 ; trap: int_divz
+;   movq %rdi, %rax
+;   cltd
+;   cmpl $-1, %esi
+;   jne 0x25
+;   movl $0, %edx
+;   jmp 0x27
+;   idivl %esi ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f4(i64, i64) -> i64 {
+block0(v0: i64, v1: i64):
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   testq   %rsi, %rsi
+;   jnz ; ud2 int_divz ;
+;   movq    %rdi, %rax
+;   cqo %rax, %rdx
+;   checked_srem_seq %rax, %rdx, %rsi, %rax, %rdx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   testq %rsi, %rsi
+;   jne 0xf
+;   ud2 ; trap: int_divz
+;   movq %rdi, %rax
+;   cqto
+;   cmpq $-1, %rsi
+;   jne 0x28
+;   movl $0, %edx
+;   jmp 0x2b
+;   idivq %rsi ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i8_imm(i8) -> i8 {
+block0(v0: i8):
+  v1 = iconst.i8 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cbw %al, %al
+;   movl    $17, %edx
+;   idiv    %al, %dl, %al
+;   shrq    $8, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cbtw
+;   movl $0x11, %edx
+;   idivb %dl ; trap: int_divz
+;   shrq $8, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i16_imm(i16) -> i16 {
+block0(v0: i16):
+  v1 = iconst.i16 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cwd %ax, %dx
+;   movl    $17, %r8d
+;   idiv    %ax, %dx, %r8w, %ax, %dx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cwtd
+;   movl $0x11, %r8d
+;   idivw %r8w ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i32_imm(i32) -> i32 {
+block0(v0: i32):
+  v1 = iconst.i32 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cdq %eax, %edx
+;   movl    $17, %r8d
+;   idiv    %eax, %edx, %r8d, %eax, %edx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cltd
+;   movl $0x11, %r8d
+;   idivl %r8d ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i64_imm(i64) -> i64 {
+block0(v0: i64):
+  v1 = iconst.i64 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cqo %rax, %rdx
+;   movl    $17, %r8d
+;   idiv    %rax, %rdx, %r8, %rax, %rdx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cqto
+;   movl $0x11, %r8d
+;   idivq %r8 ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+

cranelift/filetests/filetests/isa/x64/srem.clif

@@ -12,8 +12,8 @@ block0(v0: i8, v1: i8):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %al, %dl, %sil, %al, %dl, tmp=(none)
+;   cbw %al, %al
+;   checked_srem_seq %al, %sil, %al
 ;   shrq    $8, %rax, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -25,15 +25,11 @@ block0(v0: i8, v1: i8):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpb $0, %sil
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpb $0xff, %sil
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cbtw
+;   cmpb $0xff, %sil
+;   jne 0x1d
+;   movl $0, %eax
+;   jmp 0x20
 ;   idivb %sil ; trap: int_divz
 ;   shrq $8, %rax
 ;   movq %rbp, %rsp
@@ -51,8 +47,8 @@ block0(v0: i16, v1: i16):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %ax, %dx, %si, %ax, %dx, tmp=(none)
+;   cwd %ax, %dx
+;   checked_srem_seq %ax, %dx, %si, %ax, %dx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -64,15 +60,11 @@ block0(v0: i16, v1: i16):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpw $0, %si
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpw $-1, %si
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cwtd
+;   cmpw $-1, %si
+;   jne 0x1d
+;   movl $0, %edx
+;   jmp 0x20
 ;   idivw %si ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -90,8 +82,8 @@ block0(v0: i32, v1: i32):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %eax, %edx, %esi, %eax, %edx, tmp=(none)
+;   cdq %eax, %edx
+;   checked_srem_seq %eax, %edx, %esi, %eax, %edx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -103,15 +95,11 @@ block0(v0: i32, v1: i32):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpl $0, %esi
-;   jne 0x14
-;   ud2 ; trap: int_divz
-;   cmpl $-1, %esi
-;   jne 0x27
-;   movl $0, %eax
-;   jmp 0x2a
 ;   cltd
+;   cmpl $-1, %esi
+;   jne 0x1b
+;   movl $0, %edx
+;   jmp 0x1d
 ;   idivl %esi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -129,8 +117,8 @@ block0(v0: i64, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   xorl    %edx, %edx, %edx
-;   srem_seq %rax, %rdx, %rsi, %rax, %rdx, tmp=(none)
+;   cqo %rax, %rdx
+;   checked_srem_seq %rax, %rdx, %rsi, %rax, %rdx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -142,18 +130,150 @@ block0(v0: i64, v1: i64):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   xorl %edx, %edx
-;   cmpq $0, %rsi
-;   jne 0x15
-;   ud2 ; trap: int_divz
-;   cmpq $-1, %rsi
-;   jne 0x29
-;   movl $0, %eax
-;   jmp 0x2e
 ;   cqto
+;   cmpq $-1, %rsi
+;   jne 0x1d
+;   movl $0, %edx
+;   jmp 0x20
 ;   idivq %rsi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
 
+function %i8_imm(i8) -> i8 {
+block0(v0: i8):
+  v1 = iconst.i8 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cbw %al, %al
+;   movl    $17, %edx
+;   idiv    %al, %dl, %al
+;   shrq    $8, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cbtw
+;   movl $0x11, %edx
+;   idivb %dl ; trap: int_divz
+;   shrq $8, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i16_imm(i16) -> i16 {
+block0(v0: i16):
+  v1 = iconst.i16 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cwd %ax, %dx
+;   movl    $17, %r8d
+;   idiv    %ax, %dx, %r8w, %ax, %dx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cwtd
+;   movl $0x11, %r8d
+;   idivw %r8w ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i32_imm(i32) -> i32 {
+block0(v0: i32):
+  v1 = iconst.i32 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cdq %eax, %edx
+;   movl    $17, %r8d
+;   idiv    %eax, %edx, %r8d, %eax, %edx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cltd
+;   movl $0x11, %r8d
+;   idivl %r8d ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i64_imm(i64) -> i64 {
+block0(v0: i64):
+  v1 = iconst.i64 17
+  v2 = srem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   cqo %rax, %rdx
+;   movl    $17, %r8d
+;   idiv    %rax, %rdx, %r8, %rax, %rdx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   cqto
+;   movl $0x11, %r8d
+;   idivq %r8 ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+

cranelift/filetests/filetests/isa/x64/udiv-checked.clif

@@ -0,0 +1,264 @@
+test compile precise-output
+set avoid_div_traps=true
+target x86_64
+
+function %f1(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movzbl  %dil, %eax
+;   testb   %sil, %sil
+;   jnz ; ud2 int_divz ;
+;   div     %al, %sil, %al
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movzbl %dil, %eax
+;   testb %sil, %sil
+;   jne 0x13
+;   ud2 ; trap: int_divz
+;   divb %sil ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f2(i16, i16) -> i16 {
+block0(v0: i16, v1: i16):
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testw   %si, %si
+;   jnz ; ud2 int_divz ;
+;   div     %ax, %dx, %si, %ax, %dx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testw %si, %si
+;   jne 0x15
+;   ud2 ; trap: int_divz
+;   divw %si ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f3(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testl   %esi, %esi
+;   jnz ; ud2 int_divz ;
+;   div     %eax, %edx, %esi, %eax, %edx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testl %esi, %esi
+;   jne 0x14
+;   ud2 ; trap: int_divz
+;   divl %esi ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f4(i64, i64) -> i64 {
+block0(v0: i64, v1: i64):
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testq   %rsi, %rsi
+;   jnz ; ud2 int_divz ;
+;   div     %rax, %rdx, %rsi, %rax, %rdx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testq %rsi, %rsi
+;   jne 0x15
+;   ud2 ; trap: int_divz
+;   divq %rsi ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i8_imm(i8) -> i8 {
+block0(v0: i8):
+  v1 = iconst.i8 17
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movzbl  %dil, %eax
+;   movl    $17, %edx
+;   div     %al, %dl, %al
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movzbl %dil, %eax
+;   movl $0x11, %edx
+;   divb %dl ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i16_imm(i16) -> i16 {
+block0(v0: i16):
+  v1 = iconst.i16 17
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %ax, %dx, %r8w, %ax, %dx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divw %r8w ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i32_imm(i32) -> i32 {
+block0(v0: i32):
+  v1 = iconst.i32 17
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %eax, %edx, %r8d, %eax, %edx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divl %r8d ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i64_imm(i64) -> i64 {
+block0(v0: i64):
+  v1 = iconst.i64 17
+  v2 = udiv v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %rax, %rdx, %r8, %rax, %rdx
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divq %r8 ; trap: int_divz
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+

cranelift/filetests/filetests/isa/x64/udiv.clif

@@ -12,7 +12,7 @@ block0(v0: i8, v1: i8):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movzbl  %dil, %eax
-;   div     %al, (none), %sil, %al, (none)
+;   div     %al, %sil, %al
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -39,7 +39,7 @@ block0(v0: i16, v1: i16):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %ax, %dx, %si, %ax, %dx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -51,7 +51,7 @@ block0(v0: i16, v1: i16):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divw %si ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -68,7 +68,7 @@ block0(v0: i32, v1: i32):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %eax, %edx, %esi, %eax, %edx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -80,7 +80,7 @@ block0(v0: i32, v1: i32):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divl %esi ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp
@@ -97,7 +97,7 @@ block0(v0: i64, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %rax, %rdx, %rsi, %rax, %rdx
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -109,7 +109,7 @@ block0(v0: i64, v1: i64):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divq %rsi ; trap: int_divz
 ;   movq %rbp, %rsp
 ;   popq %rbp

cranelift/filetests/filetests/isa/x64/udivrem.clif

@@ -15,13 +15,13 @@ block0(v0: i8, v1: i8):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movzbl  %dil, %eax
-;   div     %al, (none), %sil, %al, (none)
-;   movq    %rax, %rcx
+;   div     %al, %sil, %al
+;   movq    %rax, %r11
 ;   movzbl  %dil, %eax
-;   div     %al, (none), %sil, %al, (none)
+;   div     %al, %sil, %al
 ;   movq    %rax, %rdx
 ;   shrq    $8, %rdx, %rdx
-;   movq    %rcx, %rax
+;   movq    %r11, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -33,12 +33,12 @@ block0(v0: i8, v1: i8):
 ; block1: ; offset 0x4
 ;   movzbl %dil, %eax
 ;   divb %sil ; trap: int_divz
-;   movq %rax, %rcx
+;   movq %rax, %r11
 ;   movzbl %dil, %eax
 ;   divb %sil ; trap: int_divz
 ;   movq %rax, %rdx
 ;   shrq $8, %rdx
-;   movq %rcx, %rax
+;   movq %r11, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
@@ -54,15 +54,14 @@ block0(v0: i16, v1: i16):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   movq    %rdi, %rax
 ;   div     %ax, %dx, %si, %ax, %dx
-;   movq    %rdi, %rcx
-;   movq    %rax, %r8
-;   movl    $0, %edx
-;   movq    %rcx, %rax
+;   movq    %rax, %rcx
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %ax, %dx, %si, %ax, %dx
-;   movq    %r8, %rax
+;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -72,15 +71,14 @@ block0(v0: i16, v1: i16):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   movq %rdi, %rax
 ;   divw %si ; trap: int_divz
-;   movq %rdi, %rcx
-;   movq %rax, %r8
-;   movl $0, %edx
-;   movq %rcx, %rax
+;   movq %rax, %rcx
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
 ;   divw %si ; trap: int_divz
-;   movq %r8, %rax
+;   movq %rcx, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
@@ -96,15 +94,14 @@ block0(v0: i32, v1: i32):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   movq    %rdi, %rax
 ;   div     %eax, %edx, %esi, %eax, %edx
-;   movq    %rdi, %rcx
-;   movq    %rax, %r8
-;   movl    $0, %edx
-;   movq    %rcx, %rax
+;   movq    %rax, %rcx
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %eax, %edx, %esi, %eax, %edx
-;   movq    %r8, %rax
+;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -114,15 +111,14 @@ block0(v0: i32, v1: i32):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   movq %rdi, %rax
 ;   divl %esi ; trap: int_divz
-;   movq %rdi, %rcx
-;   movq %rax, %r8
-;   movl $0, %edx
-;   movq %rcx, %rax
+;   movq %rax, %rcx
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
 ;   divl %esi ; trap: int_divz
-;   movq %r8, %rax
+;   movq %rcx, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq
@@ -138,15 +134,14 @@ block0(v0: i64, v1: i64):
 ;   pushq   %rbp
 ;   movq    %rsp, %rbp
 ; block0:
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   movq    %rdi, %rax
 ;   div     %rax, %rdx, %rsi, %rax, %rdx
-;   movq    %rdi, %rcx
-;   movq    %rax, %r8
-;   movl    $0, %edx
-;   movq    %rcx, %rax
+;   movq    %rax, %rcx
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %rax, %rdx, %rsi, %rax, %rdx
-;   movq    %r8, %rax
+;   movq    %rcx, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
 ;   ret
@@ -156,15 +151,14 @@ block0(v0: i64, v1: i64):
 ;   pushq %rbp
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   movq %rdi, %rax
 ;   divq %rsi ; trap: int_divz
-;   movq %rdi, %rcx
-;   movq %rax, %r8
-;   movl $0, %edx
-;   movq %rcx, %rax
+;   movq %rax, %rcx
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
 ;   divq %rsi ; trap: int_divz
-;   movq %r8, %rax
+;   movq %rcx, %rax
 ;   movq %rbp, %rsp
 ;   popq %rbp
 ;   retq

cranelift/filetests/filetests/isa/x64/urem-checked.clif

@@ -0,0 +1,280 @@
+test compile precise-output
+set avoid_div_traps=true
+target x86_64
+
+function %f1(i8, i8) -> i8 {
+block0(v0: i8, v1: i8):
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movzbl  %dil, %eax
+;   testb   %sil, %sil
+;   jnz ; ud2 int_divz ;
+;   div     %al, %sil, %al
+;   shrq    $8, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movzbl %dil, %eax
+;   testb %sil, %sil
+;   jne 0x13
+;   ud2 ; trap: int_divz
+;   divb %sil ; trap: int_divz
+;   shrq $8, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f2(i16, i16) -> i16 {
+block0(v0: i16, v1: i16):
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testw   %si, %si
+;   jnz ; ud2 int_divz ;
+;   div     %ax, %dx, %si, %ax, %dx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testw %si, %si
+;   jne 0x15
+;   ud2 ; trap: int_divz
+;   divw %si ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f3(i32, i32) -> i32 {
+block0(v0: i32, v1: i32):
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testl   %esi, %esi
+;   jnz ; ud2 int_divz ;
+;   div     %eax, %edx, %esi, %eax, %edx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testl %esi, %esi
+;   jne 0x14
+;   ud2 ; trap: int_divz
+;   divl %esi ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %f4(i64, i64) -> i64 {
+block0(v0: i64, v1: i64):
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   testq   %rsi, %rsi
+;   jnz ; ud2 int_divz ;
+;   div     %rax, %rdx, %rsi, %rax, %rdx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   testq %rsi, %rsi
+;   jne 0x15
+;   ud2 ; trap: int_divz
+;   divq %rsi ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i8_imm(i8) -> i8 {
+block0(v0: i8):
+  v1 = iconst.i8 17
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movzbl  %dil, %eax
+;   movl    $17, %edx
+;   div     %al, %dl, %al
+;   shrq    $8, %rax, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movzbl %dil, %eax
+;   movl $0x11, %edx
+;   divb %dl ; trap: int_divz
+;   shrq $8, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i16_imm(i16) -> i16 {
+block0(v0: i16):
+  v1 = iconst.i16 17
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %ax, %dx, %r8w, %ax, %dx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divw %r8w ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i32_imm(i32) -> i32 {
+block0(v0: i32):
+  v1 = iconst.i32 17
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %eax, %edx, %r8d, %eax, %edx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divl %r8d ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+
+function %i64_imm(i64) -> i64 {
+block0(v0: i64):
+  v1 = iconst.i64 17
+  v2 = urem v0, v1
+  return v2
+}
+
+; VCode:
+;   pushq   %rbp
+;   movq    %rsp, %rbp
+; block0:
+;   movq    %rdi, %rax
+;   xorq    %rdx, %rdx, %rdx
+;   movl    $17, %r8d
+;   div     %rax, %rdx, %r8, %rax, %rdx
+;   movq    %rdx, %rax
+;   movq    %rbp, %rsp
+;   popq    %rbp
+;   ret
+; 
+; Disassembled:
+; block0: ; offset 0x0
+;   pushq %rbp
+;   movq %rsp, %rbp
+; block1: ; offset 0x4
+;   movq %rdi, %rax
+;   xorq %rdx, %rdx
+;   movl $0x11, %r8d
+;   divq %r8 ; trap: int_divz
+;   movq %rdx, %rax
+;   movq %rbp, %rsp
+;   popq %rbp
+;   retq
+

cranelift/filetests/filetests/isa/x64/urem.clif

@@ -12,7 +12,7 @@ block0(v0: i8, v1: i8):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movzbl  %dil, %eax
-;   div     %al, (none), %sil, %al, (none)
+;   div     %al, %sil, %al
 ;   shrq    $8, %rax, %rax
 ;   movq    %rbp, %rsp
 ;   popq    %rbp
@@ -41,7 +41,7 @@ block0(v0: i16, v1: i16):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %ax, %dx, %si, %ax, %dx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -54,7 +54,7 @@ block0(v0: i16, v1: i16):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divw %si ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -72,7 +72,7 @@ block0(v0: i32, v1: i32):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %eax, %edx, %esi, %eax, %edx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -85,7 +85,7 @@ block0(v0: i32, v1: i32):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divl %esi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp
@@ -103,7 +103,7 @@ block0(v0: i64, v1: i64):
 ;   movq    %rsp, %rbp
 ; block0:
 ;   movq    %rdi, %rax
-;   movl    $0, %edx
+;   xorq    %rdx, %rdx, %rdx
 ;   div     %rax, %rdx, %rsi, %rax, %rdx
 ;   movq    %rdx, %rax
 ;   movq    %rbp, %rsp
@@ -116,7 +116,7 @@ block0(v0: i64, v1: i64):
 ;   movq %rsp, %rbp
 ; block1: ; offset 0x4
 ;   movq %rdi, %rax
-;   movl $0, %edx
+;   xorq %rdx, %rdx
 ;   divq %rsi ; trap: int_divz
 ;   movq %rdx, %rax
 ;   movq %rbp, %rsp