Use BB-like EBB in filetests/licm/*.clif

cranelift/filetests/filetests/licm/basic.clif

@@ -10,11 +10,14 @@ ebb1(v1: i32):
     v2 = iconst.i32 1
     v3 = iconst.i32 2
     v4 = iadd v2, v3
-    brz v1, ebb2(v1)
+    brz v1, ebb3(v1)
+    jump ebb2
+
+ebb2:
     v5 = isub v1, v2
     jump ebb1(v5)
 
-ebb2(v6: i32):
+ebb3(v6: i32):
     return v6
 
 }
@@ -26,10 +29,13 @@ ebb2(v6: i32):
 ; nextln:     jump ebb1(v0)
 ; nextln: 
 ; nextln: ebb1(v1: i32):
-; nextln:     brz v1, ebb2(v1)
-; nextln:     v5 = isub v1, v2
+; nextln:     brz v1, ebb3(v1)
+; nextln:     jump ebb2
+; nextln: 
+; nextln: ebb2:
+; nextln:     v5 = isub.i32 v1, v2
 ; nextln:     jump ebb1(v5)
 ; nextln: 
-; nextln: ebb2(v6: i32):
+; nextln: ebb3(v6: i32):
 ; nextln:     return v6
 ; nextln: }

cranelift/filetests/filetests/licm/complex.clif

@@ -39,6 +39,9 @@ ebb0(v0: i32):
             v19 = iadd v18, v2
             v20 = iadd.i32 v2, v3
 [SBzero#18] brz.i32 v1, ebb1(v20)
+            fallthrough ebb7
+
+         ebb7:
 [Iret#19]   return v19
 }
 
@@ -53,10 +56,10 @@ ebb0(v0: i32):
 ; nextln: 
 ; nextln: ebb1(v1: i32):
 ; nextln:     v4 = iadd.i32 v2, v1
-; nextln:     brz v1, ebb7(v2)
-; nextln:     jump ebb8(v4)
+; nextln:     brz v1, ebb8(v2)
+; nextln:     jump ebb9(v4)
 ; nextln: 
-; nextln: ebb7(v21: i32):
+; nextln: ebb8(v21: i32):
 ; nextln:     v8 = iadd.i32 v6, v1
 ; nextln:     v11 = iadd.i32 v1, v4
 ; nextln:     jump ebb2(v21)
@@ -70,7 +73,7 @@ ebb0(v0: i32):
 ; nextln:     brz.i32 v1, ebb2(v9)
 ; nextln:     jump ebb6(v10)
 ; nextln: 
-; nextln: ebb8(v22: i32):
+; nextln: ebb9(v22: i32):
 ; nextln:     v15 = iadd.i32 v4, v13
 ; nextln:     jump ebb4(v22)
 ; nextln: 
@@ -86,5 +89,8 @@ ebb0(v0: i32):
 ; nextln: ebb6(v18: i32):
 ; nextln:     v19 = iadd v18, v2
 ; nextln:     brz.i32 v1, ebb1(v20)
+; nextln:     fallthrough ebb7
+; nextln: 
+; nextln: ebb7:
 ; nextln:     return v19
 ; nextln: }

cranelift/filetests/filetests/licm/critical-edge.clif

@@ -6,37 +6,49 @@ target riscv32
 function %critical_edge(i32, i32) -> i32 {
 
             ebb0(v0: i32, v7: i32):
-[SBzero#38]   brnz v7, ebb1(v0)
+[SBzero#38]   brnz v7, ebb2(v0)
+[-]           fallthrough ebb1
+
+            ebb1:
 [Iret#19]     return v0
 
-            ebb1(v1: i32):
+            ebb2(v1: i32):
               v2 = iconst.i32 1
               v3 = iconst.i32 2
               v4 = iadd v2, v3
-[SBzero#18]   brz v1, ebb2(v1)
-              v5 = isub v1, v2
-[UJ#1b]       jump ebb1(v5)
+[SBzero#18]   brz v1, ebb4(v1)
+[UJ#1b]       jump ebb3
 
-            ebb2(v6: i32):
+            ebb3:
+              v5 = isub v1, v2
+[UJ#1b]       jump ebb2(v5)
+
+            ebb4(v6: i32):
 [Iret#19]     return v6
 
 }
 ; sameln: function %critical_edge
 ; nextln: ebb0(v0: i32, v7: i32):
-; nextln:     brnz v7, ebb3(v0)
+; nextln:     brnz v7, ebb5(v0)
+; nextln:     fallthrough ebb1
+; nextln: 
+; nextln: ebb1:
 ; nextln:     return v0
 ; nextln: 
-; nextln: ebb3(v8: i32):
+; nextln: ebb5(v8: i32):
 ; nextln:     v2 = iconst.i32 1
 ; nextln:     v3 = iconst.i32 2
 ; nextln:     v4 = iadd v2, v3
-; nextln:     jump ebb1(v8)
+; nextln:     jump ebb2(v8)
 ; nextln: 
-; nextln: ebb1(v1: i32):
-; nextln:     brz v1, ebb2(v1)
-; nextln:     v5 = isub v1, v2
-; nextln:     jump ebb1(v5)
+; nextln: ebb2(v1: i32):
+; nextln:     brz v1, ebb4(v1)
+; nextln:     jump ebb3
 ; nextln: 
-; nextln: ebb2(v6: i32):
+; nextln: ebb3:
+; nextln:     v5 = isub.i32 v1, v2
+; nextln:     jump ebb2(v5)
+; nextln: 
+; nextln: ebb4(v6: i32):
 ; nextln:     return v6
 ; nextln: }

cranelift/filetests/filetests/licm/encoding.clif

@@ -11,11 +11,14 @@ function %simple_loop(i32) -> i32 {
 [Iz#04,%x0]   v2 = iconst.i32 1
 [Iz#04,%x1]   v3 = iconst.i32 2
 [R#0c,%x2]    v4 = iadd v2, v3
-[SBzero#18]   brz v1, ebb2(v1)
+[SBzero#18]   brz v1, ebb3(v1)
+[UJ#1b]       jump ebb2
+
+            ebb2:
 [R#200c,%x5]  v5 = isub v1, v2
 [UJ#1b]       jump ebb1(v5)
 
-            ebb2(v6: i32):
+            ebb3(v6: i32):
 [Iret#19]     return v6
 }
 
@@ -27,10 +30,13 @@ function %simple_loop(i32) -> i32 {
 ; nextln: [UJ#1b]                             jump ebb1(v0)
 ; nextln: 
 ; nextln:                                 ebb1(v1: i32):
-; nextln: [SBzero#18]                         brz v1, ebb2(v1)
-; nextln: [R#200c,%x5]                        v5 = isub v1, v2
+; nextln: [SBzero#18]                         brz v1, ebb3(v1)
+; nextln: [UJ#1b]                             jump ebb2
+; nextln: 
+; nextln:                                 ebb2:
+; nextln: [R#200c,%x5]                        v5 = isub.i32 v1, v2
 ; nextln: [UJ#1b]                             jump ebb1(v5)
 ; nextln: 
-; nextln:                                 ebb2(v6: i32):
+; nextln:                                 ebb3(v6: i32):
 ; nextln: [Iret#19]                           return v6
 ; nextln: }

cranelift/filetests/filetests/licm/load_readonly_notrap.clif

@@ -18,11 +18,14 @@ ebb1(v2: i32, v3: i64):
     v5 = heap_addr.i64 heap0, v4, 1
     v6 = load.i32 notrap aligned readonly v5
     v7 = iadd v2, v6
-    brz v2, ebb2(v2)
+    brz v2, ebb3(v2)
+    jump ebb2
+
+ebb2:
     v8 = isub v2, v4
     jump ebb1(v8, v3)
 
-ebb2(v9: i32):
+ebb3(v9: i32):
     return v9
 }
 
@@ -39,10 +42,13 @@ ebb2(v9: i32):
 ; nextln: 
 ; nextln: ebb1(v2: i32, v3: i64):
 ; nextln:    v7 = iadd v2, v6
-; nextln:    brz v2, ebb2(v2)
-; nextln:    v8 = isub v2, v4
+; nextln:    brz v2, ebb3(v2)
+; nextln:     jump ebb2
+; nextln: 
+; nextln: ebb2:
+; nextln:    v8 = isub.i32 v2, v4
 ; nextln:    jump ebb1(v8, v3)
 ; nextln: 
-; nextln: ebb2(v9: i32):
+; nextln: ebb3(v9: i32):
 ; nextln:    return v9
 ; nextln: }

cranelift/filetests/filetests/licm/multiple-blocks.clif

@@ -10,16 +10,22 @@ ebb1(v10: i32):
     v11 = iconst.i32 1
     v12 = iconst.i32 2
     v13 = iadd v11, v12
-    brz v10, ebb2(v10)
+    brz v10, ebb4(v10)
+    jump ebb2
+
+ebb2:
     v15 = isub v10, v11
-    brz v15, ebb3(v15)
+    brz v15, ebb5(v15)
+    jump ebb3
+
+ebb3:
     v14 = isub v10, v11
     jump ebb1(v14)
 
-ebb2(v20: i32):
+ebb4(v20: i32):
     return v20
 
-ebb3(v30: i32):
+ebb5(v30: i32):
     v31 = iadd v11, v13
     jump ebb1(v30)
 
@@ -33,15 +39,21 @@ ebb3(v30: i32):
 ; nextln:     jump ebb1(v0)
 ; nextln: 
 ; nextln: ebb1(v10: i32):
-; nextln:     brz v10, ebb2(v10)
-; nextln:     v15 = isub v10, v11
-; nextln:     brz v15, ebb3(v15)
-; nextln:     v14 = isub v10, v11
+; nextln:     brz v10, ebb4(v10)
+; nextln:     jump ebb2
+; nextln: 
+; nextln: ebb2:
+; nextln:     v15 = isub.i32 v10, v11
+; nextln:     brz v15, ebb5(v15)
+; nextln:     jump ebb3
+; nextln: 
+; nextln: ebb3:
+; nextln:     v14 = isub.i32 v10, v11
 ; nextln:     jump ebb1(v14)
 ; nextln: 
-; nextln: ebb2(v20: i32):
+; nextln: ebb4(v20: i32):
 ; nextln:     return v20
 ; nextln: 
-; nextln: ebb3(v30: i32):
+; nextln: ebb5(v30: i32):
 ; nextln:     jump ebb1(v30)
 ; nextln: }

cranelift/filetests/filetests/licm/nested_loops.clif

@@ -14,17 +14,20 @@ ebb1(v1: i32):
     jump ebb2(v5, v5)
 
 ebb2(v10: i32, v11: i32):
-    brz v11, ebb3(v10)
+    brz v11, ebb4(v10)
+    jump ebb3
+
+ebb3:
     v12 = iconst.i32 1
     v15 = iadd v12, v5
     v13 = isub v11, v12
     jump ebb2(v10,v13)
 
-ebb3(v20: i32):
-    brz v20, ebb4(v20)
+ebb4(v20: i32):
+    brz v20, ebb5(v20)
     jump ebb1(v20)
 
-ebb4(v30: i32):
+ebb5(v30: i32):
     return v30
 
 }
@@ -43,14 +46,17 @@ ebb4(v30: i32):
 ; nextln:     jump ebb2(v5, v5)
 ; nextln: 
 ; nextln: ebb2(v10: i32, v11: i32):
-; nextln:     brz v11, ebb3(v10)
-; nextln:     v13 = isub v11, v12
+; nextln:     brz v11, ebb4(v10)
+; nextln:     jump ebb3
+; nextln: 
+; nextln: ebb3:
+; nextln:     v13 = isub.i32 v11, v12
 ; nextln:     jump ebb2(v10, v13)
 ; nextln: 
-; nextln: ebb3(v20: i32):
-; nextln:     brz v20, ebb4(v20)
+; nextln: ebb4(v20: i32):
+; nextln:     brz v20, ebb5(v20)
 ; nextln:     jump ebb1(v20)
 ; nextln: 
-; nextln: ebb4(v30: i32):
+; nextln: ebb5(v30: i32):
 ; nextln:     return v30
 ; nextln: }

cranelift/filetests/filetests/licm/reject.clif

@@ -11,11 +11,14 @@ ebb1(v1: i32):
 ; check: ebb1(v1: i32):
 ; check: regmove.i32 v0, %x10 -> %x20
     v2 = iconst.i32 1
-    brz v1, ebb2(v1)
+    brz v1, ebb3(v1)
+    jump ebb2
+
+ebb2:
     v5 = isub v1, v2
     jump ebb1(v5)
 
-ebb2(v6: i32):
+ebb3(v6: i32):
     return v6
 
 }
@@ -31,12 +34,15 @@ ebb1(v2: i32, v3: i32):
 ; check: ifcmp.i32 v0, v1
 ; check: v5 = selectif.i32 eq v4, v2, v3
     v8 = iconst.i32 1
-    brz v1, ebb2(v1)
+    brz v1, ebb3(v1)
+    jump ebb2
+
+ebb2:
     v9 = isub v1, v8
     v10 = iadd v1, v8
     jump ebb1(v9, v10)
 
-ebb2(v6: i32):
+ebb3(v6: i32):
     return v6
 }
 
@@ -53,11 +59,14 @@ ebb1(v3: i32, v4: i32):
 ; check: v5 = spill.i32 v1
 ; check: v6 = fill.i32 v2
 ; check: v7 = fill v5
-    brz v1, ebb2(v1)
+    brz v1, ebb3(v1)
+    jump ebb2
+
+ebb2:
     v9 = isub v1, v4
     jump ebb1(v9, v3)
 
-ebb2(v10: i32):
+ebb3(v10: i32):
     return v10
 }
 
@@ -72,11 +81,14 @@ ebb1(v1: i32):
     v2 = iadd v8, v9
 ; check: ebb1(v1: i32):
 ; check: v2 = iadd v8, v9
-    brz v1, ebb2(v1)
+    brz v1, ebb3(v1)
+    jump ebb2
+
+ebb2:
     v5 = isub v1, v2
     jump ebb1(v5)
 
-ebb2(v6: i32):
+ebb3(v6: i32):
     return v6
 
 }

cranelift/filetests/filetests/licm/reject_load_notrap.clif

@@ -19,11 +19,14 @@ ebb0(v0: i32, v1: i64):
 ebb1(v2: i32, v3: i64):
     v6 = load.i32 notrap aligned v5
     v7 = iadd v2, v6
-    brz v2, ebb2(v2)
+    brz v2, ebb3(v2)
+    jump ebb2
+
+ebb2:
     v8 = isub v2, v4
     jump ebb1(v8, v3)
 
-ebb2(v9: i32):
+ebb3(v9: i32):
     return v9
 }
 
@@ -40,10 +43,13 @@ ebb2(v9: i32):
 ; nextln: ebb1(v2: i32, v3: i64):
 ; nextln:    v6 = load.i32 notrap aligned v5
 ; nextln:    v7 = iadd v2, v6
-; nextln:    brz v2, ebb2(v2)
-; nextln:    v8 = isub v2, v4
+; nextln:    brz v2, ebb3(v2)
+; nextln:    jump ebb2
+; nextln: 
+; nextln: ebb2:
+; nextln:    v8 = isub.i32 v2, v4
 ; nextln:    jump ebb1(v8, v3)
 ; nextln: 
-; nextln: ebb2(v9: i32):
+; nextln: ebb3(v9: i32):
 ; nextln:    return v9
 ; nextln: }

cranelift/filetests/filetests/licm/reject_load_readonly.clif

@@ -19,11 +19,14 @@ ebb1(v2: i32, v3: i64):
     v5 = heap_addr.i64 heap0, v4, 1
     v6 = load.i32 aligned readonly v5
     v7 = iadd v2, v6
-    brz v2, ebb2(v2)
+    brz v2, ebb3(v2)
+    jump ebb2
+
+ebb2:
     v8 = isub v2, v4
     jump ebb1(v8, v3)
 
-ebb2(v9: i32):
+ebb3(v9: i32):
     return v9
 }
 
@@ -40,10 +43,13 @@ ebb2(v9: i32):
 ; nextln: ebb1(v2: i32, v3: i64):
 ; nextln:    v6 = load.i32 aligned readonly v5
 ; nextln:    v7 = iadd v2, v6
-; nextln:    brz v2, ebb2(v2)
-; nextln:    v8 = isub v2, v4
+; nextln:    brz v2, ebb3(v2)
+; nextln:    jump ebb2
+; nextln: 
+; nextln: ebb2:
+; nextln:    v8 = isub.i32 v2, v4
 ; nextln:    jump ebb1(v8, v3)
 ; nextln: 
-; nextln: ebb2(v9: i32):
+; nextln: ebb3(v9: i32):
 ; nextln:    return v9
 ; nextln: }