43 lines
1.3 KiB
Plaintext
43 lines
1.3 KiB
Plaintext
test licm
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target riscv32
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; Ensure that instructions emitted by LICM get encodings.
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function %simple_loop(i32) -> i32 {
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ebb0(v0: i32):
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[UJ#1b] jump ebb1(v0)
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ebb1(v1: i32):
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[Iz#04,%x0] v2 = iconst.i32 1
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[Iz#04,%x1] v3 = iconst.i32 2
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[R#0c,%x2] v4 = iadd v2, v3
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[SBzero#18] brz v1, ebb3(v1)
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[UJ#1b] jump ebb2
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ebb2:
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[R#200c,%x5] v5 = isub v1, v2
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[UJ#1b] jump ebb1(v5)
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ebb3(v6: i32):
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[Iret#19] return v6
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}
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; check: function
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; nextln: ebb0(v0: i32):
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; nextln: [Iz#04,%x0] v2 = iconst.i32 1
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; nextln: [Iz#04,%x1] v3 = iconst.i32 2
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; nextln: [R#0c,%x2] v4 = iadd v2, v3
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; nextln: [UJ#1b] jump ebb1(v0)
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; nextln:
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; nextln: ebb1(v1: i32):
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; nextln: [SBzero#18] brz v1, ebb3(v1)
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; nextln: [UJ#1b] jump ebb2
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; nextln:
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; nextln: ebb2:
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; nextln: [R#200c,%x5] v5 = isub.i32 v1, v2
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; nextln: [UJ#1b] jump ebb1(v5)
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; nextln:
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; nextln: ebb3(v6: i32):
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; nextln: [Iret#19] return v6
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; nextln: }
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