MachInst backend: don't reallocate RealRegUniverses for each function

compilation.

This saves ~0.14% instruction count, ~0.18% allocated bytes, and ~1.5%
allocated blocks on a `clif-util wasm` compilation of `bz2.wasm` for
aarch64.

cranelift/codegen/src/machinst/compile.rs

@@ -10,7 +10,7 @@ use regalloc::{allocate_registers_with_opts, Algorithm, Options};
 
 /// Compile the given function down to VCode with allocated registers, ready
 /// for binary emission.
-pub fn compile<B: LowerBackend>(
+pub fn compile<B: LowerBackend + MachBackend>(
     f: &Function,
     b: &B,
     abi: Box<dyn ABIBody<I = B::MInst>>,
@@ -21,9 +21,10 @@ where
     // This lowers the CL IR.
     let mut vcode = Lower::new(f, abi)?.lower(b)?;
 
-    let universe = &B::MInst::reg_universe(vcode.flags());
-
-    debug!("vcode from lowering: \n{}", vcode.show_rru(Some(universe)));
+    debug!(
+        "vcode from lowering: \n{}",
+        vcode.show_rru(Some(b.reg_universe()))
+    );
 
     // Perform register allocation.
     let (run_checker, algorithm) = match vcode.flags().regalloc() {
@@ -40,7 +41,7 @@ where
         let _tt = timing::regalloc();
         allocate_registers_with_opts(
             &mut vcode,
-            universe,
+            b.reg_universe(),
             Options {
                 run_checker,
                 algorithm,
@@ -49,7 +50,7 @@ where
         .map_err(|err| {
             debug!(
                 "Register allocation error for vcode\n{}\nError: {:?}",
-                vcode.show_rru(Some(universe)),
+                vcode.show_rru(Some(b.reg_universe())),
                 err
             );
             err
@@ -68,7 +69,7 @@ where
 
     debug!(
         "vcode after regalloc: final version:\n{}",
-        vcode.show_rru(Some(universe))
+        vcode.show_rru(Some(b.reg_universe()))
     );
 
     Ok(vcode)

cranelift/codegen/src/machinst/mod.rs

@@ -186,9 +186,6 @@ pub trait MachInst: Clone + Debug {
     /// BlockIndex.
     fn with_block_offsets(&mut self, my_offset: CodeOffset, targets: &[CodeOffset]);
 
-    /// Get the register universe for this backend.
-    fn reg_universe(flags: &Flags) -> RealRegUniverse;
-
     /// Align a basic block offset (from start of function).  By default, no
     /// alignment occurs.
     fn align_basic_block(offset: CodeOffset) -> CodeOffset {
@@ -264,7 +261,7 @@ pub trait MachBackend {
     fn name(&self) -> &'static str;
 
     /// Return the register universe for this backend.
-    fn reg_universe(&self) -> RealRegUniverse;
+    fn reg_universe(&self) -> &RealRegUniverse;
 
     /// Machine-specific condcode info needed by TargetIsa.
     fn unsigned_add_overflow_condition(&self) -> IntCC {