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  • e5cdc57743 parseinstrs: Minor simplification Alexis Engelke 2021-09-13 17:43:12 +02:00
  • bf0425f057 decode: Expose immediate in RVMR encodings Alexis Engelke 2021-09-13 17:38:24 +02:00
  • 7229f13742 parseinstrs: Don't generate 16-bit version for I66 Alexis Engelke 2021-09-13 17:28:49 +02:00
  • effc0c7e49 parseinstrs: Fold trie layers with only one child Alexis Engelke 2021-09-13 17:27:47 +02:00
  • 71c0daf581 instrs: Change operand format Alexis Engelke 2021-09-11 18:26:56 +02:00
  • e41d6c26f8 parseinstrs: Make superstring function generic Alexis Engelke 2021-09-11 13:19:17 +02:00
  • 1fcacdeda7 parseinstrs: Optimize mnemonic compression Alexis Engelke 2021-09-11 13:05:34 +02:00
  • e164803037 instrs: Support FRED instructions Alexis Engelke 2021-06-13 16:01:03 +02:00
  • 7df4c9542f format: Reduce size of register name table Alexis Engelke 2021-06-13 15:59:44 +02:00
  • 99a1fbeee1 format: Major refactoring for performance Alexis Engelke 2021-05-30 14:13:55 +02:00
  • 50f052488d decode: More precise register types Alexis Engelke 2021-04-02 14:23:18 +02:00
  • d67eb93148 general: Improve documentation Alexis Engelke 2021-04-02 11:31:28 +02:00
  • c99e860a5e tests: Add few more encode/decode cases Alexis Engelke 2021-04-02 11:27:41 +02:00
  • 4185d7b2d6 encode: Support FD/TD encodings Alexis Engelke 2021-04-02 11:26:12 +02:00
  • fa52782e76 encode: Enforce 15-byte limit Alexis Engelke 2021-04-02 11:00:24 +02:00
  • d9183228d0 encode: Actually encode LOCK prefix Alexis Engelke 2021-04-02 10:59:06 +02:00
  • 2d9587bc16 encode: Fix encoding of memory operand Alexis Engelke 2021-04-02 10:54:04 +02:00
  • 51ffe2598e ci: Fix GitHub CI Alexis Engelke 2021-03-28 15:17:35 +02:00
  • cf8d1be15f encode: Fix erroneous encoding of SREG push/pop Alexis Engelke 2021-03-23 13:25:30 +01:00
  • 5faa90a292 encode: Support RVMR encoding Alexis Engelke 2021-03-23 12:53:18 +01:00
  • 0521ff7d42 decode: Fix VBLENDVP[SD] opcodes Alexis Engelke 2021-03-23 12:52:37 +01:00
  • b5994b2f2d ci: Add build description for builds.sr.ht Alexis Engelke 2021-02-06 12:44:24 +01:00
  • 4f2366afd1 instrs: Add VIA PadLock and AMD RDPRU Alexis Engelke 2021-01-23 16:47:30 +01:00
  • f7567c89bd instrs: Fix VMOVSS/VMOVSD with memory operand Alexis Engelke 2021-01-23 16:44:16 +01:00
  • e8f440c713 instrs: Minor fix with mandatory prefixes Alexis Engelke 2021-01-23 16:43:52 +01:00
  • d7b9c97681 instrs: Remove MPX instructions Alexis Engelke 2021-01-23 16:18:12 +01:00
  • 0efd44cc28 instrs: Add some missing opcodes and FPU aliases Alexis Engelke 2021-01-23 16:17:42 +01:00
  • 103fc536b0 instrs: Fix operands of VRCPPS/VSQRTP[SD]/VRSQRTPS Alexis Engelke 2021-01-23 14:39:48 +01:00
  • f17d84cee6 format: Emit XACQUIRE/XRELEASE Alexis Engelke 2021-01-23 14:35:08 +01:00
  • ab63a3c921 instrs: Fix mandatory prefixes of CMPXCHG8B/16B Alexis Engelke 2021-01-23 14:30:45 +01:00
  • 7919b8115a format: Emit REP/REPNZ only for string instruction Alexis Engelke 2021-01-23 14:29:29 +01:00
  • fe68dbb743 decode: Fix LOCK handling for MOV CR/DR Alexis Engelke 2021-01-23 14:28:27 +01:00
  • 95371637ea format: Add names for bound registers Alexis Engelke 2021-01-23 14:05:42 +01:00
  • 363698db3b parseinstrs: Move decode table gen to new function Alexis Engelke 2021-01-23 13:31:29 +01:00
  • 85fdaa3a9b instrs: Remove incorrect NFx specifiers Alexis Engelke 2021-01-23 13:20:57 +01:00
  • dc399390a4 parseinstrs: Refactor mapping of opcode to Trie Alexis Engelke 2021-01-23 13:16:05 +01:00
  • 13a2456458 parseinstrs: Simplify trie implementation Alexis Engelke 2021-01-23 12:32:22 +01:00
  • 43910a6227 parseinstrs: Avoid redundant encoding of InstrDesc Alexis Engelke 2021-01-23 10:27:50 +01:00
  • 09d3886577 parseinstrs: Move regtype encoding to InstrDesc Alexis Engelke 2021-01-23 10:26:17 +01:00
  • d6278de812 parseinstrs: Use tuples/ints for indexing in trie Alexis Engelke 2021-01-23 10:25:23 +01:00
  • 1390bae341 parseinstr: Create optype string in descriptor Alexis Engelke 2021-01-22 11:18:09 +01:00
  • 801fe4bc43 parseinstrs: Generalize immediate size computation Alexis Engelke 2021-01-22 11:08:04 +01:00
  • 62018556a1 parseinstrs: Simplify operand kind parsing Alexis Engelke 2021-01-22 10:55:11 +01:00
  • bd611902b0 parseinstrs: Add separate ModRM indicator to desc Alexis Engelke 2021-01-16 14:37:30 +01:00
  • 8561d77c91 format: Minor non-functional changes Alexis Engelke 2021-01-10 18:55:05 +01:00
  • cb90c2c54d instr: Add weak NOP for PREFETCH register encoding Alexis Engelke 2021-01-10 18:54:18 +01:00
  • 9d7b584121 decode: Verify 3DNow! opcode validity Alexis Engelke 2021-01-10 18:53:32 +01:00
  • 80df5ff47c instrs: Add reserved NOP/PREFETCH as weak opcodes Alexis Engelke 2021-01-10 16:50:27 +01:00
  • f1e18c208c instrs: Add AMD-only MOVTNSS/MOVNTSD Alexis Engelke 2021-01-10 16:49:53 +01:00
  • 1458bf9673 encode: Support VEX-encoded instructions Alexis Engelke 2021-01-10 16:03:40 +01:00
  • 9245a97248 instrs: Add several AMD-only instructions Alexis Engelke 2021-01-10 15:18:44 +01:00
  • 51072cac9c format: Generalize ENTER/JMPF/CALLF op. formatting Alexis Engelke 2021-01-10 15:15:30 +01:00
  • c050b34ff9 instrs: Add support for undocumented instructions Alexis Engelke 2021-01-10 15:04:37 +01:00
  • b8decc8064 instrs: Add AMD encoding of SHL/6 and TEST/1 Alexis Engelke 2021-01-10 15:03:23 +01:00
  • fcb39f5cbe instrs: Add support for AESKL/AESKLE Alexis Engelke 2021-01-10 14:15:14 +01:00
  • 862b6d285c instrs: Minor operand size fixes Alexis Engelke 2021-01-10 14:13:44 +01:00
  • d40ee6db66 instrs: Add FLD and fix FUCOMIP instructions Alexis Engelke 2021-01-10 14:03:43 +01:00
  • c87264ace3 instrs: Add MMX PSHUFW instruction Alexis Engelke 2021-01-10 14:02:39 +01:00
  • dd4263b169 instrs: Support far jumps/calls encoded target Alexis Engelke 2021-01-10 12:31:07 +01:00
  • 2f295e5476 instrs: Exact register size for scalar VEX ops Alexis Engelke 2021-01-10 12:15:49 +01:00
  • 96e513c8ea breaking! instrs: Decode VMOVS[SD] loads correctly Alexis Engelke 2021-01-10 12:12:26 +01:00
  • e86ea540b5 instrs: Fixup register decoding for PEXTR* Alexis Engelke 2021-01-10 12:08:47 +01:00
  • a81582cc3a breaking! instrs: Decode MOVLHPS/MOVHLPS Alexis Engelke 2021-01-10 12:08:14 +01:00
  • af9188e267 parseinstrs: Respect mem-only/reg-only encodings Alexis Engelke 2021-01-10 12:02:08 +01:00
  • 111769832f format: Properly output VSIB encodings Alexis Engelke 2021-01-08 10:37:13 +01:00
  • 018a954b4c encode: Use macro for OPC_SEG mask Alexis Engelke 2021-01-07 10:20:00 +01:00
  • dfb28c923d encode: Make internal escape encoding more compact Alexis Engelke 2021-01-07 10:03:43 +01:00
  • 3fdbd70153 encode: Fix erroneous encoding of high registers Alexis Engelke 2021-01-07 10:03:17 +01:00
  • db183ee6f9 meson: Check compiler options and Python version Alexis Engelke 2021-01-05 20:13:25 +01:00
  • 84645afaac README: Add API for encoder Alexis Engelke 2021-01-03 21:23:24 +01:00
  • aefab34927 README: Update and include encoder Alexis Engelke 2021-01-03 21:19:36 +01:00
  • 44808e7b1a format: Format instructions with Intel syntax Alexis Engelke 2021-01-03 17:59:36 +01:00
  • d8c7ee94b7 instrs: Minor fixes to operand sizes Alexis Engelke 2021-01-03 17:50:49 +01:00
  • d2bf961b77 instrs: Properly handle PUSH/POP of SEG registers Alexis Engelke 2021-01-03 17:48:40 +01:00
  • 3a3a284f6f parseinstrs: Improve performance Alexis Engelke 2021-01-03 11:32:28 +01:00
  • 5a77c0e6eb parseinstrs: Use suffix tree to reduce mnem size Alexis Engelke 2021-01-03 09:42:01 +01:00
  • e82c9e20db build: Simplify Alexis Engelke 2021-01-02 16:27:28 +01:00
  • 90cce987f0 decode: Remove use of ARCH_* macros Alexis Engelke 2021-01-02 16:25:25 +01:00
  • 64a9984fa0 format: Add function fdi_name Alexis Engelke 2020-11-08 09:57:12 +01:00
  • 305eb9d568 decode: Inline ModRM decoding Alexis Engelke 2020-11-29 13:34:16 +01:00
  • aa1a39bd9d instrs: Check SREG validity using modreg table Alexis Engelke 2020-11-29 11:53:06 +01:00
  • 13e7e27640 decode: Minor non-functional changes Alexis Engelke 2020-11-29 10:03:11 +01:00
  • 7ab5a18cb0 instrs: Fix naming of some FMA instructions Alexis Engelke 2020-11-28 13:54:51 +01:00
  • 8976c7141a decode: Fix erroneous decoding of high-byte regs Alexis Engelke 2020-11-28 13:54:19 +01:00
  • 757acf18c3 decode: Minor performance improvements Alexis Engelke 2020-11-27 09:07:52 +01:00
  • fd80706f54 decode: Store instruction descriptors separately Alexis Engelke 2020-11-22 22:27:43 +01:00
  • bb8510d77f decode: Ignore ES/CS/SS/DS override in 64-bit mode Alexis Engelke 2020-11-22 20:59:13 +01:00
  • 8ab9f641b8 instrs: Add TSXLDTRK, AVX_VNNI, HRESET, and UINTR Alexis Engelke 2020-11-22 17:36:12 +01:00
  • f4215d4260 decode: Remove PrefixSet enum Alexis Engelke 2020-11-22 16:02:35 +01:00
  • ad1f1e39c3 decode: Minor non-functional changes Alexis Engelke 2020-11-22 15:14:57 +01:00
  • 6fe5500444 instrs: Force RIP access to 64-bit and fix XBEGIN Alexis Engelke 2020-11-22 13:10:30 +01:00
  • f9bba6289e instrs: Annotate only-mem and only-reg in opcode Alexis Engelke 2020-11-22 11:34:55 +01:00
  • bbc3b34f71 decode: Fix VEX + REX + legacy combinations Alexis Engelke 2020-11-21 15:43:51 +01:00
  • 7f0bd4de8b decode: Fix combinations of VEX with legacy prefix Alexis Engelke 2020-11-21 14:59:25 +01:00
  • 318fdc50eb decode: Replace table walk macro with function Alexis Engelke 2020-11-17 10:43:08 +01:00
  • 95070908d0 tests/decode: Add more test cases Alexis Engelke 2020-11-09 09:44:28 +01:00
  • 58464d6fa1 decode: Fix ignoring VEX.B in 32-bit mode Alexis Engelke 2020-11-09 09:43:21 +01:00
  • 62b0420147 parseinstr: Simplify opcode naming scheme Alexis Engelke 2020-11-08 13:46:54 +01:00
  • 9df6ac1788 decode: Replace T8+T72 with T16+T8E for R/M value Alexis Engelke 2020-11-08 11:20:03 +01:00
  • 7d7e72746e parseinstr: Split escape and opcode Alexis Engelke 2020-11-08 11:11:18 +01:00