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instrs: Add AMD encoding of SHL/6 and TEST/1

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- SHL (SAL) encoding with /6: this is not documented by Intel and
  documented by AMD as present, but unsupported by tools.
- TEST encoding with /1: undocumented by Intel, documented by AMD.
This commit is contained in:
Alexis Engelke
2021-01-10 15:03:23 +01:00
parent fcb39f5cbe
commit b8decc8064
1 changed files with 8 additions and 0 deletions
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8
instrs.txt
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@@ -188,6 +188,7 @@ c0/2 MI GP IMM8 - - RCL SIZE_8
c0/3 MI GP IMM8 - - RCR SIZE_8
c0/4 MI GP IMM8 - - SHL SIZE_8
c0/5 MI GP IMM8 - - SHR SIZE_8
c0/6 MI GP IMM8 - - SHL SIZE_8
c0/7 MI GP IMM8 - - SAR SIZE_8
c1/0 MI GP IMM8 - - ROL
c1/1 MI GP IMM8 - - ROR
@@ -195,6 +196,7 @@ c1/2 MI GP IMM8 - - RCL
c1/3 MI GP IMM8 - - RCR
c1/4 MI GP IMM8 - - SHL
c1/5 MI GP IMM8 - - SHR
c1/6 MI GP IMM8 - - SHL
c1/7 MI GP IMM8 - - SAR
# RET immediate size handled in code
c2 I IMM16 - - - RET FORCE64 INSTR_WIDTH
@@ -222,6 +224,7 @@ d0/2 M1 GP IMM8 - - RCL SIZE_8
d0/3 M1 GP IMM8 - - RCR SIZE_8
d0/4 M1 GP IMM8 - - SHL SIZE_8
d0/5 M1 GP IMM8 - - SHR SIZE_8
d0/6 M1 GP IMM8 - - SHL SIZE_8
d0/7 M1 GP IMM8 - - SAR SIZE_8
d1/0 M1 GP IMM8 - - ROL
d1/1 M1 GP IMM8 - - ROR
@@ -229,6 +232,7 @@ d1/2 M1 GP IMM8 - - RCL
d1/3 M1 GP IMM8 - - RCR
d1/4 M1 GP IMM8 - - SHL
d1/5 M1 GP IMM8 - - SHR
d1/6 M1 GP IMM8 - - SHL
d1/7 M1 GP IMM8 - - SAR
d2/0 MC GP GP8 - - ROL SIZE_8
d2/1 MC GP GP8 - - ROR SIZE_8
@@ -236,6 +240,7 @@ d2/2 MC GP GP8 - - RCL SIZE_8
d2/3 MC GP GP8 - - RCR SIZE_8
d2/4 MC GP GP8 - - SHL SIZE_8
d2/5 MC GP GP8 - - SHR SIZE_8
d2/6 MC GP GP8 - - SHL SIZE_8
d2/7 MC GP GP8 - - SAR SIZE_8
d3/0 MC GP GP8 - - ROL
d3/1 MC GP GP8 - - ROR
@@ -243,6 +248,7 @@ d3/2 MC GP GP8 - - RCL
d3/3 MC GP GP8 - - RCR
d3/4 MC GP GP8 - - SHL
d3/5 MC GP GP8 - - SHR
d3/6 MC GP GP8 - - SHL
d3/7 MC GP GP8 - - SAR
d4 I IMM - - - AAM ONLY32 SIZE_8
d5 I IMM - - - AAD ONLY32 SIZE_8
@@ -273,6 +279,7 @@ f1 NP - - - - INT1
f4 NP - - - - HLT
f5 NP - - - - CMC
f6/0 MI GP IMM - - TEST SIZE_8
f6/1 MI GP IMM - - TEST SIZE_8
f6/2 M GP - - - NOT SIZE_8 LOCK
f6/3 M GP - - - NEG SIZE_8 LOCK
f6/4 M GP - - - MUL SIZE_8
@@ -280,6 +287,7 @@ f6/5 M GP - - - IMUL SIZE_8
f6/6 M GP - - - DIV SIZE_8
f6/7 M GP - - - IDIV SIZE_8
f7/0 MI GP IMM - - TEST
f7/1 MI GP IMM - - TEST
f7/2 M GP - - - NOT LOCK
f7/3 M GP - - - NEG LOCK
f7/4 M GP - - - MUL