• Joined on 2021-08-16
T0b1 pushed to main at T0b1/regalloc2 2023-05-05 00:10:24 +00:00
8fb8aa15b0 fixed first reg version
T0b1 pushed to main at T0b1/regalloc2 2023-04-30 21:11:01 +00:00
b6cc306d7a first steps to keeping stuff in register
T0b1 pushed to main at T0b1/regalloc2 2023-04-29 23:31:54 +00:00
12e996f7de dont alloc a new stack slot if value dies on edge
T0b1 created branch master in T0b1/rust-as 2023-04-28 18:41:49 +00:00
T0b1 pushed to master at T0b1/rust-as 2023-04-28 18:41:49 +00:00
8e26fa9ec7 init
T0b1 pushed to master at T0b1/fadec 2023-04-28 18:41:24 +00:00
9263c3d6b2 wasm support
e2480e9f85 instrs: Fix VMOVD_G2X with W1 in 32-bit mode
6abc971576 decode: Move instr-width to legacy path
48f886e130 decode: Group all VSIB handling in single branch
1290e9f094 decode: Group all EVEX-handling for ModRM operands
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T0b1 created branch master in T0b1/fadec 2023-04-28 18:41:24 +00:00
T0b1 created repository T0b1/fadec 2023-04-28 18:40:55 +00:00
T0b1 created repository T0b1/rust-as 2023-04-28 18:40:15 +00:00
T0b1 pushed to main at T0b1/regalloc2 2023-04-27 23:10:50 +00:00
ef1e46d8ef first try handly cycles/chains (doesnt work)
T0b1 pushed to main at T0b1/wasmtime 2023-04-27 14:17:02 +00:00
0df60ce50f custom regalloc
3742c97bf0 better vcode printing
edae6c0217 x64: Add non-SSE4.1 lowerings of pmov{s,z}x* (#6279)
57dabd3b0b Fix publishing artifacts from the main branch (#6290)
d75adc4421 Run full CI once a day on main (#6288)
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T0b1 pushed to master at T0b1/cranelift_test 2023-04-18 10:22:20 +00:00
0bb8f5c3be init
T0b1 created branch master in T0b1/cranelift_test 2023-04-18 10:22:20 +00:00
T0b1 created repository T0b1/cranelift_test 2023-04-18 10:21:16 +00:00
T0b1 pushed to main at T0b1/wasmtime 2023-04-18 10:19:56 +00:00
55211229ef better vcode printing
e3117a84c8 local changes
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T0b1 pushed to main at T0b1/regalloc2 2023-04-18 10:18:46 +00:00
a0404ec851 cur changes
T0b1 pushed to main at T0b1/regalloc2 2023-04-16 13:09:56 +00:00
a0e2851620 reuse stack slot if variable dies outgoing
T0b1 pushed to main at T0b1/regalloc2 2023-04-16 12:43:24 +00:00
d9bbbcfbe2 save some work
T0b1 pushed to main at T0b1/regalloc2 2023-04-16 12:24:33 +00:00
f5f984c81a Revert "try using bitmap instead of indexset"
74873feb96 Revert "try bigger smallvec for vregs"
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T0b1 pushed to main at T0b1/regalloc2 2023-04-16 12:10:25 +00:00
75fdc9d3a4 try bigger smallvec for vregs