Jakob Stoklund Olesen d2ddc700a8 Add the br_icmp instruction. ...

This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.

2017-04-03 15:04:42 -07:00

..

cfg

Add a 'test verifier' sub-test.

2016-09-16 16:25:36 -07:00

domtree

Implement a domtree sub-test.

2016-09-16 14:50:32 -07:00

isa/riscv

Add RISC-V encodings for lui.

2017-04-03 12:27:22 -07:00

parser

Add the br_icmp instruction.

2017-04-03 15:04:42 -07:00

regalloc

Add a 'regalloc' filetest command.

2017-02-22 11:53:01 -08:00

verifier

Add a 'test verifier' sub-test.

2016-09-16 16:25:36 -07:00