b170b74b65
Memory access instructions which took the GPR_ZERO_DEREF_SAFE register class (that was removed in #600) should check for the need of either an offset (r13/rbp) or the SIB byte (r12/rsp). Some load/store instructions would already take an index, thus already contain the SIB byte in this case (see instructions which have a comment telling that the else branch already contains an SIB byte). Non-indexed memory accesses lacked the SIB byte check, which this patch adds.
This crate contains the core Cranelift code generator. It translates code from an intermediate representation into executable machine code.