The tests for the SIMD floating-point maximum and minimum operations require particular care because the handling of the NaN values is non-deterministic and may vary between platforms. There is no way to match several NaN values in a test, so the solution is to extract the non-deterministic test cases into a separate file that is subsequently replicated for every backend under test, with adjustments made to the expected results. Copyright (c) 2021, Arm Limited.
211 lines
4.2 KiB
Plaintext
211 lines
4.2 KiB
Plaintext
test run
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set enable_simd
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target x86_64 machinst
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set enable_simd
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target x86_64 legacy
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function %icmp_eq_i8x16() -> b8 {
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block0:
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v0 = vconst.i8x16 0x00
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v1 = vconst.i8x16 0x00
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v2 = icmp eq v0, v1
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v3 = extractlane v2, 0
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return v3
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}
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; run
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function %icmp_eq_i64x2() -> b64 {
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block0:
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v0 = vconst.i64x2 0xffffffffffffffffffffffffffffffff
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v1 = vconst.i64x2 0xffffffffffffffffffffffffffffffff
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v2 = icmp eq v0, v1
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v3 = extractlane v2, 1
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return v3
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}
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; run
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function %icmp_ne_i32x4() -> b1 {
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block0:
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v0 = vconst.i32x4 [0 1 2 3]
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v1 = vconst.i32x4 [7 7 7 7]
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v2 = icmp ne v0, v1
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v3 = vall_true v2
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return v3
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}
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; run
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function %icmp_ne_i16x8() -> b1 {
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block0:
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v0 = vconst.i16x8 [0 1 2 3 4 5 6 7]
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v1 = vconst.i16x8 [0 1 2 3 4 5 6 7]
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v2 = icmp ne v0, v1
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v3 = vall_true v2
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v4 = bint.i32 v3
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v5 = icmp_imm eq v4, 0
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return v5
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}
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; run
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function %icmp_sgt_i8x16() -> b1 {
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block0:
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v0 = vconst.i8x16 [0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0]
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v1 = vconst.i8x16 [1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0xff]
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v2 = icmp sgt v0, v1
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v3 = raw_bitcast.i8x16 v2
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v4 = vconst.i8x16 [0 0 0xff 0 0 0 0 0 0 0 0 0 0 0 0 0xff]
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v7 = icmp eq v3, v4
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v8 = vall_true v7
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return v8
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}
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; run
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function %icmp_sgt_i64x2() -> b1 {
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block0:
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v0 = vconst.i64x2 [0 -42]
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v1 = vconst.i64x2 [-1 -43]
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v2 = icmp sgt v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_ugt_i8x16() -> b1 {
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block0:
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v0 = vconst.i8x16 [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16]
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v1 = vconst.i8x16 [0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1]
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v2 = icmp ugt v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_sge_i16x8() -> b1 {
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block0:
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v0 = vconst.i16x8 [-1 1 2 3 4 5 6 7]
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v1 = vconst.i16x8 [-1 1 1 1 1 1 1 1]
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v2 = icmp sge v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_uge_i32x4() -> b1 {
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block0:
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v0 = vconst.i32x4 [1 2 3 4]
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v1 = vconst.i32x4 [1 1 1 1]
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v2 = icmp uge v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_slt_i32x4() -> b1 {
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block0:
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v0 = vconst.i32x4 [-1 1 1 1]
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v1 = vconst.i32x4 [1 2 3 4]
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v2 = icmp slt v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_ult_i32x4() -> b1 {
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block0:
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v0 = vconst.i32x4 [1 1 1 1]
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v1 = vconst.i32x4 [-1 2 3 4] ; -1 = 0xffff... will be greater than 1 when unsigned
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v2 = icmp ult v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_ult_i16x8() -> b1 {
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block0:
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v0 = vconst.i16x8 [-1 -1 -1 -1 -1 -1 -1 -1]
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v1 = vconst.i16x8 [-1 -1 -1 -1 -1 -1 -1 -1]
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v2 = icmp ult v0, v1
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v3 = vconst.i16x8 0x00
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v4 = raw_bitcast.i16x8 v2
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v5 = icmp eq v3, v4
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v8 = vall_true v5
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return v8
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}
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; run
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function %icmp_sle_i16x8() -> b1 {
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block0:
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v0 = vconst.i16x8 [-1 -1 0 0 0 0 0 0]
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v1 = vconst.i16x8 [-1 0 0 0 0 0 0 0]
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v2 = icmp sle v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %icmp_ule_i16x8() -> b1 {
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block0:
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v0 = vconst.i16x8 [-1 0 0 0 0 0 0 0]
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v1 = vconst.i16x8 [-1 -1 0 0 0 0 0 0]
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v2 = icmp ule v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %fcmp_eq_f32x4() -> b1 {
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block0:
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v0 = vconst.f32x4 [0.0 -0x4.2 0x0.33333 -0.0]
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v1 = vconst.f32x4 [0.0 -0x4.2 0x0.33333 -0.0]
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v2 = fcmp eq v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %fcmp_lt_f32x4() -> b1 {
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block0:
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v0 = vconst.f32x4 [0.0 -0x4.2 0x0.0 -0.0]
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v1 = vconst.f32x4 [0x0.001 0x4.2 0x0.33333 0x1.0]
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v2 = fcmp lt v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %fcmp_ge_f64x2() -> b1 {
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block0:
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v0 = vconst.f64x2 [0x0.0 0x4.2]
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v1 = vconst.f64x2 [0.0 0x4.1]
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v2 = fcmp ge v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %fcmp_uno_f64x2() -> b1 {
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block0:
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v0 = vconst.f64x2 [0.0 NaN]
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v1 = vconst.f64x2 [NaN 0x4.1]
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v2 = fcmp uno v0, v1
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v8 = vall_true v2
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return v8
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}
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; run
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function %fcmp_gt_nans_f32x4() -> b1 {
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block0:
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v0 = vconst.f32x4 [NaN 0x42.0 -NaN NaN]
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v1 = vconst.f32x4 [NaN NaN 0x42.0 Inf]
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v2 = fcmp gt v0, v1
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; now check that the result v2 is all zeroes
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v3 = vconst.i32x4 0x00
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v4 = raw_bitcast.i32x4 v2
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v5 = icmp eq v3, v4
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v8 = vall_true v5
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return v8
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}
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; run
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