38 lines
999 B
Python
38 lines
999 B
Python
"""
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ARM32 register banks.
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"""
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from __future__ import absolute_import
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from cdsl.registers import RegBank, RegClass
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from .defs import ISA
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# Define the larger float bank first to avoid the alignment gap.
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FloatRegs = RegBank(
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'FloatRegs', ISA, r"""
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Floating point registers.
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The floating point register units correspond to the S-registers, but
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extended as if there were 64 registers.
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- S registers are one unit each.
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- D registers are two units each, even D16 and above.
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- Q registers are 4 units each.
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""",
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units=64, prefix='s')
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# Special register units:
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# - r15 is the program counter.
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# - r14 is the link register.
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# - r13 is usually the stack pointer.
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IntRegs = RegBank(
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'IntRegs', ISA,
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'General purpose registers',
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units=16, prefix='r')
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GPR = RegClass(IntRegs)
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S = RegClass(FloatRegs, count=32)
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D = RegClass(FloatRegs, width=2)
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Q = RegClass(FloatRegs, width=4)
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RegClass.extract_names(globals())
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