Files
wasmtime/cranelift/codegen/src/isa
Ulrich Weigand 83bb6fd4c8 s390x: Fix regalloc checker error (#4973)
For ShiftRR and VecShiftRR, if shift_reg is zero_reg(), the
instruction does not actually use any register value.

Fixes #4969
2022-09-28 08:25:23 -07:00
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