154 lines
2.5 KiB
Plaintext
154 lines
2.5 KiB
Plaintext
test compile precise-output
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target aarch64
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function %swidenhigh_i8x16(i8) -> i16x8 {
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gv0 = dyn_scale_target_const.i16x8
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gv1 = dyn_scale_target_const.i8x16
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dt0 = i8x16*gv1
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dt1 = i16x8*gv0
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block0(v0: i8):
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v1 = splat.dt0 v0
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v2 = swiden_high v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.16b, w0
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; sxtl2 v0.8h, v3.16b
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.16b, w0
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; sshll2 v0.8h, v3.16b, #0
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; ret
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function %swidenhigh_i16x8(i16) -> i32x4 {
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gv0 = dyn_scale_target_const.i32x4
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gv1 = dyn_scale_target_const.i16x8
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dt0 = i16x8*gv1
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dt1 = i32x4*gv0
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block0(v0: i16):
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v1 = splat.dt0 v0
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v2 = swiden_high v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.8h, w0
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; sxtl2 v0.4s, v3.8h
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.8h, w0
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; sshll2 v0.4s, v3.8h, #0
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; ret
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function %swidenhigh_i32x4(i32) -> i64x2 {
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gv0 = dyn_scale_target_const.i32x4
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gv1 = dyn_scale_target_const.i64x2
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dt0 = i64x2*gv1
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dt1 = i32x4*gv0
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block0(v0: i32):
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v1 = splat.dt1 v0
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v2 = swiden_high v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.4s, w0
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; sxtl2 v0.2d, v3.4s
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.4s, w0
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; sshll2 v0.2d, v3.4s, #0
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; ret
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function %swidenlow_i8x16(i8) -> i16x8 {
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gv0 = dyn_scale_target_const.i16x8
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gv1 = dyn_scale_target_const.i8x16
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dt0 = i8x16*gv1
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dt1 = i16x8*gv0
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block0(v0: i8):
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v1 = splat.dt0 v0
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v2 = swiden_low v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.16b, w0
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; sxtl v0.8h, v3.8b
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.16b, w0
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; sshll v0.8h, v3.8b, #0
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; ret
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function %swidenlow_i16x8(i16) -> i32x4 {
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gv0 = dyn_scale_target_const.i32x4
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gv1 = dyn_scale_target_const.i16x8
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dt0 = i16x8*gv1
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dt1 = i32x4*gv0
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block0(v0: i16):
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v1 = splat.dt0 v0
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v2 = swiden_low v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.8h, w0
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; sxtl v0.4s, v3.4h
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.8h, w0
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; sshll v0.4s, v3.4h, #0
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; ret
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function %swidenlow_i32x4(i32) -> i64x2 {
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gv0 = dyn_scale_target_const.i32x4
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gv1 = dyn_scale_target_const.i64x2
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dt0 = i64x2*gv1
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dt1 = i32x4*gv0
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block0(v0: i32):
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v1 = splat.dt1 v0
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v2 = swiden_low v1
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v3 = extract_vector v2, 0
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return v3
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}
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; VCode:
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; block0:
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; dup v3.4s, w0
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; sxtl v0.2d, v3.2s
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; dup v3.4s, w0
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; sshll v0.2d, v3.2s, #0
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; ret
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