6ecdc2482e
* x64: Improve memory support in `{insert,extract}lane`
This commit improves adds support to Cranelift to emit `pextr{b,w,d,q}`
with a memory destination, merging a store-of-extract operation into one
instruction. Additionally AVX support is added for the `pextr*`
instructions.
I've additionally tried to ensure that codegen tests and runtests exist
for all forms of these instructions too.
* Add missing commas
* Fix tests
165 lines
4.2 KiB
Plaintext
165 lines
4.2 KiB
Plaintext
;;! target = "x86_64"
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;;! compile = true
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;;! relaxed_simd_deterministic = true
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;;! settings = ["has_avx=true"]
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(module
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(func (param v128) (result v128)
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local.get 0
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i32x4.relaxed_trunc_f32x4_s
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)
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(func (param v128) (result v128)
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local.get 0
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i32x4.relaxed_trunc_f32x4_u
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)
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(func (param v128) (result v128)
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local.get 0
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i32x4.relaxed_trunc_f64x2_s_zero
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)
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(func (param v128) (result v128)
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local.get 0
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i32x4.relaxed_trunc_f64x2_u_zero
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)
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(func (param v128 v128) (result v128)
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local.get 0
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local.get 1
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i16x8.relaxed_dot_i8x16_i7x16_s
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)
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(func (param v128 v128 v128) (result v128)
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local.get 0
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local.get 1
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local.get 2
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i32x4.relaxed_dot_i8x16_i7x16_add_s
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)
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)
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;; function u0:0:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; vcmpps $0, %xmm0, %xmm0, %xmm3
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;; vandps %xmm0, %xmm3, %xmm5
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;; vpxor %xmm3, %xmm5, %xmm7
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;; vcvttps2dq %xmm5, %xmm9
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;; vpand %xmm9, %xmm7, %xmm11
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;; vpsrad %xmm11, $31, %xmm13
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;; vpxor %xmm13, %xmm9, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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;;
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;; function u0:1:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; uninit %xmm3
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;; vxorps %xmm3, %xmm3, %xmm5
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;; vmaxps %xmm0, %xmm5, %xmm7
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;; vpcmpeqd %xmm5, %xmm5, %xmm9
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;; vpsrld %xmm9, $1, %xmm11
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;; vcvtdq2ps %xmm11, %xmm13
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;; vcvttps2dq %xmm7, %xmm15
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;; vsubps %xmm7, %xmm13, %xmm1
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;; vcmpps $2, %xmm13, %xmm1, %xmm3
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;; vcvttps2dq %xmm1, %xmm5
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;; vpxor %xmm5, %xmm3, %xmm7
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;; uninit %xmm9
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;; vpxor %xmm9, %xmm9, %xmm11
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;; vpmaxsd %xmm7, %xmm11, %xmm13
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;; vpaddd %xmm13, %xmm15, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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;;
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;; function u0:2:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; vcmppd $0, %xmm0, %xmm0, %xmm3
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;; vandps %xmm3, const(0), %xmm5
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;; vminpd %xmm0, %xmm5, %xmm7
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;; vcvttpd2dq %xmm7, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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;;
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;; function u0:3:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; uninit %xmm3
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;; vxorpd %xmm3, %xmm3, %xmm5
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;; vmaxpd %xmm0, %xmm5, %xmm7
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;; vminpd %xmm7, const(0), %xmm9
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;; vroundpd $3, %xmm9, %xmm11
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;; vaddpd %xmm11, const(1), %xmm13
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;; vshufps $136, %xmm13, %xmm5, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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;;
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;; function u0:4:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; vpmovsxbw %xmm0, %xmm10
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;; vpmovsxbw %xmm1, %xmm12
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;; vpmullw %xmm10, %xmm12, %xmm14
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;; vpalignr $8, %xmm0, %xmm0, %xmm8
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;; vpmovsxbw %xmm8, %xmm10
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;; vpalignr $8, %xmm1, %xmm1, %xmm12
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;; vpmovsxbw %xmm12, %xmm15
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;; vpmullw %xmm10, %xmm15, %xmm0
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;; vphaddw %xmm14, %xmm0, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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;;
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;; function u0:5:
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;; pushq %rbp
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;; unwind PushFrameRegs { offset_upward_to_caller_sp: 16 }
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;; movq %rsp, %rbp
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;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 }
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;; block0:
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;; vpmovsxbw %xmm0, %xmm13
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;; vpmovsxbw %xmm1, %xmm15
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;; vpmullw %xmm13, %xmm15, %xmm3
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;; vpalignr $8, %xmm0, %xmm0, %xmm11
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;; vpmovsxbw %xmm11, %xmm13
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;; vpalignr $8, %xmm1, %xmm1, %xmm15
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;; vpmovsxbw %xmm15, %xmm1
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;; vpmullw %xmm13, %xmm1, %xmm4
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;; vphaddw %xmm3, %xmm4, %xmm15
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;; vpmaddwd %xmm15, const(0), %xmm15
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;; vpaddd %xmm15, %xmm2, %xmm0
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;; jmp label1
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;; block1:
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;; movq %rbp, %rsp
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;; popq %rbp
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;; ret
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