4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
64 lines
870 B
Plaintext
64 lines
870 B
Plaintext
; Test basic code generation for control flow WebAssembly instructions.
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test compile
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target i686 haswell
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target x86_64 haswell
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function %br_if(i32) -> i32 {
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ebb0(v0: i32):
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v1 = iconst.i32 1
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brz v0, ebb1(v1)
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jump ebb2
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ebb1(v2: i32):
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return v2
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ebb2:
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jump ebb1(v0)
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}
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function %br_if_not(i32) -> i32 {
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ebb0(v0: i32):
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v1 = iconst.i32 1
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brnz v0, ebb1(v0)
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jump ebb2
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ebb1(v2: i32):
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return v2
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ebb2:
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jump ebb1(v0)
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}
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function %br_if_fallthrough(i32) -> i32 {
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ebb0(v0: i32):
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v1 = iconst.i32 1
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brz v0, ebb1(v1)
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; This jump gets converted to a fallthrough.
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jump ebb1(v0)
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ebb1(v2: i32):
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return v2
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}
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function %undefined() {
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ebb0:
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trap user0
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}
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function %br_table(i32) {
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jt0 = jump_table ebb3, ebb1, 0, ebb2
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ebb0(v0: i32):
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br_table v0, jt0
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trap oob
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ebb1:
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return
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ebb2:
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return
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ebb3:
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return
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}
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