Jakob Stoklund Olesen 5a8293427d Verify that type variables have been fully bound. ...

The shift instructions have two type variables since the shift amount can be a
differently sized integer. Fix the RISC-V shift encodings to reflect this, and
allow i64 registers to be shifted by an i32 amount.

2016-08-04 10:21:48 -07:00

..

riscv

Verify that type variables have been fully bound.

2016-08-04 10:21:48 -07:00

__init__.py

PEP8 formatting.

2016-05-12 13:37:03 -07:00