Afonso Bordado 02c3b47db2 x64: Implement SIMD fma (#4474) ...

* x64: Add VEX Instruction Encoder

This uses a similar builder pattern to the EVEX Encoder.
Does not yet support memory accesses.

* x64: Add FMA Flag

* x64: Implement SIMD `fma`

* x64: Use 4 register Vex Inst

* x64: Reorder VEX pretty print args

2022-07-25 22:01:02 +00:00

..

alias

Add a basic alias analysis with redundant-load elim and store-to-load fowarding opts. (#4163)

2022-05-20 13:19:32 -07:00

cfg

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

dce

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

domtree

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

isa

[AArch64] Port SIMD narrowing to ISLE (#4478)

2022-07-25 12:40:36 -07:00

legalizer

Remove the old x86 backend

2021-09-29 16:13:46 +02:00

licm

cranelift: Restrict br_table to i32 indices (#4510)

2022-07-22 23:32:40 +00:00

parser

cranelift: remove load_complex and store_complex (#3976)

2022-03-31 10:05:10 -07:00

preopt

Enable more CLIF tests on AArch64

2021-08-17 13:27:58 +01:00

runtests

x64: Implement SIMD fma (#4474)

2022-07-25 22:01:02 +00:00

simple_gvn

Remove instructions necessary for the old regalloc

2021-10-12 14:37:36 +02:00

simple_preopt

Remove the old x86 backend

2021-09-29 16:13:46 +02:00

verifier

cranelift: Restrict br_table to i32 indices (#4510)

2022-07-22 23:32:40 +00:00

wasm

Remove the old x86 backend

2021-09-29 16:13:46 +02:00