Andrew Brown 168ad7fda3 Fix 16-bit x86_pextr encoding ...

The x86 ISA has (at least) two encodings for PEXTRW:
 1. in the SSE2 opcode (66 0f c5) the XMM operand uses r/m and the GPR operand uses reg
 2. in the SSE4.1 opcode (66 0f 3a 15) the XMM operand uses reg and the GPR operand uses r/m

This changes the 16-bit x86_pextr encoding from 1 to 2 to match the other PEXTR* implementations (all #2 style).

2019-09-30 13:54:30 -07:00

cranelift

Fix 16-bit x86_pextr encoding

2019-09-30 13:54:30 -07:00

.azure-pipelines.yml

Continuous fuzzing with Fuzzit (#1042)

2019-09-18 14:35:30 +09:00

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