Commit Graph

8447 Commits

Author SHA1 Message Date
Afonso Bordado
f7f52445c8 aarch64: Implement lowering rotl/rotr for i128 values 2021-06-20 15:53:56 +01:00
Alex Crichton
7ce46043dc Add guard pages to the front of linear memories (#2977)
* Add guard pages to the front of linear memories

This commit implements a safety feature for Wasmtime to place guard
pages before the allocation of all linear memories. Guard pages placed
after linear memories are typically present for performance (at least)
because it can help elide bounds checks. Guard pages before a linear
memory, however, are never strictly needed for performance or features.
The intention of a preceding guard page is to help insulate against bugs
in Cranelift or other code generators, such as CVE-2021-32629.

This commit adds a `Config::guard_before_linear_memory` configuration
option, defaulting to `true`, which indicates whether guard pages should
be present both before linear memories as well as afterwards. Guard
regions continue to be controlled by
`{static,dynamic}_memory_guard_size` methods.

The implementation here affects both on-demand allocated memories as
well as the pooling allocator for memories. For on-demand memories this
adjusts the size of the allocation as well as adjusts the calculations
for the base pointer of the wasm memory. For the pooling allocator this
will place a singular extra guard region at the very start of the
allocation for memories. Since linear memories in the pooling allocator
are contiguous every memory already had a preceding guard region in
memory, it was just the previous memory's guard region afterwards. Only
the first memory needed this extra guard.

I've attempted to write some tests to help test all this, but this is
all somewhat tricky to test because the settings are pretty far away
from the actual behavior. I think, though, that the tests added here
should help cover various use cases and help us have confidence in
tweaking the various `Config` settings beyond their defaults.

Note that this also contains a semantic change where
`InstanceLimits::memory_reservation_size` has been removed. Instead this
field is now inferred from the `static_memory_maximum_size` and guard
size settings. This should hopefully remove some duplication in these
settings, canonicalizing on the guard-size/static-size settings as the
way to control memory sizes and virtual reservations.

* Update config docs

* Fix a typo

* Fix benchmark

* Fix wasmtime-runtime tests

* Fix some more tests

* Try to fix uffd failing test

* Review items

* Tweak 32-bit defaults

Makes the pooling allocator a bit more reasonable by default on 32-bit
with these settings.
2021-06-18 09:57:08 -05:00
Alex Crichton
d8d4bf81b2 Reimplement how instance exports are stored/loaded (#2984)
* Reimplement how instance exports are stored/loaded

This commit internally refactors how instance exports are handled and
fixes two issues. One issue is that when we instantiate an instance we
no longer forcibly load all items from the instance immediately,
deferring insertion of each item into the store data tables to happen
later as necessary. The next issue is that repeated calls to
`Caller::get_export` would continuously insert items into the store data
tables. While working as intended this was undesirable because it would
continuously push onto a vector that only got deallocated once the
entire store was deallocate. Now it's routed to `Instance::get_export`
which doesn't have this behavior.

Closes #2916
Closes #2983

* Just define our own `Either`
2021-06-17 14:27:48 -05:00
Chris Fallin
5ddf562309 Merge pull request #2991 from uweigand/s390x-z14
s390x: Add z14 support
2021-06-17 08:24:23 -07:00
Chris Fallin
de1edd4976 Merge pull request #2985 from afonso360/aarch64-i128-load-store
aarch64: Implement I128 Loads and Stores
2021-06-17 08:23:15 -07:00
Afonso Bordado
c82764605f aarch64: Add i128 load & store tests and refactor address calculation
The previous address calculation code had a bug where we tried to
add offsets into a temporary register before defining it, causing
the regalloc to complain.
2021-06-17 15:50:08 +01:00
Ulrich Weigand
def54fb1fa s390x: Add z14 support
* Add support for processor features (including auto-detection).

* Move base architecture set requirement back to z14.

* Add z15 feature sets and re-enable z15-specific code generation
  when required features are available.
2021-06-17 10:23:15 +02:00
Alex Crichton
fb07ff5740 Implement Clone for Linker (#2993)
There's no real reason to not do this, and it can help with some
usability use cases!
2021-06-16 16:06:24 -05:00
Chris Fallin
8ac83a2c63 Merge pull request #2990 from afonso360/aarch64-bitops-count
aarch64: Add i128 bit counting instructions
2021-06-16 10:25:45 -07:00
Afonso Bordado
9fc89d2316 aarch64: Add bitrev,clz,cls,ctz for i128 values 2021-06-16 10:44:10 +01:00
Afonso Bordado
09fec151eb aarch64: Add popcnt for i128 values 2021-06-16 10:44:10 +01:00
Alex Crichton
5140fd251a Update wasm-tools crates (#2989)
* Update wasm-tools crates

This brings in recent updates, notably including more improvements to
wasm-smith which will hopefully help exercise non-trapping wasm more.

* Fix some wat
2021-06-15 22:56:10 -05:00
Chris Fallin
53006ef0de Merge pull request #2988 from uweigand/s390x-atomic-part1
s390x: Add support for atomic operations (part 1)
2021-06-15 10:50:35 -07:00
Ulrich Weigand
46b73431ca s390x: Add support for atomic operations (part 1)
This adds full back-end support for the Fence, AtomicLoad
and AtomicStore operations, and partial support for the
AtomicCas and AtomicRmw operations.

The missing pieces include sub-word operations, operations
on little-endian memory requiring byte-swapping, and some
of the subtypes of AtomicRmw -- everything that cannot be
implemented without a compare-and-swap loop.  This will be
done in a follow-up patch.

This patch already suffices to make the test suite green
again after a recent change that now requires atomic
operations when accessing the heap.
2021-06-15 17:12:11 +02:00
Olivier Lemasle
a7dad4e38f Include READMEs in crates (#2987) 2021-06-15 06:40:45 -07:00
Afonso Bordado
1c05e06bd5 aarch64: Implement I128 Loads and Stores 2021-06-14 21:56:53 +01:00
Pat Hickey
57375588f2 Merge pull request #2976 from bjorn3/aarch64-object
Lower Arm64Call relocations in cranelift-object
2021-06-13 13:59:06 -07:00
bjorn3
e9f3ac2068 Update object 2021-06-12 12:02:09 +02:00
Olivier Lemasle
b506bc30b1 wasmtime-cache: Update zstd (#2969)
Also update exceptions in deny.toml bans
2021-06-10 12:47:45 -05:00
bjorn3
7d23a9daf7 Lower Arm64Call relocations in cranelift-object 2021-06-10 12:54:25 +02:00
Chris Fallin
3d56728b86 Merge pull request #2975 from afonso360/aarch64-icmp
aarch64: Implement lowering i128 icmp instructions
2021-06-09 15:38:41 -07:00
Chris Fallin
caa85c2fa5 Merge pull request #2959 from afonso360/aarch64-i128-bit-ops
aarch64 add basic i128 bit ops
2021-06-09 15:21:54 -07:00
Afonso Bordado
2643d2654c aarch64: Implement lowering i128 icmp instructions
We have 3 different aproaches depending on the type of comparision requested:
* For eq/ne we compare the high bits and low bits and check
  if they are equal
* For overflow checks, we perform a i128 add and check the
  resulting overflow flag
* For the remaining comparisions (gt/lt/sgt/etc...)
  We compare both the low bits and high bits, and if the high bits are
  equal we return the result of the unsigned comparision on the low bits

As with other i128 ops, we are still missing immlogic support.
2021-06-09 23:02:55 +01:00
Afonso Bordado
4d085d8fbf aarch64: Add sbcs instruction encodings 2021-06-09 22:56:39 +01:00
Afonso Bordado
61f07d79a7 aarch64: Add adcs instruction encodings 2021-06-09 22:56:39 +01:00
Afonso Bordado
b1475f32a6 aarch64: Add ishl,ushr,sshr for i128 values 2021-06-09 22:48:14 +01:00
Afonso Bordado
2c4d1c0003 aarch64: Add ands instruction encoding 2021-06-09 22:38:01 +01:00
Afonso Bordado
c38a5e8b62 aarch64: Add basic i128 bit ops to the AArch64 backend
Currently we just basically use a two instruction version of the same i64 ops.
IMMLogic doesn't really support multiple register inputs, so its left as a TODO for future optimizations.
2021-06-09 22:37:55 +01:00
Chris Fallin
59ebe4fa57 Merge pull request #2964 from afonso360/merge-runtests
cranelift: Merge all run tests into runtests dir
2021-06-09 12:26:45 -07:00
Alex Crichton
e8b8947956 Bump to 0.28.0 (#2972) 2021-06-09 14:00:13 -05:00
bjorn3
e6f399419c Atomic hotswapping in JIT mode (#2786)
* Introduce new_got_entry and new_plt_entry functions

* Return NonNull<*const u8> from get_got_address

* Make GOT entry writes atomic

* Defer GOT updates until relocations and protection

Co-authored-by: Alan Egerton <eggyal@gmail.com>
2021-06-09 09:51:11 -07:00
Alex Crichton
884a6500e9 Add a safe method for accessing memory and T (#2971)
This is currently a very common operation in host bindings where if wasm
gives a host function a relative pointer you'll want to simulataneously
work with the host state and the wasm memory. These two regions are
distinct and safe to borrow mutably simulataneously but it's not obvious
in the Rust type system that this is so, so add a helper method here to
assist in doing so.
2021-06-08 09:37:31 -05:00
Pat Hickey
8b4bdf92e2 make ResourceLimiter operate on Store data; add hooks for entering and exiting native code (#2952)
* wasmtime_runtime: move ResourceLimiter defaults into this crate

In preparation of changing wasmtime::ResourceLimiter to be a re-export
of this definition, because translating between two traits was causing
problems elsewhere.

* wasmtime: make ResourceLimiter a re-export of wasmtime_runtime::ResourceLimiter

* refactor Store internals to support ResourceLimiter as part of store's data

* add hooks for entering and exiting native code to Store

* wasmtime-wast, fuzz: changes to adapt ResourceLimiter API

* fix tests

* wrap calls into wasm with entering/exiting exit hooks as well

* the most trivial test found a bug, lets write some more

* store: mark some methods as #[inline] on Store, StoreInner, StoreInnerMost

Co-authored-By: Alex Crichton <alex@alexcrichton.com>

* improve tests for the entering/exiting native hooks

Co-authored-by: Alex Crichton <alex@alexcrichton.com>
2021-06-08 09:37:00 -05:00
Afonso Bordado
7147e95add cranelift: Fix endianness bug in filetests runner
Enabling runtests for the s390x backend exposed a pre-existing endian bug with handling bool test case return values.

These are written as integers of the same width by the trampoline, but are always read out as the Rust "bool" type. This happens to work on little-endian systems, but fails for any boolean type larger than 1 byte on big-endian systems.

See: https://github.com/bytecodealliance/wasmtime/pull/2964#issuecomment-855879866
2021-06-07 14:53:18 +01:00
Afonso Bordado
214755c6a0 cranelift: Merge all run tests into runtests dir
With this change we now reuse tests across multiple arches.

Duplicate tests were merged into the same file where possible.
Some legacy x86 tests were left in separate files due to incompatibilities with the rest of the test suite.
2021-06-07 14:44:11 +01:00
Chris Fallin
ffb92d9109 Merge pull request #2966 from akirilov-arm/simd_int_to_int_extend
Enable the simd_int_to_int_extend test for AArch64
2021-06-06 23:34:52 -07:00
Johnnie Birch
1770880e19 x64: add support for packed promote and demote (#2783)
* Add support for x64 packed promote low

* Add support for x64 packed floating point demote

* Update vector promote low and demote by adding constraints

Also does some renaming and minor refactoring
2021-06-04 15:59:20 -07:00
Pat Hickey
38ab7a03dd Merge pull request #2946 from bytecodealliance/pch/eager_per_thread_init
expose eager thread-local resource initialization on Engine
2021-06-04 15:42:08 -07:00
Alex Crichton
e516f0339a Update wasm-smith to generate more wasm (#2967)
This brings in bytecodealliance/wasm-tools#277 which should improve the
wasm programs that wasm-smith generates.
2021-06-04 17:11:19 -05:00
Pat Hickey
613309b76c missing docs 2021-06-04 14:22:08 -07:00
Pat Hickey
035d541fd9 add docs 2021-06-04 14:04:14 -07:00
Pat Hickey
2a4c51b77d switch eager vs lazy instantiation to a criterion bench 2021-06-04 12:25:08 -07:00
Pat Hickey
895ee2b85f make Module::deserialize's version check optional via Config (#2945)
* make Module::deserialize's version check optional via Config

A SerializedModule contains the CARGO_PKG_VERSION string, which is
checked for equality when loading. This is a great guard-rail but
some users may want to disable this check (e.g. so they can implement
their own versioning scheme)

* rename config to deserialize_check_wasmtime_version

* add test

* fix doc links

* fix

* thank you rustdoc
2021-06-04 14:18:02 -05:00
Pat Hickey
0a96b6b60a overhead is on calls, not instantiation 2021-06-04 11:35:30 -07:00
Pat Hickey
bf1d1a4e7a add test for eager thread initialization 2021-06-04 11:22:23 -07:00
Pat Hickey
1136917192 golf 2021-06-04 10:47:46 -07:00
Pat Hickey
ff87f45604 expose eager thread-local initialization by the Engine 2021-06-04 10:47:46 -07:00
Anton Kirilov
5e8a8fe5a0 Enable the simd_int_to_int_extend test for AArch64
Copyright (c) 2021, Arm Limited.
2021-06-04 16:10:02 +01:00
Pat Hickey
357b4c7b60 Merge pull request #2947 from bytecodealliance/pch/global_module_rwlock
global module registry: switch from Mutex to RwLock
2021-06-03 16:30:53 -07:00
Alex Crichton
0c90d789e8 Update Cargo.lock, remove deny.toml warning (#2965)
This runs through and updates all our dependencies, additionally
removing the need for ignoring a rustsec warning.

Closes #2882
2021-06-03 17:11:07 -05:00