Commit Graph

117 Commits

Author SHA1 Message Date
Peter Huene
f7e9f86ba9 Refactor unwind generation in Cranelift.
This commit makes the following changes to unwind information generation in
Cranelift:

* Remove frame layout change implementation in favor of processing the prologue
  and epilogue instructions when unwind information is requested.  This also
  means this work is no longer performed for Windows, which didn't utilize it.
  It also helps simplify the prologue and epilogue generation code.

* Remove the unwind sink implementation that required each unwind information
  to be represented in final form. For FDEs, this meant writing a
  complete frame table per function, which wastes 20 bytes or so for each
  function with duplicate CIEs.  This also enables Cranelift users to collect the
  unwind information and write it as a single frame table.

* For System V calling convention, the unwind information is no longer stored
  in code memory (it's only a requirement for Windows ABI to do so).  This allows
  for more compact code memory for modules with a lot of functions.

* Deletes some duplicate code relating to frame table generation.  Users can
  now simply use gimli to create a frame table from each function's unwind
  information.

Fixes #1181.
2020-04-16 11:15:32 -07:00
Samrat Man Singh
4d34c22a1c Use F64X2 as type when saving and restoring XMM registers
When adding floating-point registers as callee-saved register to
block- and function parameter lists add them as `F64X2` arguments.
2020-04-13 09:48:08 -07:00
iximeow
4cca510085 Windows FPRs preservation (#1216)
Preserve FPRs as required by the Windows fastcall calling convention.

This exposes an implementation limit due to Cranelift's approach to stack layout, which conflicts with expectations Windows makes in SEH layout - functions where the Cranelift user desires fastcall unwind information, that require preservation of an ABI-reserved FPR, that have a stack frame 240 bytes or larger, now produce an error when compiled. Several wasm spectests were disabled because they would trip this limit. This is a temporary constraint that should be fixed promptly.

Co-authored-by: bjorn3 <bjorn3@users.noreply.github.com>
2020-04-10 13:27:20 -07:00
Andrew Brown
6fd0451bc3 Add TargetIsa::map_dwarf_register; fixes #1471
This exposes the functionality of `fde::map_reg` on the `TargetIsa` trait, avoiding compilation errors on architectures where register mapping is not yet supported. The change is conditially compiled under the `unwind` feature.
2020-04-09 09:45:20 -07:00
Andrew Brown
a799f9f6b5 Skip extra work when calculating sizes for recipes with inferred REX prefixes
As explained in the added documentation and #1342, if we prevent `infer_rex()` and `w()` from being used together then we don't need to check whether the W bit is set when calculating the size of a recipe. This should improve compile time for x86 very slightly since all `infer_rex()` instructions will no longer need this check.
2020-04-02 16:50:07 -07:00
Andrew Brown
a4c1147045 Skip extra work when inferring REX prefixes
As explained in the added documentation and #1342, if we prevent `infer_rex()` and `w()` from being used together then we don't need to check whether the W bit is set when figuring out if a REX prefix is needed in `needs_rex()`. This should improve compile time for x86 very slightly since all `infer_rex()` instructions will no longer need this check.
2020-04-02 16:50:07 -07:00
Andrew Brown
e425bfcebd Infer REX prefixes for SIMD load and store with displacement 2020-04-02 11:28:42 -07:00
Andrew Brown
dc874a5b3b Infer REX prefixes for SIMD load_extend 2020-04-02 11:28:42 -07:00
Andrew Brown
d3df275003 Remove duplication of map_reg; fixes #1245
Both cranelift-codegen and wasmtime-debug need to map Cranelift registers to Gimli registers. Previously both crates had an almost-identical `map_reg` implementation. This change:
 - removes the wasmtime-debug implementation
 - improves the cranelift-codegen implementation with custom errors
 - exposes map_reg in `cranelift_codegen::isa::fde::map_reg` and subsequently `wasmtime_environ::isa::fde::map_reg`
2020-03-31 15:42:02 -07:00
Andrew Brown
0d63bd12d8 Infer REX prefix for SIMD operations; fixes #1127
- Convert recipes to have necessary size calculator
- Add a missing binemit function, `put_dynrexmp3`
- Modify the meta-encodings of x86 SIMD instructions to use `infer_rex()`, mostly through the `enc_both_inferred()` helper
- Fix up tests that previously always emitted a REX prefix
2020-03-18 10:12:50 -07:00
Andrew Brown
8598295bc4 Remove FPR32; fixes #1303
Until #1306 is resolved (some spilling/regalloc issue with larger FPR register banks), this removes FPR32 support. Only Wasm's `i64x2.mul` was using this register class and that instruction is predicated on AVX512 support; for the time being, that instruction will have to make do with the 16 FPR registers.
2020-03-17 12:46:41 -07:00
Andrew Brown
965714d675 Add encoding functions for emitting EVEX formats
Only the `reg, vvvv, rm` form is currently supported but it should not be difficult to add more forms.
2020-03-06 10:53:22 -08:00
Andrew Brown
079fcafcb1 Expand x86 registers to include 32 XMM registers
The EVEX encoding format (e.g. in AVX-512) allows addressing 32 registers instead of 16. The FPR register class currently defines 16 registers, `%xmm0`-`%xmm15`; that class is kept as-is with this change. A larger class, FPR32, is added as a super-class of FPR using a larger bank of registers, `%xmm0`-`%xmm31`.
2020-03-06 10:53:22 -08:00
Andrew Brown
3f53bcb740 Remove dependency on hard-coded ordering of x86 register banks
With this change, register banks can now be re-ordered and other components (e.g. unwinding, regalloc) will no longer break. The previous behavior assumed that GPR registers always started at `RegUnit` 0.
2020-03-06 10:53:22 -08:00
bjorn3
0a1bb3ba6c Add TLS support for ELF and MachO (#1174)
* Add TLS support
* Add binemit and legalize tests
* Spill all caller-saved registers when necessary
2020-02-25 17:50:04 -08:00
Andrew Brown
1a9dc743d1 Infer REX prefix for SIMD load instruction 2020-02-19 09:24:05 -08:00
Andrew Brown
936120dcf9 Infer REX prefix for SIMD store and vconst instructions 2020-02-19 09:24:05 -08:00
Peter Delevoryas
18b40d1101 Add ineg legalization for scalar integer types (#1385) 2020-02-14 13:16:02 -08:00
Ryan Hunt
832666c45e Mass rename Ebb and relatives to Block (#1365)
* Manually rename BasicBlock to BlockPredecessor

BasicBlock is a pair of (Ebb, Inst) that is used to represent the
basic block subcomponent of an Ebb that is a predecessor to an Ebb.

Eventually we will be able to remove this struct, but for now it
makes sense to give it a non-conflicting name so that we can start
to transition Ebb to represent a basic block.

I have not updated any comments that refer to BasicBlock, as
eventually we will remove BlockPredecessor and replace with Block,
which is a basic block, so the comments will become correct.

* Manually rename SSABuilder block types to avoid conflict

SSABuilder has its own Block and BlockData types. These along with
associated identifier will cause conflicts in a later commit, so
they are renamed to be more verbose here.

* Automatically rename 'Ebb' to 'Block' in *.rs

* Automatically rename 'EBB' to 'block' in *.rs

* Automatically rename 'ebb' to 'block' in *.rs

* Automatically rename 'extended basic block' to 'basic block' in *.rs

* Automatically rename 'an basic block' to 'a basic block' in *.rs

* Manually update comment for `Block`

`Block`'s wikipedia article required an update.

* Automatically rename 'an `Block`' to 'a `Block`' in *.rs

* Automatically rename 'extended_basic_block' to 'basic_block' in *.rs

* Automatically rename 'ebb' to 'block' in *.clif

* Manually rename clif constant that contains 'ebb' as substring to avoid conflict

* Automatically rename filecheck uses of 'EBB' to 'BB'

'regex: EBB' -> 'regex: BB'
'$EBB' -> '$BB'

* Automatically rename 'EBB' 'Ebb' to 'block' in *.clif

* Automatically rename 'an block' to 'a block' in *.clif

* Fix broken testcase when function name length increases

Test function names are limited to 16 characters. This causes
the new longer name to be truncated and fail a filecheck test. An
outdated comment was also fixed.
2020-02-07 10:46:47 -06:00
Yury Delendik
169dbef784 Properly preserve and restore CFA state in FDE (#1373)
* Properly preserve and restore CFA state in FDE
2020-02-03 14:08:40 -08:00
Ryan Hunt
a15bb9cfcb Codegen: Use GPR regclass for reference types on x86 2020-01-23 13:37:11 -06:00
Andrew Brown
fd04ea2b06 Fix incorrect assertion for insertlane (#1355)
Previously, the assertion checked for `lane > 0` when it should have been `lane >= 0`; since lane is unsigned, this half of the assertion can be entirely removed.
2020-01-17 14:39:31 -08:00
Andrew Brown
e1d513ab4b Fix remaining clippy warnings (#1340)
* clippy: allow complex encoding function

* clippy: remove unnecessary main() function in doctest

* clippy: remove redundant `Type` suffix on LaneType enum variants

* clippy: ignore incorrect debug_assert_with_mut_call warning

* clippy: fix FDE clippy warnings
2020-01-17 14:03:30 -06:00
Benjamin Bouvier
dd497c19e1 Renames Settings ⚠️ (fixes #976) (#1321)
This is a breaking API change: the following settings have been renamed:

- jump_tables_enabled -> enable_jump_tables
- colocated_libcalls -> use_colocated_libcalls
- probestack_enabled -> enable_probestack
- allones_funcaddrs -> emit_all_ones_funcaddrs
2020-01-13 14:42:49 -07:00
Yury Delendik
bd88155483 Refactor unwind; add FDE support. (#1320)
* Refactor unwind

* add FDE support

* use sink directly in emit functions

* pref off all unwinding generation with feature
2020-01-13 10:32:55 -06:00
Andrew Brown
e8c3302bc5 Fix some additional clippy warnings 2020-01-10 08:38:40 -08:00
Sean Stangl
cf9e762f16 Add a DynRex recipe type for x86, decreasing the number of recipes (#1298)
This patch adds a third mode for templates: REX inference is requestable
at template instantiation time. This reduces the number of recipes
by removing rex()/nonrex() redundancy for many instructions.
2019-12-19 15:49:34 -07:00
Andrew Brown
d4df756acf Remove packed_struct dependency; closes #1271 and #1284 (#1282) 2019-12-12 17:01:31 -08:00
llogiq
0d8f8bc71f Fix some clippy warnings (#1277) 2019-12-07 09:47:43 -08:00
iximeow
d804ab8b92 Track frame layout changes. (#1204)
* Track frame layout changes.
2019-11-18 10:18:38 -08:00
Benjamin Bouvier
569a57fa7d Hoist the stack alignment and Windows64 fastcall shadow stack space constants. 2019-11-15 13:58:47 +01:00
Sean Stangl
f8ae622003 Use a struct interface for creating and reading encoding bits on x86. #1156 (#1212) 2019-11-13 18:01:13 -07:00
Nick Fitzgerald
7e32fa2731 Try and assign directly to return registers; backtrack to use struct-return param (#1213)
* Try and assign directly to return registers; backtrack to use struct-return param

Rather than trying to count number of return registers that would be used by a
given set of return values, optimistically assign the return values to
registers. If we later find that we can't fit them all in registers, then
backtrack and introduce the use of a struct-return pointer parameter.

* Rename `rets2` and wrap it in an option so we avoid the clone for non-multi-value
2019-11-08 09:51:57 -08:00
Sean Stangl
a06f2c87c2 Pass Encoding to compute_size() for runtime Encoding inspection. #1156
In some cases, compute_size() is used to choose between various different Encodings
before one has been assigned to an instruction. For x86, the REX.W bit is stored
in the Encoding. To share recipes between REX/non-REX, that bit must be inspected
by compute_size().
2019-11-08 09:08:07 -08:00
Benjamin Bouvier
143cb01489 Do not align the stack frame for leaf functions not using the stack. 2019-11-08 17:20:20 +01:00
Peter Huene
4ccf0fdfa3 Fix build errors in x86 unwind info when building no_std. (#1214)
This commit fixes the build errors in the unwind info implementation for
the x86 ABI by changing `byteorder` to build `no_std`.

This copies two simple functions from the `WriteBytesExt` trait so that
we can easily write to a `Vec<u8>` with a particular endianness.

Fixes #1203.
2019-11-07 16:41:32 -08:00
Nick Fitzgerald
a49483408c Many multi-value returns (#1147)
* Add x86 encodings for `bint` converting to `i8` and `i16`

* Introduce tests for many multi-value returns

* Support arbitrary numbers of return values

This commit implements support for returning an arbitrary number of return
values from a function. During legalization we transform multi-value signatures
to take a struct return ("sret") return pointer, instead of returning its values
in registers. Callers allocate the sret space in their stack frame and pass a
pointer to it into the caller, and once the caller returns to them, they load
the return values back out of the sret stack slot. The callee's return
operations are legalized to store the return values through the given sret
pointer.

* Keep track of old, pre-legalized signatures

When legalizing a call or return for its new legalized signature, we may need to
look at the old signature in order to figure out how to legalize the call or
return.

* Add test for multi-value returns and `call_indirect`

* Encode bool -> int x86 instructions in a loop

* Rename `Signature::uses_sret` to `Signature::uses_struct_return_param`

* Rename `p` to `param`

* Add a clarifiying comment in `num_registers_required`

* Rename `num_registers_required` to `num_return_registers_required`

* Re-add newline

* Handle already-assigned parameters in `num_return_registers_required`

* Document what some debug assertions are checking for

* Make "illegalizing" closure's control flow simpler

* Add unit tests and comments for our rounding-up-to-the-next-multiple-of-a-power-of-2 function

* Use `append_isnt_arg` instead of doing the same thing  manually

* Fix grammar in comment

* Add `Signature::uses_special_{param,return}` helper functions

* Inline the definition of `legalize_type_for_sret_load` for readability

* Move sret legalization debug assertions out into their own function

* Add `round_up_to_multiple_of_type_align` helper for readability

* Add a debug assertion that we aren't removing the wrong return value

* Rename `RetPtr` stack slots to `StructReturnSlot`

* Make `legalize_type_for_sret_store` more symmetrical to `legalized_type_for_sret`

* rustfmt

* Remove unnecessary loop labels

* Do not pre-assign offsets to struct return stack slots

Instead, let the existing frame layout algorithm decide where they should go.

* Expand "sret" into explicit "struct return" in doc comment

* typo: "than" -> "then" in comment

* Fold test's debug message into the assertion itself
2019-11-05 14:36:03 -08:00
Peter Huene
8923bac7e8 Implement emitting Windows unwind information for fastcall functions. (#1155)
* Implement emitting Windows unwind information for fastcall functions.

This commit implements emitting Windows unwind information for x64 fastcall
calling convention functions.

The unwind information can be used to construct a Windows function table at
runtime for JIT'd code, enabling stack walking and unwinding by the operating
system.

* Address code review feedback.

This commit addresses code review feedback:

* Remove unnecessary unsafe code.
* Emit the unwind information always as little endian.
* Fix comments.

A dependency from cranelift-codegen to the byteorder crate was added.
The byteorder crate is a no-dependencies crate with a reasonable
abstraction for writing binary data for a specific endianness.

* Address code review feedback.

* Disable default features for the `byteorder` crate.
* Add a comment regarding the Windows ABI unwind code numerical values.
* Panic if we encounter a Windows function with a prologue greater than 256
  bytes in size.
2019-11-05 13:14:30 -08:00
Andrew Brown
67733bd2fc Use ConstantData exclusively for inserting data into the constant pool
Previously we allowed anything that could be converted into ConstantData (e.g. a Vec).
2019-10-15 15:19:00 -07:00
Andrew Brown
a03f905d08 Replace V128Imm functionality with ConstantData
This moves most original uses of V128Imm (e.g. in parsing) to ConstantData and shifts the unit tests from V128Imm to ConstantData.
2019-10-15 15:19:00 -07:00
Andrew Brown
1600dba634 Make ConstantData a container for any-size constant values
Previously, ConstantData was a type alias for `Vec<u8>` which prevented it from having an implementation; this meant that `V128Imm` and `&[u8; 16]` were used in places that otherwise could have accepted types of different byte lengths.
2019-10-15 15:19:00 -07:00
bjorn3
bb8fa40ef0 Rustfmt 2019-10-02 11:50:44 -07:00
bjorn3
10e226f9ff Always use extern crate std in cranelift-codegen 2019-10-02 11:50:44 -07:00
Andrew Brown
ba393afd4d Add x86 legalization for SIMD ineg 2019-09-30 13:54:30 -07:00
Benjamin Bouvier
c3d01756a3 Baldrdash: uses ECX for the WasmTableCallSigReg on x86 32-bits; 2019-09-30 15:11:06 +02:00
Ujjwal Sharma
43a891dfa2 [codegen] add intcc conditions for reading overflow flag
Add conditions to IntCC for checking the overflow flag (Overflow,
NotOverflow).
2019-09-25 11:42:58 +02:00
Ujjwal Sharma
6e131e5347 [codegen] add intcc conditions for reading carry flag
Add conditions to IntCC for checking the carry flag (Carry, NotCarry).

Fixes: https://github.com/CraneStation/cranelift/issues/980
2019-09-24 15:12:09 -07:00
Andrew Brown
af1499ce99 Add x86 implementation of shuffle 2019-09-19 10:53:40 -07:00
bjorn3
add6a4f269 Correctly zero extend operand of fcvt_from_uint for 8ints and 16bit ints (#997)
Fixes #996
2019-09-18 10:06:15 +02:00
Andrew Brown
295b2ef614 Avoid extra register movement when lowering an x86 insertlane to a float vector 2019-09-10 10:45:12 -07:00