Commit Graph

30 Commits

Author SHA1 Message Date
Dan Gohman
4f53cc1dad Align IntelGOTPCRel4 with R_X86_64_GOTPCREL.
Add an addend field to reloc_external, and use it to move the
responsibility for accounting for the difference between the end of an
instruction (where the PC is considered to be in PC-relative on intel)
and the beginning of the immediate field into the encoding code.

Specifically, this makes IntelGOTPCRel4 directly correspond to
R_X86_64_GOTPCREL, instead of also carrying an implicit `- 4`.
2017-12-15 16:17:32 -06:00
Pat Hickey
88b30ff386 refactor Reloc to an enum of every architecture's reloc types
https://github.com/stoklund/cretonne/pull/206#issuecomment-350905016
2017-12-12 13:57:10 -08:00
Dan Gohman
5f8b1b9f04 Fix a flake8 lint. 2017-10-31 13:05:26 -07:00
Dan Gohman
5d063eb8bc Merge reloc_func and reloc_globalsym into reloc_external. 2017-10-31 12:26:33 -07:00
Dan Gohman
fae5ffb556 Make generated code more consistent with current rustfmt. 2017-10-30 10:06:23 -07:00
Jakob Stoklund Olesen
02e81dd1d7 Fix build after flake8 update.
There's a new version of flake8 out which doesn't like variables names
i, l, I.

No functional change intended.
2017-10-25 11:40:37 -07:00
Dan Gohman
0cacba15b9 Replace as casts with type-conversion functions.
https://github.com/rust-lang-nursery/rust-clippy/wiki#cast_lossless
2017-08-31 14:31:23 -07:00
Jakob Stoklund Olesen
ca99bd1641 Add RISC-V regmove encodings. 2017-07-12 10:43:42 -07:00
Jakob Stoklund Olesen
528e6ff3f5 Generate instruction unwrapping code for binemit recipes.
Generate code to:

- Unwrap the instruction and generate an error if the instruction format
  doesn't match the recipe.
- Look up the value locations of register and stack arguments.

The recipe_* functions in the ISA binemit modules now take these
unwrapped items as arguments.

Also add an optional `emit` argument to the EncRecipe constructor which
makes it possible to provide inline Rust code snippets for code
emission. This requires a lot less boilerplate than recipe_* functions.
2017-07-07 15:10:17 -07:00
Jakob Stoklund Olesen
e15c332471 Encode iconst.i32 for RISC-V.
For large constants with the low 12 bits clear, we already have the
"lui" encoding. Add "addi %x0" encodings for signed 12-bit constants.
2017-06-22 12:13:37 -07:00
Jakob Stoklund Olesen
4503306f0e Add RISC-V encodings for call_indirect. 2017-06-14 16:14:16 -07:00
Jakob Stoklund Olesen
3e1e2b6e5e Add RISC-V encodings for copy instructions. 2017-06-14 15:36:25 -07:00
Jakob Stoklund Olesen
5336bbd4cc Add RISC-V encodings for spill and fill.
Add a Stack() class for specifying operand constraints for values on the
stack.

Add encoding recipes for RISC-V spill and fill instructions. Don't
implement the encoding recipe functions yet since we don't have the
stack slot layout yet.
2017-06-13 13:39:52 -07:00
Jakob Stoklund Olesen
d66a9d196e Implement binary emission of RISC-V return instructions.
The return address is now always supplied in %x1, so the return address
predictor will recognize the jalr as a return and not some indirect
branch.
2017-04-19 16:26:04 -07:00
Jakob Stoklund Olesen
4ee519e620 Add RISC-V call instruction encodings.
Calls are jal with a fixed %x1 link register.
2017-04-11 10:40:38 -07:00
Jakob Stoklund Olesen
896ac935b9 Add jump encodings to RISC-V.
Fix a bug in gen_encoding.py when dealing with non-polymorphic
instructions where the type variable is None in Python, VOID in Rust.
2017-04-06 15:17:57 -07:00
Jakob Stoklund Olesen
598c81c12e Add encoding size information to EncInfo.
Two new pieces of information are available for all encoding recipes:

- The size in bytes of an encoded instruction, and
- The range of a branch encoded with the recipe, if any.

In the meta language, EncRecipe takes two new constructor arguments. The
size is required for all encodings and branch_range is required for all
recipes used to encode branches.
2017-04-05 11:46:19 -07:00
Jakob Stoklund Olesen
e641c97670 Add RISC-V encodings for brz and brnz.
These branches compare a register to zero. RISC-V implements this with
the %x0 hard-coded zero register.
2017-04-03 15:20:57 -07:00
Jakob Stoklund Olesen
479ff156c1 Add conditional branch encodings for RISC-V.
Not all br_icmp opcodes are present in the ISA. The missing ones can be
reached by commuting operands.

Don't attempt to encode EBB offsets yet. For now just emit an EBB
relocation for the branch instruction.
2017-04-03 15:16:25 -07:00
Jakob Stoklund Olesen
0530e822d4 Add RISC-V encodings for lui.
This instruction can materialize constants with the low 12 bits clear.
2017-04-03 12:27:22 -07:00
Jakob Stoklund Olesen
4e398164d2 Add icmp_imm encodings for RISC-V.
The ISA has icmp_imm slt/ult with 12-bit signed immediate operands.
2017-04-03 10:59:28 -07:00
Jakob Stoklund Olesen
e9907fbdd6 Add RISC-V encodings for supported icmp variants.
Only slt and ult variants are in the instruction set. Other condition
codes must be synthesized.
2017-03-31 13:47:07 -07:00
Jakob Stoklund Olesen
910e4e6174 Coalesce some formats into MultiAry.
Allow some flexibility in the signature matching for instruction
formats. In particular, look for a value list format as a second chance
option.

The Return, ReturnReg, and TernaryOverflow formats all fit the single
MultiAry catch-all format for instructions without immediate operands.
2017-03-10 12:32:44 -08:00
Jakob Stoklund Olesen
377550b835 Add return_reg encodings for RISC-V. 2017-02-21 16:29:23 -08:00
Jakob Stoklund Olesen
2390e3e3f0 Add operand register constraints.
Every encoding recipe must specify register constraints on input and
output values.

Generate recipe constraint tables along with the other encoding tables.
2017-01-25 13:35:18 -08:00
Jakob Stoklund Olesen
8846cb8105 Move ISA definitions into cdsl.isa.
The cretonne package is now split into two: cdsl and base.
2016-11-08 13:21:05 -08:00
Jakob Stoklund Olesen
eb688dc72d Move formats, entities, and immediates to the base package.
- base.formats defines instruction formats.
- base.entities defines kinds of entity references.
- base.immediates defines kinds of imediate operands.
2016-11-08 11:06:37 -08:00
Jakob Stoklund Olesen
e6b959436d Split out predicates and settings.
- cdsl.predicates defines classes for describing predicates.
- cdsl.settings defines classes for describing settings.
- base.settings defines shared settings.
2016-11-08 10:37:17 -08:00
Jakob Stoklund Olesen
ed917c394f Add PEP 484 type annotations to a bunch of Python code.
Along with the mypy tool, this helps find bugs in the Python code
handling the instruction definition data structures.
2016-10-26 15:15:51 -07:00
Jakob Stoklund Olesen
af6355e2ef Move the 'meta' dir to 'lib/cretonne/meta'.
The 'lib/cretonne' directory will be the new root of a stand-alone
cretonne crate containg both Python and Rust sources.

This is in preparation for publishing crates on crates.io.
2016-10-17 14:19:23 -07:00