479ff156c1
Not all br_icmp opcodes are present in the ISA. The missing ones can be reached by commuting operands. Don't attempt to encode EBB offsets yet. For now just emit an EBB relocation for the branch instruction.
119 lines
3.1 KiB
Python
119 lines
3.1 KiB
Python
"""
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RISC-V Encoding recipes.
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The encoding recipes defined here more or less correspond to the RISC-V native
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instruction formats described in the reference:
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The RISC-V Instruction Set Manual
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Volume I: User-Level ISA
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Version 2.1
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"""
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from __future__ import absolute_import
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from cdsl.isa import EncRecipe
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from cdsl.predicates import IsSignedInt
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from base.formats import Binary, BinaryImm, MultiAry, IntCompare, IntCompareImm
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from base.formats import UnaryImm, BranchIcmp
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from .registers import GPR
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# The low 7 bits of a RISC-V instruction is the base opcode. All 32-bit
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# instructions have 11 as the two low bits, with bits 6:2 determining the base
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# opcode.
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#
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# Encbits for the 32-bit recipes are opcode[6:2] | (funct3 << 5) | ...
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# The functions below encode the encbits.
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def LOAD(funct3):
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# type: (int) -> int
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assert funct3 <= 0b111
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return 0b00000 | (funct3 << 5)
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def STORE(funct3):
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# type: (int) -> int
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assert funct3 <= 0b111
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return 0b01000 | (funct3 << 5)
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def BRANCH(funct3):
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# type: (int) -> int
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assert funct3 <= 0b111
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return 0b11000 | (funct3 << 5)
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def JALR(funct3=0):
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# type: (int) -> int
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assert funct3 <= 0b111
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return 0b11001 | (funct3 << 5)
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def OPIMM(funct3, funct7=0):
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# type: (int, int) -> int
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assert funct3 <= 0b111
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return 0b00100 | (funct3 << 5) | (funct7 << 8)
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def OPIMM32(funct3, funct7=0):
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# type: (int, int) -> int
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assert funct3 <= 0b111
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return 0b00110 | (funct3 << 5) | (funct7 << 8)
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def OP(funct3, funct7):
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# type: (int, int) -> int
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assert funct3 <= 0b111
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assert funct7 <= 0b1111111
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return 0b01100 | (funct3 << 5) | (funct7 << 8)
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def OP32(funct3, funct7):
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# type: (int, int) -> int
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assert funct3 <= 0b111
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assert funct7 <= 0b1111111
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return 0b01110 | (funct3 << 5) | (funct7 << 8)
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def AIUPC():
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# type: () -> int
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return 0b00101
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def LUI():
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# type: () -> int
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return 0b01101
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# R-type 32-bit instructions: These are mostly binary arithmetic instructions.
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# The encbits are `opcode[6:2] | (funct3 << 5) | (funct7 << 8)
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R = EncRecipe('R', Binary, ins=(GPR, GPR), outs=GPR)
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# R-type with an immediate shift amount instead of rs2.
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Rshamt = EncRecipe('Rshamt', BinaryImm, ins=GPR, outs=GPR)
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# R-type encoding of an integer comparison.
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Ricmp = EncRecipe('Ricmp', IntCompare, ins=(GPR, GPR), outs=GPR)
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I = EncRecipe(
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'I', BinaryImm, ins=GPR, outs=GPR,
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instp=IsSignedInt(BinaryImm.imm, 12))
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# I-type encoding of an integer comparison.
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Iicmp = EncRecipe(
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'Iicmp', IntCompareImm, ins=GPR, outs=GPR,
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instp=IsSignedInt(IntCompareImm.imm, 12))
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# I-type encoding for `jalr` as a return instruction. We won't use the
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# immediate offset.
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# The variable return values are not encoded.
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Iret = EncRecipe('Iret', MultiAry, ins=GPR, outs=())
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# U-type instructions have a 20-bit immediate that targets bits 12-31.
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U = EncRecipe(
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'U', UnaryImm, ins=(), outs=GPR,
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instp=IsSignedInt(UnaryImm.imm, 32, 12))
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# SB-type branch instructions.
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# TODO: These instructions have a +/- 4 KB branch range. How to encode that
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# constraint?
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SB = EncRecipe('SB', BranchIcmp, ins=(GPR, GPR), outs=())
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