Commit Graph

3154 Commits

Author SHA1 Message Date
Andrew Brown
d730f18a78 [x64] Add the new i64x2 comparisons 2021-03-01 17:52:34 -08:00
Andrew Brown
44e76fe9c0 Update spec tests (#2690)
* Update wasm-tools crates

* Update Wasm SIMD spec tests

* Invert 'experimental_x64_should_panic' logic

By doing this, it is easier to see which spec tests currently panic. The new tests correspond to recently-added instructions.

* Fix: ignore new spec tests for all backends
2021-03-01 16:39:20 -06:00
Chris Fallin
cdb60ec5a9 Merge pull request #2682 from cfallin/shift-bugs
Fix some `i128` shift-related bugs in x64 backend.
2021-02-26 15:13:08 -08:00
Nick Fitzgerald
824ce7bf89 deps: Update Arbitrary to 1.0; libfuzzer-sys to 0.4.0; wasm-smith to 0.4.0 2021-02-25 15:34:02 -08:00
Chris Fallin
6dcb31abb7 Fix 128-bit left shift: null out tmp3, not tmp2, on zero-shift case.
Add a bunch of test vectors that actually expose this (previously the
shift-by-zero test had equal lower and upper halves and hid the bug),
including the most basic of all, 1 << 0 == 1 (thanks @bjorn3 for finding
this).
2021-02-25 09:46:57 -08:00
Chris Fallin
40db4de44a Fix incomplete trap metadata due to multiple traps at one address.
If an instruction has more than one trap record associated with it (for
example: a divide instruction that has participated in load-op fusion,
so we have both a heap-out-of-bounds trap record due to its load and a
divide-by-zero trap record due to its divide op), the current MachBuffer
code would emit only one of the trap records to the sink.

Separately, divide instructions probably shouldn't merge loads, because
the two separate possible traps at one location might be confusing for
some embedders (certainly in Lucet). Divide seems to be the only case in
our current codegen where such merging might occur. This PR changes the
lowering to always force the divisor into a register.

Finally, while working out why trap records were not appearing, I had
noticed that `isa::x64::emit_std_enc_mem()` was only emitting heap-OOB
trap metadata for loads/stores when it had a srcloc. This PR ensures
that the metadata is emitted even when the srcloc is empty.

Note that none of the above presents a security or correctness problem;
trap metadata only affects the status that we return to the embedder
when a Wasm program terminates with a trap.
2021-02-24 15:13:45 -08:00
Chris Fallin
0cc4a3d445 Merge pull request #2683 from cfallin/br-table-unreachable
Fix bad jumptable block ref when DCE removes a block.
2021-02-23 16:31:19 -08:00
Chris Fallin
48d542d67c Fix bad jumptable block ref when DCE removes a block.
When a block is unreachable, the `unreachable_code` pass will remove it,
which is perfectly sensible. Jump tables factor into unreachability in
an expected way: even if a block is listed in a jump table, the block
might be unreachable if the jump table itself is unused (or used in an
unreachable block). Unfortunately, the verifier still expects all
block refs in all jump tables to be valid, even after DCE, which will
not always be the case.

This makes a simple change to the pass: after removing blocks, it scans
jump tables. Any jump table that refers to an unreachable block must
itself be unused, and so we just clear its entries. We do not bother
removing it (and renumbering all later jumptables), and we do not bother
computing full unused-ness of all jumptables, as that would be more
expensive; it's sufficient to clear out the ones that refer to
unreachable blocks, which are a subset of all unused jumptables.

Fixes #2670.
2021-02-23 15:01:01 -08:00
Chris Fallin
0f3e00b25e Fix some i128 shift-related bugs in x64 backend.
This fixes #2672 and #2679, and also fixes an incorrect instruction
emission (`test` with small immediate) that we had missed earlier.

The shift-related fixes have to do with (i) shifts by 0 bits, as a
special case that must be handled; and (ii) shifts by a 128-bit amount,
which we can handle by just dropping the upper half (we only use 3--7
bits of shift amount).

This adjusts the lowerings appropriately, and also adds run-tests to
ensure that the lowerings actually execute correctly (previously we only
had compile-tests with golden lowerings; I'd like to correct this for
more ops eventually, adding run-tests beyond what the Wasm spec and
frontend covers).
2021-02-23 14:22:04 -08:00
Pat Hickey
ee1ddfb6f9 Merge pull request #2674 from bjorn3/module_improvements
Make Module object safe
2021-02-23 09:20:26 -08:00
Alex Crichton
98d3e6823f Update wasmparser/wat dependencies (#2675)
* Update wasmparser/wat dependencies

Bring in new opcodes and new instructions for SIMD

* Update module linking syntax
2021-02-22 11:56:34 -06:00
bjorn3
a710fc4425 Make Module object safe 2021-02-22 16:00:37 +01:00
Chris Fallin
c07ec4c525 Merge pull request #2653 from bjorn3/more_atomic_ops
More atomic ops
2021-02-18 08:34:58 -08:00
bjorn3
ff22842da5 More atomic ops 2021-02-18 14:16:15 +01:00
bjorn3
0693b7dade Include git rev in the version number 2021-02-18 13:01:01 +01:00
bjorn3
720da20588 Describe serialization format 2021-02-18 11:27:51 +01:00
bjorn3
a0c2276ee7 Add a version marker
This prevents deserializing a function with a different Cranelift version
2021-02-18 11:27:51 +01:00
bjorn3
71e468a954 Remove most of cranelift-serde 2021-02-18 11:27:49 +01:00
bjorn3
2fc964ea35 Add serde serialization support for the full clif ir 2021-02-18 11:27:02 +01:00
Kasey Carrothers
9c3edee9d0 Add methods to construct RexFlags from OperandSizes.
This unifies the logic around Rex prefix emission and hopefully makes REX prefix errors less likely.
There are still several instructions that use other sources to determine the flags, so set_w and clear_w are left as is.

Additional cleanups:
  * Change always_emit_if_8bit_needed to take a Reg instead of a u8 for type safety.
  * Deduplicated emission code in MovRM.
2021-02-17 18:48:05 -08:00
Dan Gohman
8d90ea0390 Bump version to 0.23.0
I used a specially modified version of the publish script to avoid
bumping the `witx` version.
2021-02-17 15:35:43 -08:00
c0deb0t
fdd6bcae2e Specified type for V128AnyTrue 2021-02-16 15:13:23 -08:00
Chris Fallin
e5267f056f Update rand dependency to 0.8.3. 2021-02-16 14:10:05 -08:00
Chris Fallin
8cd64e3ec6 Fix warnings (causing CI failures) with new Rust beta.
- Panic messages must now be string literals (we used `format!()` in
  many places; `panic!()` can take format strings directly).
- Some dead enum options with EVEX encoding stuff in old x86 backend.
  This will go away soon and/or be moved to the new backend anyway, so
  let's silence the warning for now.
- A few other misc warnings.
2021-02-16 14:10:05 -08:00
Dan Gohman
b396f6dc6f Switch from memmap to memmap2.
See https://rustsec.org/advisories/RUSTSEC-2020-0077
2021-02-16 14:10:05 -08:00
Dan Gohman
d598883f3a Switch from term to termcolor.
See https://rustsec.org/advisories/RUSTSEC-2018-0015
2021-02-16 14:10:05 -08:00
Alex Crichton
09b976e1d5 Fix a number of warnings on nightly Rust (#2652)
This fixes some issues that are cropping up where some syntax will get
phased out in 2021
2021-02-11 12:42:45 -06:00
bjorn3
602006ff9d Fix build_value_labels_ranges for newBE when there are no labels 2021-02-04 11:46:20 +01:00
Kasey Carrothers
7bd96c8e2f Refactor x64::Insts that use an is_64 bool to use OperandSize. 2021-02-03 10:40:11 -08:00
Kasey Carrothers
3306408100 Refactor x64::Inst to use OperandSize instead of u8s.
TODO: some types take a 'is_64_bit' bool. Those are left unchanged for now.
2021-02-03 10:40:11 -08:00
Kasey Carrothers
b12d41bfe9 Expand x64 OperandSize to support 8 and 16-bit operands.
This is in preparation for refactoring all x64::Inst arms to use OperandSize.

Current uses of OperandSize fall into two categories:
  1. XMM operations which require 32/64 bit operands
  2. Immediates which only care about 64-bit or not.

Adds assertions to existing Inst constructors to check that they are passed valid sizes.
This change also removes the implicit widening of 1 and 2 byte values to 4 bytes. from_bytes() is only used by category 2, so removing this behavior will not change any visible behavior.

Overall this change should be a no-op.
2021-02-03 10:40:11 -08:00
bjorn3
76d615049d Make the stackslot offsets available for debuginfo 2021-02-03 17:48:52 +01:00
bjorn3
81b4e48f9f Remove some uses of riscv in tests (#2600)
* Remove some uses of riscv in tests

* Fix typo

* Apply suggestions from code review

* Apply suggestions from code review

Co-authored-by: Benjamin Bouvier <public@benj.me>
2021-01-30 23:54:48 +01:00
Benjamin Bouvier
13027ad670 cranelift x64: add instruction set checks for popcnt/tzcnt/lzcnt; 2021-01-30 13:38:55 +01:00
Benjamin Bouvier
2275519cb1 cranelift x64: use the POPCNT instruction for Popcount when it's available; 2021-01-29 19:41:01 +01:00
Benjamin Bouvier
6bf6612d96 cranelift x64: use the TZCNT instruction for Ctz when it's available; 2021-01-29 19:41:01 +01:00
Benjamin Bouvier
d3acd9a283 cranelift x64: use the LZCNT instruction for Clz when it's available; 2021-01-29 19:41:01 +01:00
Chris Fallin
b1b078e2bc Merge pull request #2621 from kaseyc/nop
Replace MachInst::gen_zero_len_nop with gen_nop(0)
2021-01-29 09:01:36 -08:00
Alex Crichton
0e41861662 Implement limiting WebAssembly execution with fuel (#2611)
* Consume fuel during function execution

This commit adds codegen infrastructure necessary to instrument wasm
code to consume fuel as it executes. Currently nothing is really done
with the fuel, but that'll come in later commits.

The focus of this commit is to implement the codegen infrastructure
necessary to consume fuel and account for fuel consumed correctly.

* Periodically check remaining fuel in wasm JIT code

This commit enables wasm code to periodically check to see if fuel has
run out. When fuel runs out an intrinsic is called which can do what it
needs to do in the result of fuel running out. For now a trap is thrown
to have at least some semantics in synchronous stores, but another
planned use for this feature is for asynchronous stores to periodically
yield back to the host based on fuel running out.

Checks for remaining fuel happen in the same locations as interrupt
checks, which is to say the start of the function as well as loop
headers.

* Improve codegen by caching `*const VMInterrupts`

The location of the shared interrupt value and fuel value is through a
double-indirection on the vmctx (load through the vmctx and then load
through that pointer). The second pointer in this chain, however, never
changes, so we can alter codegen to account for this and remove some
extraneous load instructions and hopefully reduce some register
pressure even maybe.

* Add tests fuel can abort infinite loops

* More fuzzing with fuel

Use fuel to time out modules in addition to time, using fuzz input to
figure out which.

* Update docs on trapping instructions

* Fix doc links

* Fix a fuzz test

* Change setting fuel to adding fuel

* Fix a doc link

* Squelch some rustdoc warnings
2021-01-29 08:57:17 -06:00
Amanieu d'Antras
78f312799e Optimize EntityList::extend and add EntityList::from_iter 2021-01-29 14:09:52 +01:00
Kasey Carrothers
99be82c866 Replace MachInst::gen_zero_len_nop with gen_nop(0) 2021-01-29 01:15:08 -08:00
Chris Fallin
ac60ad6c9a Merge pull request #2614 from kaseyc/nop
Avoid creating 0-sized nops in x64's gen_nop().
2021-01-28 21:37:39 -08:00
Kasey Carrothers
f76a9d436e Clean up handling of NOPs in the x64 backend.
1. Restricts max nop size to 15 instead of 16.
2. Fixes an edge case where gen_nop() would return a zero sized intruction on multiples of 16.
3. Clarifies the documentation of the gen_nop interface to state that returning zero is allowed when preferred_size is zero.
2021-01-28 20:45:00 -08:00
Johnnie Birch
cbd7a6a80e Add sse41 lowering for rounding x64 2021-01-28 17:37:17 -08:00
Alex Crichton
7f840870c7 cranelift-native: Use libstd feature detection (#2607)
This commit switches cranelift-native to useing the
`is_x86_feature_detected!` macro in the standard library instead of the
`raw-cpuid` crate.
2021-01-26 16:42:11 -06:00
Alex Crichton
503129ad91 Add a method to share Config across machines (#2608)
With `Module::{serialize,deserialize}` it should be possible to share
wasmtime modules across machines or CPUs. Serialization, however, embeds
a hash of all configuration values, including cranelift compilation
settings. By default wasmtime's selection of the native ISA would enable
ISA flags according to CPU features available on the host, but the same
CPU features may not be available across two machines.

This commit adds a `Config::cranelift_clear_cpu_flags` method which
allows clearing the target-specific ISA flags that are automatically
inferred by default for the native CPU. Options can then be
incrementally built back up as-desired with teh `cranelift_other_flag`
method.
2021-01-26 15:59:12 -06:00
omar
79649a15f6 Update README.md 2021-01-25 15:29:51 -08:00
Kasey Carrothers
c6c5fe48b6 Add i128.icmp run tests for the x64 backend. 2021-01-25 13:02:21 -08:00
Kasey Carrothers
c55c5e0506 Add additional tests for icmp-i128. Fixes #1136.
Tests added:
  * eq with nonzero values
  * gt with nonzero values
  * ge with nonzero values
2021-01-25 13:02:20 -08:00
Chris Fallin
3c5416446c Fix cargo-deny issue with raw-cpuid advisory.
cargo-deny tells us that we should upgrade raw-cpuid to v9.0.0. This
new version also seems to lack the `nightly` feature (perhaps it has
been incorporated into the base functionality) so I had to remove this
feature selector to build.
2021-01-25 08:32:06 -08:00