Commit Graph

206 Commits

Author SHA1 Message Date
Johnnie Birch
2eadc6e2a8 Add packed integer add opcodes (v128) to instruction set enum 2020-08-06 22:25:18 -07:00
Andrew Brown
4cb36afd7b machinst x64: refactor to use types::[type] everywhere
This change is a pure refactoring--no change to functionality. It removes `use crate::ir::types::*` imports and uses instead `types::I32`, e.g., throughout the x64 code. Though it increases code verbosity, this change makes it more clear where the type identifiers come from (they are generated by `cranelif-codegen-meta` so without a prefix it is difficult to find their origin), avoids IDE confusion (e.g. CLion flags the un-prefixed identifiers as errors), and avoids importing unwanted identifiers into the namespace.
2020-08-05 10:45:45 -07:00
Andrew Brown
8cfff26957 machinst x64: implement floating point comparisons
Note that this fixes an encoding issue in which the packed single and packed double prefixes were flipped.
2020-08-04 13:24:38 -07:00
Andrew Brown
c21fe0eb73 machinst x64: use assert_eq! when possible 2020-08-04 09:18:45 -07:00
Andrew Brown
999e04a2c4 machinst x64: refactor imports to use rustfmt convention
This change is a pure refactoring--no change to functionality. It removes newlines between the `use ...` statements in the x64 backend so that rustfmt can format them according to its convention. I noticed some files had followed a manual convention but subsequent additions did not seem to fit; this change fixes that and lightly coalesces some of the occurrences of `use a::b; use a::c;` into `use::{b, c}`.
2020-08-04 09:17:54 -07:00
Benjamin Bouvier
e108f14620 machinst x64: use xor/xorpss/xorpd to generate zero constants; 2020-07-31 13:17:52 -07:00
Andrew Brown
999fa00d6a machinst x64: add loading of inline 128-bit constants
Eventually the `load + jmp + constant` pattern should be replaced with just `load` once constant pools are more tightly integrated.
2020-07-30 14:16:12 -07:00
Andrew Brown
eda5c6d370 machinst x64: add packed FP negation 2020-07-30 14:16:12 -07:00
Andrew Brown
0398033447 machinst x64: add packed FP comparisons
Re-orders the SseOpcode variants alphabetically.
2020-07-30 14:16:12 -07:00
Andrew Brown
e3bd8d696b machinst x64: add basic packed FP arithmetic
Includes instruction definition of packed min/max.
2020-07-30 14:16:12 -07:00
Andrew Brown
77cc2f69c1 machinst x64: allow use of vector-length types 2020-07-30 14:16:12 -07:00
Benjamin Bouvier
79abcdb035 machinst x64: add testing to the CI; 2020-07-30 10:32:00 +02:00
Benjamin Bouvier
7f109a5198 machinst x64: use a sign-extension when loading jump table offsets;
The jump table offset that's loaded out of the jump table could be
signed (if it's an offset to before the jump table itself), so we should
use a signed extension there, not an unsigned extension.
2020-07-28 12:29:49 +02:00
Benjamin Bouvier
35d9ab19b7 Review fixes; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
ad4a2f919f machinst x64: implement support for reference types; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
987c616bf5 machinst x64: implement support for dynamic heaps and explicit bound checks; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
de4923356a machinst x64: fix fcmp comparison for NotEqual;
We have to emit both checks against the parity bit (for unordered) and
non-equality bit (for equality), otherwise this returns false when
comparing NaN against itself.
2020-07-24 19:29:12 +02:00
Benjamin Bouvier
aa103698d4 machinst x64: extend Copysign to work for f64 inputs too; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
694af3aec2 machinst x64: implement float Floor/Ceil/Trunc/Nearest as VM calls; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
48ec806a9d machinst x64: implement Fabs/Fneg in terms of other instructions; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
03b9e1e86a machinst x64: implement float min/max with the right semantics; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
e43310a088 machinst x64: adapt conversions for saturation behaviors; 2020-07-24 19:29:12 +02:00
Benjamin Bouvier
cd54f05efd machinst x64: implement float-to-int and int-to-float conversions; 2020-07-24 19:29:12 +02:00
Johnnie Birch
a7cedf3100 Add support for 32 bit and 64 bit fcmp for the new backend
Implements commiss and commisd.
2020-07-17 13:46:54 -07:00
Benjamin Bouvier
ead8a835c4 machinst x64: add more FP support 2020-07-17 15:56:44 +02:00
Benjamin Bouvier
bab337fc32 Address review comments; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
5a55646fc3 machinst x64: support out-of-bounds memory accesses; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
ea33ce9116 machinst x64: basic support for baldrdash
+ fix multi-value support
2020-07-16 18:21:06 +02:00
Benjamin Bouvier
00b38c91f6 machinst x64: fix generation of RegMemImm immediate operands; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
3905a1b17b machinst x64: implement SymbolValue and FuncAddr with a movabsq+reloc; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
cfa0a0c4e8 machinst x64: lower resumable_trap as trap; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
311027869b machinst x64: implement popcnt.i64 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
d9310e8d90 machinst x64: fix checked div sequence
- it should mark as clobbering (def) rdx, not modifying it
- the signed-div check requires a temporary to compare against int64_min
2020-07-16 18:21:06 +02:00
Benjamin Bouvier
6f5403a94b machinst x64: lower Ctz using the Bsf x86 instruction 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
fe7dd41435 machinst x64: fix iconst emission 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
ec2209665a machinst x64: implement bsr and lower Clz; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
eda2d143ed machinst x64: add support for umulhi/smulhi; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
571061fe4c machinst x64: add support for rotations; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
22892466e7 machinst x64: fix implementation of *reduce;
They should just generate a plain move, since the high bits are then
ignored, and not an extended move.
2020-07-16 18:21:06 +02:00
Benjamin Bouvier
9d5be00de4 Address review comments
- put the division in the synthetic instruction as well,
- put the branch table check in the inst's emission code,
- replace OneWayCondJmp by TrapIf vcode instruction,
- add comments describing code generated by the synthetic instructions
2020-07-03 14:33:52 +02:00
Benjamin Bouvier
2115e70acb machinst x64: implement enough to support branch tables; 2020-07-03 14:33:52 +02:00
Benjamin Bouvier
f86ecdcb86 machinst x64: lower and implement div/idiv; ADD TESTS 2020-07-03 14:33:52 +02:00
Benjamin Bouvier
9d1bcfb2e8 machinst x64: implement cmov 2020-07-03 14:33:52 +02:00
Benjamin Bouvier
bd88065571 machinst x64: lower binary ALU operators; 2020-07-03 14:33:52 +02:00
Benjamin Bouvier
08efcbd9d5 machinst x64: use movss for f32 loads; 2020-07-03 11:19:32 +02:00
Johnnie Birch
0aa56c500c Add x64 lowering of Clif flt load instruction for new backend
Adds support for the clif flt load instruction.
2020-07-01 17:48:33 -07:00
Johnnie Birch
f2dd1535d5 Add x64 lowering of Clif flt store instruction for new backend
Adds support for the clif flt store instruction.
2020-07-01 14:54:59 -07:00
Benjamin Bouvier
c9a3f05afd machinst x64: implement calls and int cmp/store/loads;
This makes it possible to run a simple recursive fibonacci function in
wasmtime.
2020-06-25 16:20:33 +02:00
Johnnie Birch
2d364f75bd Remove xmm_r_r inst data structure and cases after related refactoring
Removes unneeded data structure that was holding instructions for
xmm based move instructions. These instructions can should be categorized
as rm not just r. This change is intended to simplify organization and
cases when lowering.
2020-06-25 14:31:51 +02:00
Johnnie Birch
f2f7706265 Implements vcode lowering for f32.copysign.
This patch implements the required but not already available
x64 instructions for copysign as well as the actual lowering sequence
and tests for the newly implemented x64 instructions.
Those instructions include:

andps,
andnps,
movaps,
movd,
orps,

The lowering sequence is based on the lowering for f32.copysign
in the current cranelift backend. movd does not have a test yet
due to some logic needed express a 32-bit register as a source
for xmm_rm_r instructions. This code also begins some
rethinking/refactoring of how the sse move instuctions
are written and so also includes new emit cases that will replace
current ones that match a different enum used to describe sse moves.
2020-06-24 11:47:26 -07:00