Commit Graph

8918 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
2c0d4136b0 Propagate a few more LiveRange properties to LiveValue.
The live value tracker goes through the trouble of looking up the live
range for each value it tracks. We can cache a few more interesting
properties from the live range in the LiveValue struct.
2017-05-11 11:28:39 -07:00
Jakob Stoklund Olesen
9d4e23d894 Propagate a few more LiveRange properties to LiveValue.
The live value tracker goes through the trouble of looking up the live
range for each value it tracks. We can cache a few more interesting
properties from the live range in the LiveValue struct.
2017-05-11 11:28:39 -07:00
Dan Gohman
38fa75459e Check for unknown instruction attributes. (#80)
* Check for unknown instruction attributes.

* Avoid has_key, at flake8's advice.

* Use AssertionError instead of RuntimeError, per review request.
2017-05-11 10:21:59 -07:00
Dan Gohman
5ff2257b12 Check for unknown instruction attributes. (#80)
* Check for unknown instruction attributes.

* Avoid has_key, at flake8's advice.

* Use AssertionError instead of RuntimeError, per review request.
2017-05-11 10:21:59 -07:00
Dan Gohman
fb9d86f852 Fix rustfmt diffs. 2017-05-11 06:57:55 -07:00
Dan Gohman
526feb161a Fix rustfmt diffs. 2017-05-11 06:57:55 -07:00
Dan Gohman
ad9a942f52 Use write! in utility code, rather than calling write_function directly. 2017-05-11 06:57:55 -07:00
Dan Gohman
c571975a5c Use write! in utility code, rather than calling write_function directly. 2017-05-11 06:57:55 -07:00
Jakob Stoklund Olesen
6b4c28d554 Use a constraint solver for register coloring.
Most of the time, register coloring is almost trivial: just pick
available registers for the values defined by the current instruction.
However, some instructions have register operand constraints, and it may
be necessary to move live registers around to satisfy the constraints.
Sometimes the instruction's own operands can interfere with each other
in a way that you can't just pick a register assignment for each output
in order.

This is complicated enough that it is worthwhile to represent as a
constraint satisfaction problem in a separate solver module. The
representation is chosen to be very fast in the common case where the
constraints are trivial to solve.

The current implementation is still incomplete, but as functional as the
code it's replacing. Missing features:

- Handle tied operand constraints.
- Handle ABI constraints on calls and return instructions.
- Execute a constraint solution by emitting regmove instructions.
- Handling register diversions before leaving the EBB.
2017-05-09 14:48:45 -07:00
Jakob Stoklund Olesen
be047ba5c4 Use a constraint solver for register coloring.
Most of the time, register coloring is almost trivial: just pick
available registers for the values defined by the current instruction.
However, some instructions have register operand constraints, and it may
be necessary to move live registers around to satisfy the constraints.
Sometimes the instruction's own operands can interfere with each other
in a way that you can't just pick a register assignment for each output
in order.

This is complicated enough that it is worthwhile to represent as a
constraint satisfaction problem in a separate solver module. The
representation is chosen to be very fast in the common case where the
constraints are trivial to solve.

The current implementation is still incomplete, but as functional as the
code it's replacing. Missing features:

- Handle tied operand constraints.
- Handle ABI constraints on calls and return instructions.
- Execute a constraint solution by emitting regmove instructions.
- Handling register diversions before leaving the EBB.
2017-05-09 14:48:45 -07:00
Jakob Stoklund Olesen
2873019779 Add a register diversion tracker.
Keep track of the current location of register values as regmove
instructions are encountered throughout an EBB.
2017-05-09 14:48:45 -07:00
Jakob Stoklund Olesen
0dbdd90af7 Add a register diversion tracker.
Keep track of the current location of register values as regmove
instructions are encountered throughout an EBB.
2017-05-09 14:48:45 -07:00
Jakob Stoklund Olesen
a0085434af Add encodings for Intel dynamic shift instructions.
These instructions have a fixed register constraint; the shift amount is
passed in CL.

Add meta language syntax so a fixed register can be specified as
"GPR.rcx".
2017-05-09 13:11:50 -07:00
Jakob Stoklund Olesen
cdb3a71dd1 Add encodings for Intel dynamic shift instructions.
These instructions have a fixed register constraint; the shift amount is
passed in CL.

Add meta language syntax so a fixed register can be specified as
"GPR.rcx".
2017-05-09 13:11:50 -07:00
Dan Gohman
976b22d816 Make srem have the sign of the dividend.
This is how remainder is defined in C (as of C99), C++ (as of C++11), Rust,
and WebAssembly, for example.
2017-05-09 12:28:15 -07:00
Dan Gohman
db9f64d2f3 Make srem have the sign of the dividend.
This is how remainder is defined in C (as of C99), C++ (as of C++11), Rust,
and WebAssembly, for example.
2017-05-09 12:28:15 -07:00
Jakob Stoklund Olesen
041fda63ac Add the very basics of Intel 32-bit instruction encodings.
Tabulate the Intel opcode representations and implement an OP() function
which computes the encoding bits.

Implement the single-byte opcode with a reg-reg ModR/M byte.
2017-05-08 16:57:38 -07:00
Jakob Stoklund Olesen
5bdb61a5f1 Add the very basics of Intel 32-bit instruction encodings.
Tabulate the Intel opcode representations and implement an OP() function
which computes the encoding bits.

Implement the single-byte opcode with a reg-reg ModR/M byte.
2017-05-08 16:57:38 -07:00
Jakob Stoklund Olesen
39e69ff565 Add constraint summaries to RecipeConstraints.
Most instructions don't have any fixed register constraints. Add boolean
summaries that can be used to check if it is worthwhile to scan the
constraint lists when looking for a fixed register constraint.

Also add a tied_ops summary bool which indicates that the instruction
has tied operand constraints.
2017-05-08 16:41:24 -07:00
Jakob Stoklund Olesen
3d2fdec1af Add constraint summaries to RecipeConstraints.
Most instructions don't have any fixed register constraints. Add boolean
summaries that can be used to check if it is worthwhile to scan the
constraint lists when looking for a fixed register constraint.

Also add a tied_ops summary bool which indicates that the instruction
has tied operand constraints.
2017-05-08 16:41:24 -07:00
Jakob Stoklund Olesen
0f41cbdee2 Add support for tied operand constraints.
The register constraint for an output operand can be specified as an
integer indicating the input operand number to tie. The tied operands
must use the same register.

Generate operand constraints using ConstraintKind::Tied(n) for both the
tied operands. The n index refers to the opposite array. The input
operand refers to the outs array and vice versa.
2017-05-08 16:31:47 -07:00
Jakob Stoklund Olesen
b3b15f9c32 Add support for tied operand constraints.
The register constraint for an output operand can be specified as an
integer indicating the input operand number to tie. The tied operands
must use the same register.

Generate operand constraints using ConstraintKind::Tied(n) for both the
tied operands. The n index refers to the opposite array. The input
operand refers to the outs array and vice versa.
2017-05-08 16:31:47 -07:00
Jakob Stoklund Olesen
402e437a4a Also return live-through values from process_inst().
The coloring algorithm will need to look at the live-through values to
check if they interfere with fixed-register outputs for calls etc.
2017-05-08 13:57:39 -07:00
Jakob Stoklund Olesen
fedc834ecd Also return live-through values from process_inst().
The coloring algorithm will need to look at the live-through values to
check if they interfere with fixed-register outputs for calls etc.
2017-05-08 13:57:39 -07:00
Jakob Stoklund Olesen
f8a3a01f96 Add a few register utilities. 2017-05-08 13:39:26 -07:00
Jakob Stoklund Olesen
d1d6c626d9 Add a few register utilities. 2017-05-08 13:39:26 -07:00
Jakob Stoklund Olesen
aaa70a677d Add a regs_overlap function to the isa module.
Test it with the arm32 register banks which have the most interesting
properties. Most other registers have a single register unit.
2017-05-08 13:36:27 -07:00
Jakob Stoklund Olesen
9bbeaeda24 Add a regs_overlap function to the isa module.
Test it with the arm32 register banks which have the most interesting
properties. Most other registers have a single register unit.
2017-05-08 13:36:27 -07:00
Jakob Stoklund Olesen
aecd90a1b9 Run mypy in python 3 mode.
This still picks up the 2.7 type annotations in comments.

Fix the compute_quadratic signature to allow for the ValuewView of an
OrderedDict in python 3.
2017-05-08 13:29:01 -07:00
Jakob Stoklund Olesen
673279068f Run mypy in python 3 mode.
This still picks up the 2.7 type annotations in comments.

Fix the compute_quadratic signature to allow for the ValuewView of an
OrderedDict in python 3.
2017-05-08 13:29:01 -07:00
Jakob Stoklund Olesen
1818bb18b5 Ignore .mypy_cache
A recent mypy update started writing the .mypy_cache directory which we
don't want under version control. The cache is only used by the
experimental "mypy --incremental" mode which we don't use, but it is
always written anyway.
2017-05-08 13:28:49 -07:00
Jakob Stoklund Olesen
7a1ba057e4 Ignore .mypy_cache
A recent mypy update started writing the .mypy_cache directory which we
don't want under version control. The cache is only used by the
experimental "mypy --incremental" mode which we don't use, but it is
always written anyway.
2017-05-08 13:28:49 -07:00
Jakob Stoklund Olesen
950838c489 Add a regmove instruction.
This will be used to locally change the register locations of values in
order to satisfy instruction constraints.
2017-05-02 11:32:12 -07:00
Jakob Stoklund Olesen
8cd67f08a9 Add a regmove instruction.
This will be used to locally change the register locations of values in
order to satisfy instruction constraints.
2017-05-02 11:32:12 -07:00
Jakob Stoklund Olesen
71128611a7 Extract the topological ordering into a module.
Multiple passes will need to iterate over EBBs in a
dominator-topological order. Move that functionality into a separate
module.
2017-04-27 17:39:58 -07:00
Jakob Stoklund Olesen
6fe4aa2f8d Extract the topological ordering into a module.
Multiple passes will need to iterate over EBBs in a
dominator-topological order. Move that functionality into a separate
module.
2017-04-27 17:39:58 -07:00
Jakob Stoklund Olesen
40488c8e22 Install rustfmt as a separate Travis install step.
- Add a check-rustfmt.sh script which checks if the right version of
  rustfmt is installed.
- Run check-rustfmt.sh --install as an install step under travis_wait.

This is to work around the issue where cargo takes forever to build
rustfmt, causing Travis to terminate the build because it hasn't
produced any output for 10 minutes.
2017-04-27 13:55:13 -07:00
Jakob Stoklund Olesen
a29ea664e2 Install rustfmt as a separate Travis install step.
- Add a check-rustfmt.sh script which checks if the right version of
  rustfmt is installed.
- Run check-rustfmt.sh --install as an install step under travis_wait.

This is to work around the issue where cargo takes forever to build
rustfmt, causing Travis to terminate the build because it hasn't
produced any output for 10 minutes.
2017-04-27 13:55:13 -07:00
Jakob Stoklund Olesen
43304e9abc Upgrade to rustfmt 0.8.3. 2017-04-27 12:52:41 -07:00
Jakob Stoklund Olesen
15606fa735 Upgrade to rustfmt 0.8.3. 2017-04-27 12:52:41 -07:00
Jakob Stoklund Olesen
ee5f035e31 Upgrade to Rust 1.17.
- Remove some uses of 'static in const and static globals that are no
  longer needed.
- Use the new struct initialization shorthand.
2017-04-27 12:46:44 -07:00
Jakob Stoklund Olesen
962a3a6a5e Upgrade to Rust 1.17.
- Remove some uses of 'static in const and static globals that are no
  longer needed.
- Use the new struct initialization shorthand.
2017-04-27 12:46:44 -07:00
Jakob Stoklund Olesen
eaf1ed09fc Color entry block arguments using the function signature.
The arguments to the entry block arrive in registers determined by the
ABI. This information is stored in the signature.

Use a separate function for coloring entry block arguments using the
signature information. We can't handle stack arguments yet.
2017-04-26 14:38:16 -07:00
Jakob Stoklund Olesen
4c8eb85f39 Color entry block arguments using the function signature.
The arguments to the entry block arrive in registers determined by the
ABI. This information is stored in the signature.

Use a separate function for coloring entry block arguments using the
signature information. We can't handle stack arguments yet.
2017-04-26 14:38:16 -07:00
Jakob Stoklund Olesen
6197bfff72 Add a TargetIsa::allocatable_registers() method.
This gives the target ISA a chance to reserve registers like the stack
pointer or hard-wired 0 registers like %x0 on RISC-V.
2017-04-26 13:54:40 -07:00
Jakob Stoklund Olesen
bb8ae9a4fb Add a TargetIsa::allocatable_registers() method.
This gives the target ISA a chance to reserve registers like the stack
pointer or hard-wired 0 registers like %x0 on RISC-V.
2017-04-26 13:54:40 -07:00
Jakob Stoklund Olesen
a4acc26d5a Add an enable_e setting for the RV32E instruction set.
This limited RISC-V version only has registers %x0 - %x15.

Make sure the ABI lowering code doesn't use the banned registers for
arguments.
2017-04-26 13:50:52 -07:00
Jakob Stoklund Olesen
305de3e73b Add an enable_e setting for the RV32E instruction set.
This limited RISC-V version only has registers %x0 - %x15.

Make sure the ABI lowering code doesn't use the banned registers for
arguments.
2017-04-26 13:50:52 -07:00
Jakob Stoklund Olesen
9db131c3bf Rename Affinity::Any to Affinity::None.
This value affinity doesn't mean "whatever", it means that the value
does not interact with any real instructions, where "real" means
instructions that have a legal encoding.

Update the liveness verifier to check this property:

- Encoded instructions can only use real values.
- Encoded instructions define real values.
- Ghost instructions define ghost values.
2017-04-26 11:20:17 -07:00
Jakob Stoklund Olesen
1e51f97108 Rename Affinity::Any to Affinity::None.
This value affinity doesn't mean "whatever", it means that the value
does not interact with any real instructions, where "real" means
instructions that have a legal encoding.

Update the liveness verifier to check this property:

- Encoded instructions can only use real values.
- Encoded instructions define real values.
- Ghost instructions define ghost values.
2017-04-26 11:20:17 -07:00