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Author SHA1 Message Date
Nick Fitzgerald
8dd4ab2f1e Merge pull request #2022 from MaxGraey/peepmatic-bnot 
peepmatic: Add bnot operation
 2020-07-17 09:39:38 -07:00
Nikolay Volf
4f4edc7aef Remove spam from "do_remove_constant_phis" 2020-07-17 18:14:16 +02:00
Joey Gouly
40473dffed arm64: Enable arith2 tests 
Copyright (c) 2020, Arm Limited.
 2020-07-17 15:58:16 +01:00
Benjamin Bouvier
ead8a835c4 machinst x64: add more FP support 2020-07-17 15:56:44 +02:00
bjorn3
5c5a30f76c Fix review comments 2020-07-17 12:03:17 +02:00
bjorn3
7b7b1f4997 Rename sarg__ to sarg_t 2020-07-17 12:03:17 +02:00
bjorn3
4971d9ee80 Merge {make_incoming,get_outgoing}_{,struct_}arg 2020-07-17 12:03:17 +02:00
bjorn3
0d4fa6d32a Fix review comments 2020-07-17 12:03:17 +02:00
bjorn3
4431ac1108 Implement SystemV struct argument passing 2020-07-17 12:03:17 +02:00
Alex Crichton
2f368ed5d6 Fixes needed for 0.19.0 (#2035) 
* Add some more wiggle crates to publish

* Fix build of wasi-common on crates.io

* Bump crates to 0.19.1 to fix crates.io build
 2020-07-16 17:27:21 -05:00
MaxGraey
c653c563dd Merge branch 'main' into peepmatic-bnot 2020-07-16 22:01:18 +03:00
Chris Fallin
5e0268a542 Merge pull request #2034 from cfallin/update-regalloc 
Update to regalloc.rs 0.0.28.
 2020-07-16 11:36:11 -07:00
Alex Crichton
63d5b91930 Wasmtime 0.19.0 and Cranelift 0.66.0 (#2027) 
This commit updates Wasmtime's version to 0.19.0, Cranelift's version to
0.66.0, and updates the release notes as well.
 2020-07-16 12:46:21 -05:00
Chris Fallin
756e8b8ea2 Update to regalloc.rs 0.0.28. 
This version of regalloc.rs includes several bugfixes for
reference-types support used by the new backend framework and the
aarch64 backend (bytecodealliance/regalloc.rs#85 and
bytecodealliance/regalloc.rs#86).
 2020-07-16 09:42:09 -07:00
Benjamin Bouvier
bab337fc32 Address review comments; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
5a55646fc3 machinst x64: support out-of-bounds memory accesses; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
ea33ce9116 machinst x64: basic support for baldrdash 
+ fix multi-value support
 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
00b38c91f6 machinst x64: fix generation of RegMemImm immediate operands; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
1430c5e436 machinst x64: fix index handling of jump table; 
The index should be truncated to 32 bits before being used for the jump
table entry computation.
 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
55b9059954 machinst x64: remove spurious assertion about FP offset requiring to be 16-bytes aligned 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
3905a1b17b machinst x64: implement SymbolValue and FuncAddr with a movabsq+reloc; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
cfa0a0c4e8 machinst x64: lower resumable_trap as trap; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
311027869b machinst x64: implement popcnt.i64 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
d9310e8d90 machinst x64: fix checked div sequence 
- it should mark as clobbering (def) rdx, not modifying it
- the signed-div check requires a temporary to compare against int64_min
 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
f932bccaf8 machinst x64: fix sign-extension at boundary 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
6f5403a94b machinst x64: lower Ctz using the Bsf x86 instruction 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
33e0d05645 machinst x64: have cmov modify its destination operand; 
This is tricky: the control flow implicitly implied by the operand makes
it so that the output register may be undefined, if we mark it only as a
"def". Make it a "mod" instead, which matches our usage in the codebase,
and will make it crash if the output operand isn't unconditionally
defined before the instruction.
 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
aa7db7fd7b machinst x64: fix JmpUnknown register mapping; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
fe7dd41435 machinst x64: fix iconst emission 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
ec2209665a machinst x64: implement bsr and lower Clz; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
eda2d143ed machinst x64: add support for umulhi/smulhi; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
571061fe4c machinst x64: add support for rotations; 2020-07-16 18:21:06 +02:00
Benjamin Bouvier
22892466e7 machinst x64: fix implementation of *reduce; 
They should just generate a plain move, since the high bits are then
ignored, and not an extended move.
 2020-07-16 18:21:06 +02:00
Alex Crichton
41e1300247 Allow improper_ctypes_definitions in C API 
This was enabled in rust-lang/rust#72700 but it looks like it's still
too noisy for it to be useful to us.
 2020-07-16 17:28:54 +02:00
MaxGraey
4564c396d2 Merge branch 'main' into peepmatic-bnot 2020-07-16 16:13:28 +03:00
MaxGraey
657aea5286 remove rule and tests 2020-07-16 14:56:11 +03:00
Nick Fitzgerald
a9455a8e51 C API tweaks for wasmtime-py (#2029) 
* wasmtime-c-api: Only drop non-null `*mut wasm_ref_t`s

* wasmtime-c-api: Handle null refs in `wasm_val_t` to `Val` conversion

* wasmtime-c-api: Don't unwrap and rewrap `Option`s

The `unwrap` can panic, and there isn't any point to this unwrap+rewrap.

* wasmtime-c-api: Add conversions between `funcref` and `wasm_func_t`

* wasmtime-c-api: More ownership documentation for `wasmtime.h`
 2020-07-15 19:55:31 -05:00
Nick Fitzgerald
c3e8a04c90 Merge pull request #2026 from yurydelendik/fix-c-module-new 
Fix signature of wasmtime_module_new
 2020-07-15 13:34:44 -07:00
Yury Delendik
a817470fab Fix signature of wasmtime_module_new 2020-07-15 14:07:36 -05:00
Andrew Brown
6a01b32474 Enable final SIMD spec tests for x86 2020-07-15 11:32:08 -07:00
Andrew Brown
3576d8c5bb Translate Wasm's widen instructions to Cranelift's [u|s]widen_[low|high] 2020-07-15 11:32:08 -07:00
Andrew Brown
f0b083c6ad Legalize [u|s]widen_high for x86 
Use `x86_palignr` and `[u|s]widen_low` for legalizing this instruction.
 2020-07-15 11:32:08 -07:00
Andrew Brown
c8ddf8a34c Encode [u|s]widen_low for x86 2020-07-15 11:32:08 -07:00
Andrew Brown
fafef7db77 Add x86_palignr instructions 
This instruction is necessary for implementing `[s|u]widen_high`.
 2020-07-15 11:32:08 -07:00
Andrew Brown
0e5e8a62c8 Add DerivedFunction for doubling lane widths and halving the number of lanes (i.e. merging) 
Certain operations (e.g. widening) will have operands with types like `NxM` but will return results with types like `(N*2)x(M/2)` (double the lane width, halve the number of lanes; maintain the same number of vector bits). This is equivalent to applying two `DerivedFunction`s to the type: `DerivedFunction::DoubleWidth` then `DerivedFunction::HalfVector`. Since there is no easy way to apply multiple `DerivedFunction`s (e.g. most of the logic is one-level deep, 1d5a678124/cranelift/codegen/meta/src/gen_inst.rs (L618-L621)), I added `DerivedFunction::MergeLanes` to do the necessary type conversion.
 2020-07-15 11:32:08 -07:00
Chris Fallin
12a31c88d7 Merge pull request #2021 from akirilov-arm/VectorSize 
AArch64: Introduce an enum to specify vector instruction operand sizes
 2020-07-15 09:43:18 -07:00
Alex Crichton
806d197472 Update platform support docs (#2023) 
Be sure to mention Linux AArch64 as a supported platform of Wasmtime
now.
 2020-07-15 10:22:08 -05:00
MaxGraey
67b785d241 refactor: use different sections for this rule 2020-07-15 17:11:27 +03:00
MaxGraey
d04d06d48a trailling nl 2020-07-15 14:19:08 +03:00
MaxGraey
54ecc7593b add tests 2020-07-15 14:16:56 +03:00