Commit Graph

416 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
4ee519e620 Add RISC-V call instruction encodings.
Calls are jal with a fixed %x1 link register.
2017-04-11 10:40:38 -07:00
Jakob Stoklund Olesen
b4ac520332 Extending loads and truncating stores 2017-04-11 10:30:03 -07:00
Jakob Stoklund Olesen
aad6ebebb5 Add load and store instructions.
Define a MemFlags class, currently holding a notrap and aligned flag.
2017-04-11 09:54:55 -07:00
Jakob Stoklund Olesen
0c3771bccb Ensure that the docs examples verify as Cretonne IL.
Any *.cton files in the docs directory are now included when running the
test-all.sh script. This is to ensure that the examples are in fact
correct IL.

Always print NaN and Inf floats with a sign. Print the positive ones as
+NaN and +Inf to make them easier to parse.
2017-04-10 15:28:24 -07:00
Jakob Stoklund Olesen
b474485c0d Add heap_load, heap_store, and heap_addr instructions.
These are used when lowering WebAssembly sandbox code.
2017-04-10 15:04:33 -07:00
Jakob Stoklund Olesen
222ae8af22 Define stack_load, stack_store, and stack_addr instructions. 2017-04-10 13:56:57 -07:00
Jakob Stoklund Olesen
eccc2d0dae Add an Offset32 immediate operand kind.
This will be used to represent an immediate 32-bit signed address offset
for load/store instructions.
2017-04-10 11:53:46 -07:00
Jakob Stoklund Olesen
51dea9f784 Syntax tweak: Omit comma after an initial enum immediate.
This affects the comparison instructions which now read "icmp ult a, b".
This mimics LLVM's style and makes it simpler to add instruction flags
in the future, such as "load v1" -> "load aligned v1".

These enumerated operands and flags feel like opcode modifiers rather
than value operands, so displaying them differently makes sense.

Value and numeric operands are still comma separated.
2017-04-10 10:28:37 -07:00
Jakob Stoklund Olesen
896ac935b9 Add jump encodings to RISC-V.
Fix a bug in gen_encoding.py when dealing with non-polymorphic
instructions where the type variable is None in Python, VOID in Rust.
2017-04-06 15:17:57 -07:00
Jakob Stoklund Olesen
fa4f151b9b Add a fallthrough instruction.
Change jumps to fallthroughs in the branch relaxation pass before
computing the EBB offsets.
2017-04-06 14:22:32 -07:00
Jakob Stoklund Olesen
856a67ca3a Use EBB offsets for encoding RISC-V branches.
Stop emitting EBB relocations. Use the offsets computed by
relax_branches() to encode the correct displacements immediately.
2017-04-06 12:55:57 -07:00
Jakob Stoklund Olesen
8a3f538441 Fix a bug in the binemit file test.
Only emit each instruction once, or the offset computations go all
wrong.
2017-04-06 11:17:46 -07:00
Jakob Stoklund Olesen
81251c3005 Add a branch relaxation pass for #72.
Compute exact EBB header offsets and check that branches are in range.

Not implemented yet: Relax branches that are not in range.

Invoke the relax_branches() pass from the 'test binemit' file tests so
they can verify the proper encoding of branch instructions too.
2017-04-05 15:11:39 -07:00
Jakob Stoklund Olesen
72cb6459a9 Add a CodeOffset type and CodeSink::offset() method.
We need to keep track of code offsets in order to compute accurate
branch displacements.
2017-04-05 09:12:12 -07:00
Jakob Stoklund Olesen
1984c96f7c rustfmt 0.8.1 2017-04-05 09:00:11 -07:00
Jakob Stoklund Olesen
e641c97670 Add RISC-V encodings for brz and brnz.
These branches compare a register to zero. RISC-V implements this with
the %x0 hard-coded zero register.
2017-04-03 15:20:57 -07:00
Jakob Stoklund Olesen
479ff156c1 Add conditional branch encodings for RISC-V.
Not all br_icmp opcodes are present in the ISA. The missing ones can be
reached by commuting operands.

Don't attempt to encode EBB offsets yet. For now just emit an EBB
relocation for the branch instruction.
2017-04-03 15:16:25 -07:00
Jakob Stoklund Olesen
1b6a6f4e48 Add the br_icmp instruction.
This instruction behaves like icmp fused with brnz, and it can be used
to represent fused compare+branch instruction on Intel when optimizing
for macro-op fusion.

RISC-V provides compare-and-branch instructions directly, and it is
needed there too.
2017-04-03 15:04:42 -07:00
Jakob Stoklund Olesen
0530e822d4 Add RISC-V encodings for lui.
This instruction can materialize constants with the low 12 bits clear.
2017-04-03 12:27:22 -07:00
Jakob Stoklund Olesen
4e398164d2 Add icmp_imm encodings for RISC-V.
The ISA has icmp_imm slt/ult with 12-bit signed immediate operands.
2017-04-03 10:59:28 -07:00
Jakob Stoklund Olesen
3176ccd131 Use the right operand when documenting type variable inference.
The meaning of format.typevar_operand changes recently to be relative to
value operands only instead of all operands. The Sphinx cton domain
wasn't updated.
2017-04-03 09:56:47 -07:00
Jakob Stoklund Olesen
e23d12bbc7 Add an icmp_imm instruction.
Compare a scalar integer to an immediate constant. Both Intel and RISC-V
ISAs have this operation.

This requires the addition of a new IntCompareImm instruction format.
2017-04-03 09:49:44 -07:00
Jakob Stoklund Olesen
f70ae03b47 Skip the Python checks if the Python files haven't changed. 2017-03-31 15:45:21 -07:00
Jakob Stoklund Olesen
9ddbc5d861 Emit Rshamt-type instructions for RISC-V.
These are the shift-by-immediate instructions.
2017-03-31 15:33:21 -07:00
Jakob Stoklund Olesen
c9a14448b8 Emit I-type instructions for RISC-V.
These are the BinaryImm formats.
2017-03-31 15:15:20 -07:00
Jakob Stoklund Olesen
e9907fbdd6 Add RISC-V encodings for supported icmp variants.
Only slt and ult variants are in the instruction set. Other condition
codes must be synthesized.
2017-03-31 13:47:07 -07:00
Jakob Stoklund Olesen
cb33f93fcd Use pretty_verifier_error in runone too. 2017-03-29 15:30:44 -07:00
Jakob Stoklund Olesen
4c3e590bb9 Run verifier after legalizer and regalloc file tests.
Run the verify_contexti() function after invoking the legalize() and
regalloc() context functions. This will help catch bad code produced by
these passes.
2017-03-29 15:19:03 -07:00
Jakob Stoklund Olesen
b5d4046591 Fix a type error in the legalizer patterns.
The carry and borrow values are boolean, so we have to convert them to
an integer type with bint(c) before we can add them to the result.

Also tweak the default legalizer action for unsupported types: Only
attempt a narrowing pattern for lane types > 32 bits.

This was found by @angusholder's new type checks in the verifier.
2017-03-29 15:00:27 -07:00
Jakob Stoklund Olesen
4613cbcf18 Test binary encodings of some RV32I instructions.
These are the R-format instructions in RV32I.
2017-03-29 13:16:12 -07:00
Jakob Stoklund Olesen
6ad34f90aa Allow for unencoded instructions in the binemit tests.
If an instruction doesn't have an associated encoding, use the standard
TargetIsa hook to encode it.

The test still fails if an instruction can't be encoded. There is no
legalization step.
2017-03-29 09:55:49 -07:00
Jakob Stoklund Olesen
f540cb0664 Add a binemit test command.
This makes it possible to write file tests that verify the binary
encoding of machine code.
2017-03-28 15:56:30 -07:00
Jakob Stoklund Olesen
d9f325f6cd Simplify branch arguments after splitting EBB arguments.
The EBB argument splitting may generate concat-split dependencies when
it repairs branch arguments in EBBs that have not yet been fully
legalized. Add a branch argument simplification step that can resolve
these dependency chains.

This means that all split and concatenation instructions will be dead
after legalization for types that have no legal instructions using them.
2017-03-22 15:29:06 -07:00
Keith Yeung
c7e25e6a35 Limit type inference for controlling type variables in write.rs 2017-03-22 14:45:38 -07:00
Jakob Stoklund Olesen
272df6489c Iteratively split EBB arguments.
When the legalizer splits a value into halves, it would previously stop
if the value was an EBB argument. With this change, we also split EBB
arguments and iteratively split arguments on branches to the EBB.

The iterative splitting stops when we hit the entry block arguments or
an instruction that isn't one of the concatenation instructions.
2017-03-22 13:12:19 -07:00
Jakob Stoklund Olesen
ca6e402b90 Add a ControlFlowGraph argument to legalize_function.
Legalizing some instructions may require modifications to the control
flow graph, and some operations need to use the CFG analysis.

The CFG reference is threaded through all the legalization functions to
reach the generated expansion functions as well as the legalizer::split
module where it will be used first.
2017-03-21 16:00:28 -07:00
Jakob Stoklund Olesen
a9056f699e Rename the 'cfg' module to 'flowgraph'.
The 'cfg' name was easy to confuse with 'configuration'.
2017-03-21 15:33:23 -07:00
Jakob Stoklund Olesen
697246658d Avoid generating value split instructions.
The legalizer often splits values into parts with the vsplit and
isplit_lohi instructions. Avoid doing that for values that are already
defined by the corresponding concatenation instructions.

This reduces the number of instructions created during legalization, and
it simplifies later optimizations. A number of dead concatenation
instructions are left behind. They can be trivially cleaned up by a dead
code elimination pass.
2017-03-21 15:10:50 -07:00
Jakob Stoklund Olesen
2a321f42fb Strip the _lohi suffix from the isplit instructions.
For symmetry with the vector splitting instructions, we now have:

    isplit iconcat
    vsplit vconcat

No functional change.
2017-03-21 13:22:50 -07:00
Jakob Stoklund Olesen
f15651132b Fix a bug in analyze_call().
The call arguments on call_indirect should not include the fixed callee
argument.

Add legalizer assertions to verify that signatures are actually valid
after legalization. If not, we would get infinite legalizer loops.
2017-03-17 12:34:03 -07:00
Jakob Stoklund Olesen
d881ed331b Legalize return values from call instructions.
Like the entry block arguments, the return values from a call
instruction need to be converted back from their ABI representation.

Add tests of call instruction legalization.
2017-03-17 11:03:32 -07:00
Jakob Stoklund Olesen
4964502782 Break out differently purposed tests from abi.cton.
- abi.cton is for testing the actual RISC-V ABI.
- legalize-abi.cton is for testing the legalizer around ABI boundaries.
- parse-encoding.cton is for testing the parser's handling of RISC-V
  encoding and register annotations.
2017-03-17 10:07:32 -07:00
Jakob Stoklund Olesen
d15f25844a Legalize ABI arguments to call and return instructions.
The type signatures of functions can change when they are legalized for
a specific ABI. This means that all call and return instructions need to
be rewritten to use the correct arguments.

- Fix arguments to call instructions.
- Fix arguments to return instructions.

TBD:

- Fix return values from call instructions.
2017-03-15 14:35:22 -07:00
Jakob Stoklund Olesen
9549cf603c Add a primitive debug tracing facility.
When the CRETONNE_DBG environment variable is set, send debug messages
to a file named cretonne.dbg.*.

The trace facility is only enabled when debug assertions are on.
2017-03-15 11:32:01 -07:00
Jakob Stoklund Olesen
010861d58e Upgrade to rustfmt 0.8.0.
Lots of changes this time.

Worked around what looks like a rustfmt bug in parse_inst_operands where
a large match was nested inside Ok().
2017-03-14 10:48:05 -07:00
Angus Holder
11a0daa7fd Define boolean conversion instructions. 2017-03-11 10:25:55 -08:00
Jakob Stoklund Olesen
9fbfd0d2a6 Remove the vconst instruction and the UnaryImmVector format.
No instruction sets actually have single instructions for materializing
vector constants. You always need to use a constant pool.

Cretonne doesn't have constant pools yet, but it will in the future, and
that is how vector constants should be represented.
2017-03-10 11:57:49 -08:00
Jakob Stoklund Olesen
c50e5f3f66 Separate immediate and value operands in the instruction format.
Instruction formats are now identified by a signature that doesn't
include the ordering of value operands relative to immediate operands.

This means that the BinaryRev instruction format becomes redundant, so
delete it. The isub_imm instruction was the only one using that format.
Rename it to irsub_imm to make it clear what it does now that it is
printed as 'irsub_imm v2, 45'.
2017-03-10 11:20:39 -08:00
Jakob Stoklund Olesen
5170ef6b5f Convert the Branch and Jump instruction formats to value_list.
The Branch format also stores its fixed argument in the value list. This
requires the value pool to be passed to a few more functions.

Note that this actually makes the Branch and Jump variants of
InstructionData identical. The instruction format hashing does not yet
understand that all value operands are stored in the value list. We'll
fix that in a later patch.

Also convert IndirectCall, noting that Call and IndirectCall remain
separate instruction formats because they have different immediate
fields.
2017-03-09 15:38:12 -08:00
Angus Holder
e21bf444dc Added parsing of argument locations for functions and signatures. 2017-03-09 13:55:11 -08:00