Commit Graph

636 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
34146435e5 Legalize unsigned-to-float conversions for Intel 64.
Also make sure we generate type checks for the controlling type variable
in legalization patterns. This is not needed for encodings since the
encoding tables are already keyed on the controlling type variable.
2017-09-28 11:39:19 -07:00
Jakob Stoklund Olesen
979a22f548 Add pow2() and neg() methods for the IEEE immediate types.
These are convenient methods for creating common floating point
constants.
2017-09-28 11:34:02 -07:00
Jakob Stoklund Olesen
a274cdf275 Fix the Intel encoding of band_not.
The andnps instruction inverts its first argument while band_not inverts
is second argument.

Use a swapped-operands "fax" encoding recipe.
2017-09-27 18:14:13 -07:00
Jakob Stoklund Olesen
1d481d7897 Use the ThreadId to name cretonne.dbg in unnamed threads.
Don't use a single cretonne.dbg log file when there are multiple unnamed
threads logging. They will clobber each other.
2017-09-27 16:27:49 -07:00
Jakob Stoklund Olesen
84471a8431 Add some very basic support for the Intel32 ABI.
In 32-bit mode, all function arguments are passed on the stack, not in
registers.

This ABI support is not complete or properly tested, but at least it
doesn't try to pass arguments in r8.
2017-09-27 12:55:34 -07:00
Jakob Stoklund Olesen
b6b474a8c9 Add Intel legalization for fmin and fmax.
The native x86_fmin and x86_fmax instructions don't behave correctly for
NaN inputs and when comparing +0.0 to -0.0, so we need separate branches
for those cases.
2017-09-27 12:55:34 -07:00
Jakob Stoklund Olesen
384b04b411 Fix some misnamed TailRecipes and add a consistency check. 2017-09-27 12:55:34 -07:00
Jakob Stoklund Olesen
44eab3e158 Add Intel regmove encodings for floating point types. 2017-09-27 12:49:54 -07:00
Jakob Stoklund Olesen
1fe7890700 Add x86_fmin and x86_fmax instructions.
These Intel-specific instructions represent the semantics of the minss /
maxss Intel instructions which behave more like a C ternary operator
than the WebAssembly fmin and fmax instructions.

They will be used as building blocks for implementing the WebAssembly
semantics.
2017-09-27 09:17:09 -07:00
Jakob Stoklund Olesen
ac69f3bfdf Add an Intel-specific x86_cvtt2si instruction.
This is used to represent the non-trapping semantics of the cvttss2si and
cvttsd2si instructions (and their vectorized counterparts).

The overflow behavior of this instruction is specific to the Intel ISAs.

There is no float-to-i64 instruction on the 32-bit Intel ISA.
2017-09-26 15:44:41 -07:00
Jakob Stoklund Olesen
6ff681a90d Add general legalization for the select instruction. 2017-09-26 14:16:35 -07:00
Jakob Stoklund Olesen
ce767be703 Intel encodings for floating point copies. 2017-09-26 13:54:38 -07:00
Jakob Stoklund Olesen
7fb6159a85 Add Intel encodings for the fcmp instruction.
Not all floating point condition codes are directly supported by the
ucimiss/ucomisd instructions. Some inequalities need to be reversed and
eq+ne require two separate tests.
2017-09-26 11:17:32 -07:00
Jakob Stoklund Olesen
79968a2325 Add standard expansions for fcopysign.
This is also just a sign bit manipulation.
2017-09-25 15:17:32 -07:00
Jakob Stoklund Olesen
6bec5f8507 Intel encodings for nearest/floor/ceil/trunc.
These floating point rounding operations all use the roundss/roundsd
instructions that are available in SSE 4.1.
2017-09-25 15:08:04 -07:00
Jakob Stoklund Olesen
ac343ba92a Add encodings for square root instructions. 2017-09-25 13:15:09 -07:00
Jakob Stoklund Olesen
8deca67968 Add legalization patterns for fabs and fneg.
These sign bit manipulations need to use a -0.0 floating point constant
which we didn't have a way of materializing previously.

Add a ieee32.bits(0x...) syntax to the Python AST nodes that creates am
f32 immediate value with the exact requested bitwise representation.
2017-09-25 12:15:33 -07:00
Jakob Stoklund Olesen
fdb97da21b Implement a poor man's jump table.
We will eventually support real jump tables, but for now just expand
br_table into a sequence of conditional branches.
2017-09-25 10:56:14 -07:00
Jakob Stoklund Olesen
29dfcf5dfb Add spill/fill encodings for Intel ISAs.
To begin with, these are catch-all encodings with a SIB byte and a
32-bit displacement, so they can access any stack slot via both the
stack pointer and the frame pointer.

In the future, we will add encodings for 8-bit displacements as well as
EBP-relative references without a SIB byte.
2017-09-22 16:05:26 -07:00
Jakob Stoklund Olesen
76eb7df9f0 Add an isa::StackRef type.
This contains encoding details for a stack reference: The base register
and offset to use in the specific instruction encoding.

Generate StackRef objects called in_stk0 etc for the binemit recipe
code. All binemit recipes need to compute base pointer offsets for stack
references, so have the automatically generated code do it.
2017-09-22 13:34:33 -07:00
Jakob Stoklund Olesen
2946cc54d3 Add more trap codes.
These are codes that come up naturally when translating WebAssembly and
legalizing the Cretonne instruction set.
2017-09-22 08:51:55 -07:00
Angus Holder
7fbf1cb810 Revert accidental change 2017-09-22 07:54:26 -07:00
Angus Holder
b003605132 Adapt intel to be able to correctly choose compressed instruction encodings: create a register class to identify the lower 8 registers, omit unnecessary REX prefixes, and fix the tests 2017-09-22 07:54:26 -07:00
Angus Holder
3b66c0be40 Emit compressed instruction encodings for instructions where constraints allow 2017-09-22 07:54:26 -07:00
Jakob Stoklund Olesen
2d4c860187 Convert legalizer::split and generated legalization code to FuncCursor. 2017-09-21 17:05:51 -07:00
Jakob Stoklund Olesen
a9acbd1afd Convert the legalizer/boundary module to FuncCursor.
This is a larger refactoring because all the changes need to be done
together. Either you pass a Function reference around, or you pass
around references to the parts. There is no in between.
2017-09-21 16:43:47 -07:00
Jakob Stoklund Olesen
4d4da2dc60 Add source location support to FuncCursor and EncCursor.
A cursor now also remembers a current source location which will be
assigned to all new instructions created with the cursor.

The old layout::Cursor can't support source locations because it doesn't
have a reference to the full ir::Function.
2017-09-21 14:37:54 -07:00
Jakob Stoklund Olesen
b2a314a229 Add per-instruction source locations to the Cretonne IR.
Source locations are opaque 32-bit entities that can be used to
represent WebAssembly byte-code positions or some other source
identifier.
2017-09-21 14:24:26 -07:00
Jakob Stoklund Olesen
218959ff65 Convert more tests to FuncCursor. 2017-09-21 13:30:00 -07:00
Jakob Stoklund Olesen
8e93aa7ce7 Remove layout::Cursor from the legalizer::split API.
We still use the cursor internally, but don't require callers to use it
too.
2017-09-21 13:07:17 -07:00
Jakob Stoklund Olesen
1cd91b6f30 Eliminate layout::Cursor from cton_frontend.
Replace all uses with a FuncCursor.

Avoid the anti-pattern of passing parts of a function around as
independent references.
2017-09-21 12:24:27 -07:00
Jakob Stoklund Olesen
03dee5e442 Replace some uses of layout::Cursor with FuncCursor.
The layout::Cursor is unfortunate because it doesn't reference the whole
function.
2017-09-21 11:27:15 -07:00
Dan Gohman
ed6630dc02 Move verify calls back into Context, using FlagsOrIsa.
With FlagsOrIsa, we can pass around the information we need to run
the verifier from the Context even when a TargetIsa is not available.
2017-09-20 16:42:13 -07:00
Jakob Stoklund Olesen
8def91b4ad Remove the unused Nullary instruction format.
This format was only used by the trap instruction which has its own
format now.
2017-09-20 15:59:13 -07:00
Jakob Stoklund Olesen
e8723be33f Add trap codes to the Cretonne IL.
The trap and trapz/trapnz instructions now take a trap code immediate
operand which indicates the reason for trapping.
2017-09-20 15:50:02 -07:00
Jakob Stoklund Olesen
0f21fd342a Remove the HeapLoad/HeapStore instruction formats.
These formats are not used any longer after the heap_load and heap_store
instructions were replaced by heap_addr.

Also drop the Uoffset32 immediate operand type which isn't used either.
2017-09-20 15:43:25 -07:00
Dan Gohman
ce94a3fa39 Use ScopedHashMap in simple_gvn.
This avoids effectively ending up with most of a function body
stored in the hash map at once by removing elements promptly when
they go out of scope.
2017-09-20 14:21:44 -07:00
Dan Gohman
6710216e96 Add next_inst and prev_inst helper functions to Layout. 2017-09-20 12:38:13 -07:00
Dan Gohman
42af6d59bf Add a ScopedHashMap class, for use in a future GVN implementation. 2017-09-20 11:28:55 -07:00
Dan Gohman
74845fed6c Use more helper functions on CursorBase to reduce cursor repositioning. 2017-09-20 11:19:35 -07:00
Dan Gohman
482439c94b Minor code cleanups in simple_gvn's main loop.
Redundant load/store elimination isn't critical for the use case of
optimizing wasm code which has already been optimized, so remove the
TODO for that for now.
2017-09-20 09:55:01 -07:00
Dan Gohman
b888894fbb Use CursorBase utility functions to reduce repositioning clutter. 2017-09-20 09:06:17 -07:00
Dan Gohman
5194298d9b Fix a typo in a comment. 2017-09-20 08:17:40 -07:00
Jakob Stoklund Olesen
fb827a2d4b Add func_addr encodings for Intel. 2017-09-19 16:33:38 -07:00
Jakob Stoklund Olesen
d92686d1cd Add a func_addr instruction.
Get the callable address of a function. Use for long distance calls and
for creating arguments to call_indirect in general.
2017-09-19 15:54:02 -07:00
Jakob Stoklund Olesen
0cfea8858a Add uext() and sext() builder methods to ArgumentType.
This makes it simpler to construct arguments like:

  ArgumentType::new(I32).uext()
2017-09-19 12:59:07 -07:00
Jakob Stoklund Olesen
1fdeddd0d3 Add Intel encodings for floating point load/store instructions.
Include wasm/*-memory64.cton tests too.
2017-09-19 09:32:54 -07:00
Jakob Stoklund Olesen
88348368a8 Add custom legalization for floating point constants.
Use the simplest expansion which materializes the bits of the floating
point constant as an integer and then bit-casts to the floating point
type. In the future, we may want to use constant pools instead. Either
way, we need custom legalization.

Also add a legalize_monomorphic() function to the Python targetISA class
which permits the configuration of a default legalization action for
monomorphic instructions, just like legalize_type() does for polymorphic
instructions.
2017-09-18 13:33:34 -07:00
Angus Holder
d2273c73ea Make the verifier accept any of the legal encodings of an instruction 2017-09-18 13:00:19 -07:00
Jakob Stoklund Olesen
446fcdd7c5 Fix the REX bits for load/store instruction encodings.
The two registers were swapped in the REX encoding, and the tests didn't
have any high bit set registers.
2017-09-15 13:02:36 -07:00