Commit Graph

7 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
54534e2147 Add Intel legalization for division and multiplication.
These operations need custom legalization in order to use Intel's div
and idiv instructions.
2017-07-28 16:41:59 -07:00
Jakob Stoklund Olesen
cf876e492a Add Intel encodings for imul. 2017-07-18 09:27:36 -07:00
Jakob Stoklund Olesen
9dc92eb8b3 Add Intel BMI1 ctz and clz encodings. 2017-07-14 14:01:02 -07:00
Jakob Stoklund Olesen
5cbcd59cf0 Add some ISA predicates for Intel CPUID features.
Guard the popcnt instruction on the proper CPUID bits.
2017-07-12 16:05:20 -07:00
Jakob Stoklund Olesen
435a15b88d Add Intel encodings for popcnt.
Change the result type for the bit-counting instructions from a fixed i8
to the iB type variable which is the type of the input. This matches the
convention in WebAssembly, and at least Intel's instructions will set a
full register's worth of count result, even if it is always < 64.

Duplicate the Intel 'ur' encoding recipe into 'umr' and 'urm' variants
corresponding to the RM and MR encoding variants. The difference is
which register is encoded as 'reg' and which is 'r/m' in the ModR/M
byte. A 'mov' register copy uses the MR variant, a unary popcnt uses the
RM variant.
2017-07-12 14:17:16 -07:00
Jakob Stoklund Olesen
f57c666d8a Add Intel encodings for shift and rotate instructions. 2017-07-12 13:12:24 -07:00
Jakob Stoklund Olesen
1f52415b17 Add a WebAssembly filetests directory.
Start adding little 'test compile' test cases which check that the full
compilation pipeline works for each WebAssembly instruction.
2017-07-12 12:22:50 -07:00