4 Commits

Author	SHA1	Message	Date
Jakob Stoklund Olesen	0f4f663584	Add register banks for CPU flags to Intel and ARM ISAs. ... The arm32 ISA technically has separate floating point and integer flags, but the only useful thing you can do with the floating point flags is to copy them ti the integer flags, so there is not need to model them. The arm64 ISA fixes this and the fcmp instruction writes the integer nzcv flags directly. RISC-V does not have CPU flags.	2017-10-13 14:02:09 -07:00
Jakob Stoklund Olesen	1d21422032	Generate register class descriptors. ... Add a mechanism for defining sub-classes of register classes.	2017-01-20 14:23:06 -08:00
Jakob Stoklund Olesen	060735adfe	Define register classes for 4 ISAs.	2016-11-11 15:08:12 -08:00
Jakob Stoklund Olesen	e1c0171b2c	Define register banks. ... Add a RegBank class for describing CPU register banks. Define register banks for all the ISA stubs. The ARM32 floating point bank in particular requires attention.	2016-11-11 14:17:10 -08:00