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Rename %eflags to %rflags.

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EFLAGS is a subregister of RFLAGS. For consistency with GPRs where we
use the 64-bit names to refer to the registers, use the 64-bit name for
RFLAGS as well.
This commit is contained in:
Dan Gohman
2018-03-26 21:34:15 -07:00
parent 14faef7374
commit ffe89cdc0a
8 changed files with 68 additions and 68 deletions
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14
cranelift/filetests/isa/intel/binary64-float.cton
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@@ -235,11 +235,11 @@ ebb0:
[-,%rdx] v307 = fcmp ule v11, v10 ; bin: 44 0f 2e d5 0f 96 c2
; asm: ucomiss %xmm10, %xmm5
[-,%eflags] v310 = ffcmp v10, v11 ; bin: 41 0f 2e ea
[-,%rflags] v310 = ffcmp v10, v11 ; bin: 41 0f 2e ea
; asm: ucomiss %xmm10, %xmm5
[-,%eflags] v311 = ffcmp v11, v10 ; bin: 44 0f 2e d5
[-,%rflags] v311 = ffcmp v11, v10 ; bin: 44 0f 2e d5
; asm: ucomiss %xmm5, %xmm5
[-,%eflags] v312 = ffcmp v10, v10 ; bin: 0f 2e ed
[-,%rflags] v312 = ffcmp v10, v10 ; bin: 0f 2e ed
return
}
@@ -470,11 +470,11 @@ ebb0:
[-,%rdx] v307 = fcmp ule v11, v10 ; bin: 66 44 0f 2e d5 0f 96 c2
; asm: ucomisd %xmm10, %xmm5
[-,%eflags] v310 = ffcmp v10, v11 ; bin: 66 41 0f 2e ea
[-,%rflags] v310 = ffcmp v10, v11 ; bin: 66 41 0f 2e ea
; asm: ucomisd %xmm10, %xmm5
[-,%eflags] v311 = ffcmp v11, v10 ; bin: 66 44 0f 2e d5
[-,%rflags] v311 = ffcmp v11, v10 ; bin: 66 44 0f 2e d5
; asm: ucomisd %xmm5, %xmm5
[-,%eflags] v312 = ffcmp v10, v10 ; bin: 66 0f 2e ed
[-,%rflags] v312 = ffcmp v10, v10 ; bin: 66 0f 2e ed
return
}
@@ -482,7 +482,7 @@ ebb0:
function %cpuflags_float(f32 [%xmm0]) {
ebb0(v0: f32 [%xmm0]):
; asm: ucomiss %xmm0, %xmm0
[-,%eflags] v1 = ffcmp v0, v0 ; bin: 0f 2e c0
[-,%rflags] v1 = ffcmp v0, v0 ; bin: 0f 2e c0
jump ebb1