T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Remove RSP from deref safe register class as well.

Browse Source
This commit is contained in:
Tyler McMullen
2018-01-29 14:12:01 -08:00
committed by Jakob Stoklund Olesen
parent 099b959d57
commit ff16583c59
2 changed files with 6 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
lib/cretonne/meta/isa/intel/registers.py
View File

@@ -49,10 +49,11 @@ GPR = RegClass(IntRegs)
# Certain types of deref encodings cannot be used with all registers.
# R13/RBP cannot be used with zero-offset load or store instructions.
# R12 cannot be used with a non-SIB-byte encoding of all derefs.
GPR_DEREF_SAFE = GPR.without(GPR.r12)
GPR_DEREF_SAFE = GPR.without(GPR.rsp, GPR.r12)
GPR_ZERO_DEREF_SAFE = GPR_DEREF_SAFE.without(GPR.rbp, GPR.r13)
GPR8 = GPR[0:8]
GPR8_ZERO_DEREF_SAFE = GPR8.without(GPR.rbp)
GPR8_DEREF_SAFE = GPR8.without(GPR.rsp)
GPR8_ZERO_DEREF_SAFE = GPR8_DEREF_SAFE.without(GPR.rbp)
ABCD = GPR[0:4]
FPR = RegClass(FloatRegs)
FPR8 = FPR[0:8]