Fix OperandSize: need clamp-to-32-bit behavior in most cases, but true-width for shifts.

cranelift/codegen/src/isa/x64/inst.isle

@@ -77,9 +77,13 @@
             Size32
             Size64))
 
-;; Get the `OperandSize` for a given `Type`.
-(decl operand_size_of_type (Type) OperandSize)
-(extern constructor operand_size_of_type operand_size_of_type)
+;; Get the `OperandSize` for a given `Type`, rounding smaller types up to 32 bits.
+(decl operand_size_of_type_32_64 (Type) OperandSize)
+(extern constructor operand_size_of_type_32_64 operand_size_of_type_32_64)
+
+;; Get the true `OperandSize` for a given `Type`, with no rounding.
+(decl raw_operand_size_of_type (Type) OperandSize)
+(extern constructor raw_operand_size_of_type raw_operand_size_of_type)
 
 ;; Get the bit width of an `OperandSize`.
 (decl operand_size_bits (OperandSize) u16)
@@ -430,7 +434,7 @@
       (let ((from_bits u16 (ty_bits_u16 from_ty))
             ;; Use `operand_size_of_type` so that the we clamp the output to 32-
             ;; or 64-bit width types.
-            (to_bits u16 (operand_size_bits (operand_size_of_type to_ty))))
+            (to_bits u16 (operand_size_bits (operand_size_of_type_32_64 to_ty))))
         (extend kind
                 to_ty
                 (ext_mode from_bits to_bits)
@@ -507,7 +511,7 @@
 (decl alu_rmi_r (Type AluRmiROpcode Reg RegMemImm) Reg)
 (rule (alu_rmi_r ty opcode src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.AluRmiR size opcode src1 src2 dst))))
         (writable_reg_to_reg dst)))
 
@@ -523,7 +527,7 @@
 (decl add_with_flags (Type Reg RegMemImm) ProducesFlags)
 (rule (add_with_flags ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty)))
-        (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type ty)
+        (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty)
                                                     (AluRmiROpcode.Add)
                                                     src1
                                                     src2
@@ -534,7 +538,7 @@
 (decl adc (Type Reg RegMemImm) ConsumesFlags)
 (rule (adc ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty)))
-        (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type ty)
+        (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty)
                                                     (AluRmiROpcode.Adc)
                                                     src1
                                                     src2
@@ -553,7 +557,7 @@
 (decl sub_with_flags (Type Reg RegMemImm) ProducesFlags)
 (rule (sub_with_flags ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty)))
-        (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type ty)
+        (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty)
                                                     (AluRmiROpcode.Sub)
                                                     src1
                                                     src2
@@ -564,7 +568,7 @@
 (decl sbb (Type Reg RegMemImm) ConsumesFlags)
 (rule (sbb ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty)))
-        (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type ty)
+        (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty)
                                                     (AluRmiROpcode.Sbb)
                                                     src1
                                                     src2
@@ -612,7 +616,7 @@
 ;; Integer immediates.
 (rule (imm ty simm64)
       (let ((dst WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.Imm size simm64 dst))))
         (writable_reg_to_reg dst)))
 
@@ -638,7 +642,7 @@
 (rule (imm ty 0)
       (let ((wr WritableReg (temp_writable_reg ty))
             (r Reg (writable_reg_to_reg wr))
-            (size OperandSize (operand_size_of_type ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.AluRmiR size
                                          (AluRmiROpcode.Xor)
                                          r
@@ -685,7 +689,9 @@
 (decl shift_r (Type ShiftKind Reg Imm8Reg) Reg)
 (rule (shift_r ty kind src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty))
+            ;; Use actual 8/16-bit instructions when appropriate: we
+            ;; rely on their shift-amount-masking semantics.
+            (size OperandSize (raw_operand_size_of_type ty))
             (_ Unit (emit (MInst.ShiftR size kind src1 src2 dst))))
         (writable_reg_to_reg dst)))
 
@@ -733,7 +739,7 @@
 (decl cmove (Type CC RegMem Reg) ConsumesFlags)
 (rule (cmove ty cc consequent alternative)
       (let ((dst WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty)))
+            (size OperandSize (operand_size_of_type_32_64 ty)))
         (ConsumesFlags.ConsumesFlags (MInst.Cmove size cc consequent alternative dst)
                                      (writable_reg_to_reg dst))))
 
@@ -1159,7 +1165,7 @@
 (rule (mul_hi ty signed src1 src2)
       (let ((dst_lo WritableReg (temp_writable_reg ty))
             (dst_hi WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.MulHi size
                                        signed
                                        src1
@@ -1228,6 +1234,6 @@
 (decl not (Type Reg) Reg)
 (rule (not ty src)
       (let ((dst WritableReg (temp_writable_reg ty))
-            (size OperandSize (operand_size_of_type ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.Not size src dst))))
         (writable_reg_to_reg dst)))

cranelift/codegen/src/isa/x64/lower/isle.rs

@@ -56,7 +56,16 @@ where
     isle_prelude_methods!();
 
     #[inline]
-    fn operand_size_of_type(&mut self, ty: Type) -> OperandSize {
+    fn operand_size_of_type_32_64(&mut self, ty: Type) -> OperandSize {
+        if ty.bits() == 64 {
+            OperandSize::Size64
+        } else {
+            OperandSize::Size32
+        }
+    }
+
+    #[inline]
+    fn raw_operand_size_of_type(&mut self, ty: Type) -> OperandSize {
         OperandSize::from_ty(ty)
     }
 

cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle be1359b4b6b153f378517c1dd95cd80f4a6bed0c7b86eaba11c088fd71b7bfe80a3c868ace245b2da0bfbbd6ded262ea9576c8e0eeacbf89d03c34a17a709602
 src/prelude.isle 75a46b97817ad6a4c34e618b81e60876eec6fd1c83ac3ee174851e42045c951644663b2cbc31f1749ce2bc3ad9eb94fb0b877eb2c3bc4885cab7d7e87e9df1d6
-src/isa/x64/inst.isle 3b9c5c81e40b4de04169ac10e5b57d8de14dfefb104e565d24a303e6ccf28416acbdf585b1cae5a90c7e37310d7cdc1534054202597a7b8d2181c8eece08c29e
+src/isa/x64/inst.isle 1a44ccc0c2cad90447762848461fcae714216ef058d42bdba89330a6008061526e92bbf1c17055c465b20fc75d98d1faa34feda8b22fa7ae0504a0f808798b41
 src/isa/x64/lower.isle c7943201b32e9eb9726466e8cc417f7e84c4c4052de31e05ab6e0ad7502a587cf1d7d9835703c4ff5a506390f7a0668741e7f3feaa1edda6396571a425949fc9

cranelift/filetests/filetests/isa/x64/i128.clif

@@ -888,7 +888,7 @@ block0(v0: i8, v1: i128):
 ; check:  pushq   %rbp
 ; nextln: movq    %rsp, %rbp
 ; nextln: movq    %rsi, %rcx
-; nextln: shll    %cl, %edi
+; nextln: shlb    %cl, %dil
 ; nextln: movq    %rdi, %rax
 ; nextln: movq    %rbp, %rsp
 ; nextln: popq    %rbp