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x64: port select to ISLE (#3682)

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* x64: port `select` using an FP comparison to ISLE

This change includes quite a few interlocking parts, required mainly by
the current x64 conventions in ISLE:
 - it adds a way to emit a `cmove` with multiple OR-ing conditions;
   because x64 ISLE cannot currently safely emit a comparison followed
   by several jumps, this adds `MachInst::CmoveOr` and
   `MachInst::XmmCmoveOr` macro instructions. Unfortunately, these macro
   instructions hide the multi-instruction sequence in `lower.isle`
 - to properly keep track of what instructions consume and produce
   flags, @cfallin added a way to pass around variants of
   `ConsumesFlags` and `ProducesFlags`--these changes affect all
   backends
 - then, to lower the `fcmp + select` CLIF, this change adds several
   `cmove*_from_values` helpers that perform all of the awkward
   conversions between `Value`, `ValueReg`, `Reg`, and `Gpr/Xmm`; one
   upside is that now these lowerings have much-improved documentation
   explaining why the various `FloatCC` and `CC` choices are made the
   the way they are.

Co-authored-by: Chris Fallin <chris@cfallin.org>
This commit is contained in:
Andrew Brown
2022-02-23 10:03:16 -08:00
committed by GitHub
parent 5a5e401a9c
commit f87c61176a
20 changed files with 3163 additions and 2272 deletions
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12
cranelift/codegen/src/isa/s390x/lower.isle
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@@ -1102,9 +1102,9 @@
;; result expected by Cranelift semantics. The only exception
;; it the case where the input was a NaN. We explicitly check
;; for that and force the output to 0 in that case.
(sat Reg (with_flags_1 (fcmp_reg src_ty src src)
(cmov_imm dst_ty
(floatcc_as_cond (FloatCC.Unordered)) 0 dst))))
(sat Reg (with_flags_reg (fcmp_reg src_ty src src)
(cmov_imm dst_ty
(floatcc_as_cond (FloatCC.Unordered)) 0 dst))))
(value_reg sat)))
@@ -1119,9 +1119,9 @@
;; result expected by Cranelift semantics. The only exception
;; it the case where the input was a NaN. We explicitly check
;; for that and force the output to 0 in that case.
(sat Reg (with_flags_1 (fcmp_reg src_ty src src)
(cmov_imm dst_ty
(floatcc_as_cond (FloatCC.Unordered)) 0 dst))))
(sat Reg (with_flags_reg (fcmp_reg src_ty src src)
(cmov_imm dst_ty
(floatcc_as_cond (FloatCC.Unordered)) 0 dst))))
(value_reg sat)))