From f87c61176acd0ca977261423b4663ef456b2e720 Mon Sep 17 00:00:00 2001 From: Andrew Brown Date: Wed, 23 Feb 2022 10:03:16 -0800 Subject: [PATCH] x64: port select to ISLE (#3682) * x64: port `select` using an FP comparison to ISLE This change includes quite a few interlocking parts, required mainly by the current x64 conventions in ISLE: - it adds a way to emit a `cmove` with multiple OR-ing conditions; because x64 ISLE cannot currently safely emit a comparison followed by several jumps, this adds `MachInst::CmoveOr` and `MachInst::XmmCmoveOr` macro instructions. Unfortunately, these macro instructions hide the multi-instruction sequence in `lower.isle` - to properly keep track of what instructions consume and produce flags, @cfallin added a way to pass around variants of `ConsumesFlags` and `ProducesFlags`--these changes affect all backends - then, to lower the `fcmp + select` CLIF, this change adds several `cmove*_from_values` helpers that perform all of the awkward conversions between `Value`, `ValueReg`, `Reg`, and `Gpr/Xmm`; one upside is that now these lowerings have much-improved documentation explaining why the various `FloatCC` and `CC` choices are made the the way they are. Co-authored-by: Chris Fallin --- cranelift/codegen/src/isa/aarch64/inst.isle | 58 +- cranelift/codegen/src/isa/aarch64/lower.isle | 35 +- .../lower/isle/generated_code.manifest | 6 +- .../isa/aarch64/lower/isle/generated_code.rs | 927 +++++---- cranelift/codegen/src/isa/s390x/inst.isle | 74 +- cranelift/codegen/src/isa/s390x/lower.isle | 12 +- .../s390x/lower/isle/generated_code.manifest | 6 +- .../isa/s390x/lower/isle/generated_code.rs | 1724 ++++++++--------- cranelift/codegen/src/isa/x64/inst.isle | 234 ++- cranelift/codegen/src/isa/x64/inst/emit.rs | 85 +- cranelift/codegen/src/isa/x64/inst/mod.rs | 122 +- cranelift/codegen/src/isa/x64/lower.isle | 152 +- cranelift/codegen/src/isa/x64/lower.rs | 77 +- cranelift/codegen/src/isa/x64/lower/isle.rs | 32 +- .../x64/lower/isle/generated_code.manifest | 6 +- .../src/isa/x64/lower/isle/generated_code.rs | 1713 ++++++++++------ cranelift/codegen/src/prelude.isle | 72 +- .../filetests/isa/x64/cmp-mem-bug.clif | 18 +- .../filetests/filetests/runtests/select.clif | 80 + cranelift/isle/isle/src/codegen.rs | 2 +- 20 files changed, 3163 insertions(+), 2272 deletions(-) create mode 100644 cranelift/filetests/filetests/runtests/select.clif diff --git a/cranelift/codegen/src/isa/aarch64/inst.isle b/cranelift/codegen/src/isa/aarch64/inst.isle index b9cbda583c..102e43f8c5 100644 --- a/cranelift/codegen/src/isa/aarch64/inst.isle +++ b/cranelift/codegen/src/isa/aarch64/inst.isle @@ -1461,37 +1461,42 @@ (writable_reg_to_reg dst))) ;; Helper for emitting `adds` instructions. -(decl add_with_flags (Type Reg Reg) ProducesFlags) -(rule (add_with_flags ty src1 src2) +(decl add_with_flags_paired (Type Reg Reg) ProducesFlags) +(rule (add_with_flags_paired ty src1 src2) (let ((dst WritableReg (temp_writable_reg $I64))) - (ProducesFlags.ProducesFlags (MInst.AluRRR (ALUOp.AddS) (operand_size ty) dst src1 src2) - (writable_reg_to_reg dst)))) + (ProducesFlags.ProducesFlagsReturnsResultWithConsumer + (MInst.AluRRR (ALUOp.AddS) (operand_size ty) dst src1 src2) + (writable_reg_to_reg dst)))) ;; Helper for emitting `adc` instructions. -(decl adc (Type Reg Reg) ConsumesFlags) -(rule (adc ty src1 src2) +(decl adc_paired (Type Reg Reg) ConsumesFlags) +(rule (adc_paired ty src1 src2) (let ((dst WritableReg (temp_writable_reg $I64))) - (ConsumesFlags.ConsumesFlags (MInst.AluRRR (ALUOp.Adc) (operand_size ty) dst src1 src2) - (writable_reg_to_reg dst)))) + (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer + (MInst.AluRRR (ALUOp.Adc) (operand_size ty) dst src1 src2) + (writable_reg_to_reg dst)))) ;; Helper for emitting `subs` instructions. -(decl sub_with_flags (Type Reg Reg) ProducesFlags) -(rule (sub_with_flags ty src1 src2) +(decl sub_with_flags_paired (Type Reg Reg) ProducesFlags) +(rule (sub_with_flags_paired ty src1 src2) (let ((dst WritableReg (temp_writable_reg $I64))) - (ProducesFlags.ProducesFlags (MInst.AluRRR (ALUOp.SubS) (operand_size ty) dst src1 src2) - (writable_reg_to_reg dst)))) + (ProducesFlags.ProducesFlagsReturnsResultWithConsumer + (MInst.AluRRR (ALUOp.SubS) (operand_size ty) dst src1 src2) + (writable_reg_to_reg dst)))) (decl cmp64_imm (Reg Imm12) ProducesFlags) (rule (cmp64_imm src1 src2) - (ProducesFlags.ProducesFlags (MInst.AluRRImm12 (ALUOp.SubS) (OperandSize.Size64) (writable_zero_reg) src1 src2) - (zero_reg))) + (ProducesFlags.ProducesFlagsSideEffect + (MInst.AluRRImm12 (ALUOp.SubS) (OperandSize.Size64) (writable_zero_reg) + src1 src2))) ;; Helper for emitting `sbc` instructions. -(decl sbc (Type Reg Reg) ConsumesFlags) -(rule (sbc ty src1 src2) +(decl sbc_paired (Type Reg Reg) ConsumesFlags) +(rule (sbc_paired ty src1 src2) (let ((dst WritableReg (temp_writable_reg $I64))) - (ConsumesFlags.ConsumesFlags (MInst.AluRRR (ALUOp.Sbc) (operand_size ty) dst src1 src2) - (writable_reg_to_reg dst)))) + (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer + (MInst.AluRRR (ALUOp.Sbc) (operand_size ty) dst src1 src2) + (writable_reg_to_reg dst)))) ;; Helper for emitting `MInst.VecMisc` instructions. (decl vec_misc (VecMisc2 Reg VectorSize) Reg) @@ -1581,12 +1586,12 @@ ;; which must be paired with `with_flags*` helpers. (decl tst_imm (Type Reg ImmLogic) ProducesFlags) (rule (tst_imm ty reg imm) - (ProducesFlags.ProducesFlags (MInst.AluRRImmLogic (ALUOp.AndS) - (operand_size ty) - (writable_zero_reg) - reg - imm) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect + (MInst.AluRRImmLogic (ALUOp.AndS) + (operand_size ty) + (writable_zero_reg) + reg + imm))) ;; Helper for generating a `CSel` instruction. ;; @@ -1596,8 +1601,9 @@ (decl csel (Cond Reg Reg) ConsumesFlags) (rule (csel cond if_true if_false) (let ((dst WritableReg (temp_writable_reg $I64))) - (ConsumesFlags.ConsumesFlags (MInst.CSel dst cond if_true if_false) - (writable_reg_to_reg dst)))) + (ConsumesFlags.ConsumesFlagsReturnsReg + (MInst.CSel dst cond if_true if_false) + (writable_reg_to_reg dst)))) ;; Helpers for generating `add` instructions. diff --git a/cranelift/codegen/src/isa/aarch64/lower.isle b/cranelift/codegen/src/isa/aarch64/lower.isle index fa7b178d4e..7500d81b91 100644 --- a/cranelift/codegen/src/isa/aarch64/lower.isle +++ b/cranelift/codegen/src/isa/aarch64/lower.isle @@ -91,8 +91,8 @@ ;; the actual addition is `adds` followed by `adc` which comprises the ;; low/high bits of the result (with_flags - (add_with_flags $I64 x_lo y_lo) - (adc $I64 x_hi y_hi)))) + (add_with_flags_paired $I64 x_lo y_lo) + (adc_paired $I64 x_hi y_hi)))) ;;;; Rules for `isub` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -142,8 +142,8 @@ ;; the actual subtraction is `subs` followed by `sbc` which comprises ;; the low/high bits of the result (with_flags - (sub_with_flags $I64 x_lo y_lo) - (sbc $I64 x_hi y_hi)))) + (sub_with_flags_paired $I64 x_lo y_lo) + (sbc_paired $I64 x_hi y_hi)))) ;;;; Rules for `uadd_sat` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -708,10 +708,11 @@ inv_amt)) (maybe_hi Reg (orr $I64 hi_lshift lo_rshift)) ) - (with_flags_2 - (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (with_flags + (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (consumes_flags_concat (csel (Cond.Ne) (zero_reg) lo_lshift) - (csel (Cond.Ne) lo_lshift maybe_hi)))) + (csel (Cond.Ne) lo_lshift maybe_hi))))) ;; Shift for vector types. (rule (lower (has_type (vec128 ty) (ishl x y))) @@ -805,10 +806,11 @@ inv_amt)) (maybe_lo Reg (orr $I64 lo_rshift hi_lshift)) ) - (with_flags_2 - (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (with_flags + (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (consumes_flags_concat (csel (Cond.Ne) hi_rshift maybe_lo) - (csel (Cond.Ne) (zero_reg) hi_rshift)))) + (csel (Cond.Ne) (zero_reg) hi_rshift))))) ;;;; Rules for `sshr` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -858,10 +860,11 @@ (hi_sign Reg (asr_imm $I64 src_hi (imm_shift_from_u8 63))) (maybe_lo Reg (orr $I64 lo_rshift hi_lshift)) ) - (with_flags_2 - (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (with_flags + (tst_imm $I64 amt (u64_into_imm_logic $I64 64)) + (consumes_flags_concat (csel (Cond.Ne) hi_rshift maybe_lo) - (csel (Cond.Ne) hi_sign hi_rshift)))) + (csel (Cond.Ne) hi_sign hi_rshift))))) ;;;; Rules for `rotl` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -1123,9 +1126,9 @@ (sign_eq_eon Reg (eon $I64 hi lo)) (sign_eq Reg (lsr_imm $I64 sign_eq_eon (imm_shift_from_u8 63))) (lo_sign_bits Reg (madd64 lo_cls sign_eq sign_eq)) - (maybe_lo Reg (with_flags_1 - (cmp64_imm hi_cls (u8_into_imm12 63)) - (csel (Cond.Eq) lo_sign_bits (zero_reg)) + (maybe_lo Reg (with_flags_reg + (cmp64_imm hi_cls (u8_into_imm12 63)) + (csel (Cond.Eq) lo_sign_bits (zero_reg)) )) ) (value_regs (add $I64 maybe_lo hi_cls) (imm $I64 0)))) diff --git a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest index 188fd75ac5..9be3a9012e 100644 --- a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest +++ b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest @@ -1,4 +1,4 @@ src/clif.isle 9ea75a6f790b5c03 -src/prelude.isle 73285cd431346d53 -src/isa/aarch64/inst.isle 4c176462894836e5 -src/isa/aarch64/lower.isle aff657984bf30686 +src/prelude.isle 980b300b3ec3e338 +src/isa/aarch64/inst.isle a7f3572a5cf2f201 +src/isa/aarch64/lower.isle 534c135b5f535f33 diff --git a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs index 48f365f065..30a1ed6b47 100644 --- a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs @@ -108,16 +108,30 @@ pub enum SideEffectNoResult { Inst { inst: MInst }, } -/// Internal type ProducesFlags: defined at src/prelude.isle line 327. +/// Internal type ProducesFlags: defined at src/prelude.isle line 330. #[derive(Clone, Debug)] pub enum ProducesFlags { - ProducesFlags { inst: MInst, result: Reg }, + ProducesFlagsSideEffect { inst: MInst }, + ProducesFlagsReturnsReg { inst: MInst, result: Reg }, + ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, } -/// Internal type ConsumesFlags: defined at src/prelude.isle line 330. +/// Internal type ConsumesFlags: defined at src/prelude.isle line 341. #[derive(Clone, Debug)] pub enum ConsumesFlags { - ConsumesFlags { inst: MInst, result: Reg }, + ConsumesFlagsReturnsResultWithProducer { + inst: MInst, + result: Reg, + }, + ConsumesFlagsReturnsReg { + inst: MInst, + result: Reg, + }, + ConsumesFlagsTwiceReturnsValueRegs { + inst1: MInst, + inst2: MInst, + result: ValueRegs, + }, } /// Internal type MInst: defined at src/isa/aarch64/inst.isle line 2. @@ -1013,7 +1027,7 @@ pub fn constructor_value_regs_none( } = pattern0_0 { // Rule at src/prelude.isle line 313. - let expr0_0 = C::emit(ctx, &pattern1_0); + let expr0_0 = C::emit(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } @@ -1031,13 +1045,44 @@ pub fn constructor_safepoint( } = pattern0_0 { // Rule at src/prelude.isle line 319. - let expr0_0 = C::emit_safepoint(ctx, &pattern1_0); + let expr0_0 = C::emit_safepoint(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } return None; } +// Generated as internal constructor for term consumes_flags_concat. +pub fn constructor_consumes_flags_concat( + ctx: &mut C, + arg0: &ConsumesFlags, + arg1: &ConsumesFlags, +) -> Option { + let pattern0_0 = arg0; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern1_0, + result: pattern1_1, + } = pattern0_0 + { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 353. + let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: pattern1_0.clone(), + inst2: pattern3_0.clone(), + result: expr0_0, + }; + return Some(expr1_0); + } + } + return None; +} + // Generated as internal constructor for term with_flags. pub fn constructor_with_flags( ctx: &mut C, @@ -1045,89 +1090,71 @@ pub fn constructor_with_flags( arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 340. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); - return Some(expr2_0); + match pattern0_0 { + &ProducesFlags::ProducesFlagsSideEffect { + inst: ref pattern1_0, + } => { + let pattern2_0 = arg1; + match pattern2_0 { + &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } => { + // Rule at src/prelude.isle line 378. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_reg(ctx, pattern3_1); + return Some(expr2_0); + } + &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: ref pattern3_0, + inst2: ref pattern3_1, + result: pattern3_2, + } => { + // Rule at src/prelude.isle line 384. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_1); + let expr2_0 = C::emit(ctx, pattern3_0); + return Some(pattern3_2); + } + _ => {} + } } + &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { + inst: ref pattern1_0, + result: pattern1_1, + } => { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 372. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + return Some(expr2_0); + } + } + _ => {} } return None; } -// Generated as internal constructor for term with_flags_1. -pub fn constructor_with_flags_1( +// Generated as internal constructor for term with_flags_reg. +pub fn constructor_with_flags_reg( ctx: &mut C, arg0: &ProducesFlags, arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 348. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - return Some(pattern3_1); - } - } - return None; -} - -// Generated as internal constructor for term with_flags_2. -pub fn constructor_with_flags_2( - ctx: &mut C, - arg0: &ProducesFlags, - arg1: &ConsumesFlags, - arg2: &ConsumesFlags, -) -> Option { - let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - let pattern4_0 = arg2; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern5_0, - result: pattern5_1, - } = pattern4_0 - { - // Rule at src/prelude.isle line 358. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern5_0); - let expr2_0 = C::emit(ctx, &pattern3_0); - let expr3_0 = C::value_regs(ctx, pattern3_1, pattern5_1); - return Some(expr3_0); - } - } - } - return None; + let pattern1_0 = arg1; + // Rule at src/prelude.isle line 397. + let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; + let expr1_0: usize = 0; + let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); + return Some(expr2_0); } // Generated as internal constructor for term operand_size. @@ -1530,8 +1557,8 @@ pub fn constructor_bit_rr(ctx: &mut C, arg0: &BitOp, arg1: Reg) -> O return Some(expr4_0); } -// Generated as internal constructor for term add_with_flags. -pub fn constructor_add_with_flags( +// Generated as internal constructor for term add_with_flags_paired. +pub fn constructor_add_with_flags_paired( ctx: &mut C, arg0: Type, arg1: Reg, @@ -1553,15 +1580,15 @@ pub fn constructor_add_with_flags( rm: pattern2_0, }; let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); - let expr6_0 = ProducesFlags::ProducesFlags { + let expr6_0 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer { inst: expr4_0, result: expr5_0, }; return Some(expr6_0); } -// Generated as internal constructor for term adc. -pub fn constructor_adc( +// Generated as internal constructor for term adc_paired. +pub fn constructor_adc_paired( ctx: &mut C, arg0: Type, arg1: Reg, @@ -1570,7 +1597,7 @@ pub fn constructor_adc( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1472. + // Rule at src/isa/aarch64/inst.isle line 1473. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = ALUOp::Adc; @@ -1583,15 +1610,15 @@ pub fn constructor_adc( rm: pattern2_0, }; let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); - let expr6_0 = ConsumesFlags::ConsumesFlags { + let expr6_0 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { inst: expr4_0, result: expr5_0, }; return Some(expr6_0); } -// Generated as internal constructor for term sub_with_flags. -pub fn constructor_sub_with_flags( +// Generated as internal constructor for term sub_with_flags_paired. +pub fn constructor_sub_with_flags_paired( ctx: &mut C, arg0: Type, arg1: Reg, @@ -1600,7 +1627,7 @@ pub fn constructor_sub_with_flags( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1479. + // Rule at src/isa/aarch64/inst.isle line 1481. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = ALUOp::SubS; @@ -1613,7 +1640,7 @@ pub fn constructor_sub_with_flags( rm: pattern2_0, }; let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); - let expr6_0 = ProducesFlags::ProducesFlags { + let expr6_0 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer { inst: expr4_0, result: expr5_0, }; @@ -1628,7 +1655,7 @@ pub fn constructor_cmp64_imm( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1485. + // Rule at src/isa/aarch64/inst.isle line 1488. let expr0_0 = ALUOp::SubS; let expr1_0 = OperandSize::Size64; let expr2_0 = C::writable_zero_reg(ctx); @@ -1639,16 +1666,12 @@ pub fn constructor_cmp64_imm( rn: pattern0_0, imm12: pattern1_0, }; - let expr4_0 = C::zero_reg(ctx); - let expr5_0 = ProducesFlags::ProducesFlags { - inst: expr3_0, - result: expr4_0, - }; - return Some(expr5_0); + let expr4_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr3_0 }; + return Some(expr4_0); } -// Generated as internal constructor for term sbc. -pub fn constructor_sbc( +// Generated as internal constructor for term sbc_paired. +pub fn constructor_sbc_paired( ctx: &mut C, arg0: Type, arg1: Reg, @@ -1657,7 +1680,7 @@ pub fn constructor_sbc( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1491. + // Rule at src/isa/aarch64/inst.isle line 1495. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = ALUOp::Sbc; @@ -1670,7 +1693,7 @@ pub fn constructor_sbc( rm: pattern2_0, }; let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); - let expr6_0 = ConsumesFlags::ConsumesFlags { + let expr6_0 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { inst: expr4_0, result: expr5_0, }; @@ -1687,7 +1710,7 @@ pub fn constructor_vec_misc( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1498. + // Rule at src/isa/aarch64/inst.isle line 1503. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::VecMisc { @@ -1713,7 +1736,7 @@ pub fn constructor_vec_rrr_long( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1505. + // Rule at src/isa/aarch64/inst.isle line 1510. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::VecRRRLong { @@ -1742,7 +1765,7 @@ pub fn constructor_vec_rrrr_long( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/aarch64/inst.isle line 1515. + // Rule at src/isa/aarch64/inst.isle line 1520. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuMove128 { @@ -1772,7 +1795,7 @@ pub fn constructor_vec_rr_narrow( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1523. + // Rule at src/isa/aarch64/inst.isle line 1528. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::VecRRNarrow { @@ -1796,7 +1819,7 @@ pub fn constructor_vec_rr_long( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1530. + // Rule at src/isa/aarch64/inst.isle line 1535. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::VecRRLong { @@ -1818,7 +1841,7 @@ pub fn constructor_mov_to_fpu( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1537. + // Rule at src/isa/aarch64/inst.isle line 1542. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::MovToFpu { @@ -1843,7 +1866,7 @@ pub fn constructor_mov_to_vec( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1544. + // Rule at src/isa/aarch64/inst.isle line 1549. let expr0_0: Type = I8X16; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuMove128 { @@ -1872,7 +1895,7 @@ pub fn constructor_mov_from_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1552. + // Rule at src/isa/aarch64/inst.isle line 1557. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::MovFromVec { @@ -1898,7 +1921,7 @@ pub fn constructor_mov_from_vec_signed( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1559. + // Rule at src/isa/aarch64/inst.isle line 1564. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::MovFromVecSigned { @@ -1925,7 +1948,7 @@ pub fn constructor_extend( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1566. + // Rule at src/isa/aarch64/inst.isle line 1571. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::Extend { @@ -1944,7 +1967,7 @@ pub fn constructor_extend( pub fn constructor_load_acquire(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1573. + // Rule at src/isa/aarch64/inst.isle line 1578. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::LoadAcquire { @@ -1967,7 +1990,7 @@ pub fn constructor_tst_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1583. + // Rule at src/isa/aarch64/inst.isle line 1588. let expr0_0 = ALUOp::AndS; let expr1_0 = constructor_operand_size(ctx, pattern0_0)?; let expr2_0 = C::writable_zero_reg(ctx); @@ -1978,12 +2001,8 @@ pub fn constructor_tst_imm( rn: pattern1_0, imml: pattern2_0, }; - let expr4_0 = C::invalid_reg(ctx); - let expr5_0 = ProducesFlags::ProducesFlags { - inst: expr3_0, - result: expr4_0, - }; - return Some(expr5_0); + let expr4_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr3_0 }; + return Some(expr4_0); } // Generated as internal constructor for term csel. @@ -1996,7 +2015,7 @@ pub fn constructor_csel( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1597. + // Rule at src/isa/aarch64/inst.isle line 1602. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::CSel { @@ -2006,7 +2025,7 @@ pub fn constructor_csel( rm: pattern2_0, }; let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); - let expr4_0 = ConsumesFlags::ConsumesFlags { + let expr4_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr2_0, result: expr3_0, }; @@ -2018,7 +2037,7 @@ pub fn constructor_add(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1605. + // Rule at src/isa/aarch64/inst.isle line 1611. let expr0_0 = ALUOp::Add; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2034,7 +2053,7 @@ pub fn constructor_add_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1608. + // Rule at src/isa/aarch64/inst.isle line 1614. let expr0_0 = ALUOp::Add; let expr1_0 = constructor_alu_rr_imm12(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2050,7 +2069,7 @@ pub fn constructor_add_extend( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1611. + // Rule at src/isa/aarch64/inst.isle line 1617. let expr0_0 = ALUOp::Add; let expr1_0 = constructor_alu_rr_extend_reg(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2068,7 +2087,7 @@ pub fn constructor_add_shift( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1614. + // Rule at src/isa/aarch64/inst.isle line 1620. let expr0_0 = ALUOp::Add; let expr1_0 = constructor_alu_rrr_shift( ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0, pattern3_0, @@ -2086,7 +2105,7 @@ pub fn constructor_add_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1617. + // Rule at src/isa/aarch64/inst.isle line 1623. let expr0_0 = VecALUOp::Add; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2097,7 +2116,7 @@ pub fn constructor_sub(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1622. + // Rule at src/isa/aarch64/inst.isle line 1628. let expr0_0 = ALUOp::Sub; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2113,7 +2132,7 @@ pub fn constructor_sub_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1625. + // Rule at src/isa/aarch64/inst.isle line 1631. let expr0_0 = ALUOp::Sub; let expr1_0 = constructor_alu_rr_imm12(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2129,7 +2148,7 @@ pub fn constructor_sub_extend( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1628. + // Rule at src/isa/aarch64/inst.isle line 1634. let expr0_0 = ALUOp::Sub; let expr1_0 = constructor_alu_rr_extend_reg(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2147,7 +2166,7 @@ pub fn constructor_sub_shift( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1631. + // Rule at src/isa/aarch64/inst.isle line 1637. let expr0_0 = ALUOp::Sub; let expr1_0 = constructor_alu_rrr_shift( ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0, pattern3_0, @@ -2165,7 +2184,7 @@ pub fn constructor_sub_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1634. + // Rule at src/isa/aarch64/inst.isle line 1640. let expr0_0 = VecALUOp::Sub; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2184,7 +2203,7 @@ pub fn constructor_madd( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1640. + // Rule at src/isa/aarch64/inst.isle line 1646. let expr0_0 = constructor_madd64(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -2192,7 +2211,7 @@ pub fn constructor_madd( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1639. + // Rule at src/isa/aarch64/inst.isle line 1645. let expr0_0 = constructor_madd32(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -2204,7 +2223,7 @@ pub fn constructor_madd32(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: R let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1643. + // Rule at src/isa/aarch64/inst.isle line 1649. let expr0_0 = ALUOp3::MAdd32; let expr1_0 = constructor_alu_rrrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2215,7 +2234,7 @@ pub fn constructor_madd64(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: R let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1646. + // Rule at src/isa/aarch64/inst.isle line 1652. let expr0_0 = ALUOp3::MAdd64; let expr1_0 = constructor_alu_rrrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2226,7 +2245,7 @@ pub fn constructor_msub64(ctx: &mut C, arg0: Reg, arg1: Reg, arg2: R let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1651. + // Rule at src/isa/aarch64/inst.isle line 1657. let expr0_0 = ALUOp3::MSub64; let expr1_0 = constructor_alu_rrrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2242,7 +2261,7 @@ pub fn constructor_uqadd( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1655. + // Rule at src/isa/aarch64/inst.isle line 1661. let expr0_0 = VecALUOp::Uqadd; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2258,7 +2277,7 @@ pub fn constructor_sqadd( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1659. + // Rule at src/isa/aarch64/inst.isle line 1665. let expr0_0 = VecALUOp::Sqadd; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2274,7 +2293,7 @@ pub fn constructor_uqsub( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1663. + // Rule at src/isa/aarch64/inst.isle line 1669. let expr0_0 = VecALUOp::Uqsub; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2290,7 +2309,7 @@ pub fn constructor_sqsub( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1667. + // Rule at src/isa/aarch64/inst.isle line 1673. let expr0_0 = VecALUOp::Sqsub; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2301,7 +2320,7 @@ pub fn constructor_umulh(ctx: &mut C, arg0: Type, arg1: Reg, arg2: R let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1671. + // Rule at src/isa/aarch64/inst.isle line 1677. let expr0_0 = ALUOp::UMulH; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2312,7 +2331,7 @@ pub fn constructor_smulh(ctx: &mut C, arg0: Type, arg1: Reg, arg2: R let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1675. + // Rule at src/isa/aarch64/inst.isle line 1681. let expr0_0 = ALUOp::SMulH; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2328,7 +2347,7 @@ pub fn constructor_mul( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1679. + // Rule at src/isa/aarch64/inst.isle line 1685. let expr0_0 = VecALUOp::Mul; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2338,7 +2357,7 @@ pub fn constructor_mul( pub fn constructor_neg(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1683. + // Rule at src/isa/aarch64/inst.isle line 1689. let expr0_0 = VecMisc2::Neg; let expr1_0 = constructor_vec_misc(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2348,7 +2367,7 @@ pub fn constructor_neg(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> pub fn constructor_rev64(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1687. + // Rule at src/isa/aarch64/inst.isle line 1693. let expr0_0 = VecMisc2::Rev64; let expr1_0 = constructor_vec_misc(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2358,7 +2377,7 @@ pub fn constructor_rev64(ctx: &mut C, arg0: Reg, arg1: &VectorSize) pub fn constructor_xtn64(ctx: &mut C, arg0: Reg, arg1: bool) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1691. + // Rule at src/isa/aarch64/inst.isle line 1697. let expr0_0 = VecRRNarrowOp::Xtn64; let expr1_0 = constructor_vec_rr_narrow(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2374,7 +2393,7 @@ pub fn constructor_addp( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1695. + // Rule at src/isa/aarch64/inst.isle line 1701. let expr0_0 = VecALUOp::Addp; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2384,7 +2403,7 @@ pub fn constructor_addp( pub fn constructor_addv(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1699. + // Rule at src/isa/aarch64/inst.isle line 1705. let expr0_0 = VecLanesOp::Addv; let expr1_0 = constructor_vec_lanes(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2394,7 +2413,7 @@ pub fn constructor_addv(ctx: &mut C, arg0: Reg, arg1: &VectorSize) - pub fn constructor_shll32(ctx: &mut C, arg0: Reg, arg1: bool) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1703. + // Rule at src/isa/aarch64/inst.isle line 1709. let expr0_0 = VecRRLongOp::Shll32; let expr1_0 = constructor_vec_rr_long(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2412,7 +2431,7 @@ pub fn constructor_umlal32( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1707. + // Rule at src/isa/aarch64/inst.isle line 1713. let expr0_0 = VecRRRLongOp::Umlal32; let expr1_0 = constructor_vec_rrrr_long( ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0, pattern3_0, @@ -2430,7 +2449,7 @@ pub fn constructor_smull8( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1711. + // Rule at src/isa/aarch64/inst.isle line 1717. let expr0_0 = VecRRRLongOp::Smull8; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2446,7 +2465,7 @@ pub fn constructor_umull8( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1715. + // Rule at src/isa/aarch64/inst.isle line 1721. let expr0_0 = VecRRRLongOp::Umull8; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2462,7 +2481,7 @@ pub fn constructor_smull16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1719. + // Rule at src/isa/aarch64/inst.isle line 1725. let expr0_0 = VecRRRLongOp::Smull16; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2478,7 +2497,7 @@ pub fn constructor_umull16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1723. + // Rule at src/isa/aarch64/inst.isle line 1729. let expr0_0 = VecRRRLongOp::Umull16; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2494,7 +2513,7 @@ pub fn constructor_smull32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1727. + // Rule at src/isa/aarch64/inst.isle line 1733. let expr0_0 = VecRRRLongOp::Smull32; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2510,7 +2529,7 @@ pub fn constructor_umull32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1731. + // Rule at src/isa/aarch64/inst.isle line 1737. let expr0_0 = VecRRRLongOp::Umull32; let expr1_0 = constructor_vec_rrr_long(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2521,7 +2540,7 @@ pub fn constructor_asr(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1735. + // Rule at src/isa/aarch64/inst.isle line 1741. let expr0_0 = ALUOp::Asr; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2537,7 +2556,7 @@ pub fn constructor_asr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1738. + // Rule at src/isa/aarch64/inst.isle line 1744. let expr0_0 = ALUOp::Asr; let expr1_0 = constructor_alu_rr_imm_shift(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2548,7 +2567,7 @@ pub fn constructor_lsr(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1742. + // Rule at src/isa/aarch64/inst.isle line 1748. let expr0_0 = ALUOp::Lsr; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2564,7 +2583,7 @@ pub fn constructor_lsr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1745. + // Rule at src/isa/aarch64/inst.isle line 1751. let expr0_0 = ALUOp::Lsr; let expr1_0 = constructor_alu_rr_imm_shift(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2575,7 +2594,7 @@ pub fn constructor_lsl(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1749. + // Rule at src/isa/aarch64/inst.isle line 1755. let expr0_0 = ALUOp::Lsl; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2591,7 +2610,7 @@ pub fn constructor_lsl_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1752. + // Rule at src/isa/aarch64/inst.isle line 1758. let expr0_0 = ALUOp::Lsl; let expr1_0 = constructor_alu_rr_imm_shift(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2607,7 +2626,7 @@ pub fn constructor_a64_udiv( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1756. + // Rule at src/isa/aarch64/inst.isle line 1762. let expr0_0 = ALUOp::UDiv; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2623,7 +2642,7 @@ pub fn constructor_a64_sdiv( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1760. + // Rule at src/isa/aarch64/inst.isle line 1766. let expr0_0 = ALUOp::SDiv; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2633,7 +2652,7 @@ pub fn constructor_a64_sdiv( pub fn constructor_not(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1764. + // Rule at src/isa/aarch64/inst.isle line 1770. let expr0_0 = VecMisc2::Not; let expr1_0 = constructor_vec_misc(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2649,7 +2668,7 @@ pub fn constructor_orr_not( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1769. + // Rule at src/isa/aarch64/inst.isle line 1775. let expr0_0 = ALUOp::OrrNot; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2667,7 +2686,7 @@ pub fn constructor_orr_not_shift( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1772. + // Rule at src/isa/aarch64/inst.isle line 1778. let expr0_0 = ALUOp::OrrNot; let expr1_0 = constructor_alu_rrr_shift( ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0, pattern3_0, @@ -2680,7 +2699,7 @@ pub fn constructor_orr(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1777. + // Rule at src/isa/aarch64/inst.isle line 1783. let expr0_0 = ALUOp::Orr; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2696,7 +2715,7 @@ pub fn constructor_orr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1780. + // Rule at src/isa/aarch64/inst.isle line 1786. let expr0_0 = ALUOp::Orr; let expr1_0 = constructor_alu_rr_imm_logic(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2712,7 +2731,7 @@ pub fn constructor_orr_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1783. + // Rule at src/isa/aarch64/inst.isle line 1789. let expr0_0 = VecALUOp::Orr; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2728,7 +2747,7 @@ pub fn constructor_and_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1788. + // Rule at src/isa/aarch64/inst.isle line 1794. let expr0_0 = ALUOp::And; let expr1_0 = constructor_alu_rr_imm_logic(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2744,7 +2763,7 @@ pub fn constructor_and_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1791. + // Rule at src/isa/aarch64/inst.isle line 1797. let expr0_0 = VecALUOp::And; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2760,7 +2779,7 @@ pub fn constructor_eor_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1795. + // Rule at src/isa/aarch64/inst.isle line 1801. let expr0_0 = VecALUOp::Eor; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2776,7 +2795,7 @@ pub fn constructor_bic_vec( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1799. + // Rule at src/isa/aarch64/inst.isle line 1805. let expr0_0 = VecALUOp::Bic; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2792,7 +2811,7 @@ pub fn constructor_sshl( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1803. + // Rule at src/isa/aarch64/inst.isle line 1809. let expr0_0 = VecALUOp::Sshl; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2808,7 +2827,7 @@ pub fn constructor_ushl( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1807. + // Rule at src/isa/aarch64/inst.isle line 1813. let expr0_0 = VecALUOp::Ushl; let expr1_0 = constructor_vec_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2824,7 +2843,7 @@ pub fn constructor_a64_rotr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1812. + // Rule at src/isa/aarch64/inst.isle line 1818. let expr0_0 = ALUOp::RotR; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2840,7 +2859,7 @@ pub fn constructor_a64_rotr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1815. + // Rule at src/isa/aarch64/inst.isle line 1821. let expr0_0 = ALUOp::RotR; let expr1_0 = constructor_alu_rr_imm_shift(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2849,7 +2868,7 @@ pub fn constructor_a64_rotr_imm( // Generated as internal constructor for term rbit32. pub fn constructor_rbit32(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1820. + // Rule at src/isa/aarch64/inst.isle line 1826. let expr0_0 = BitOp::RBit32; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2858,7 +2877,7 @@ pub fn constructor_rbit32(ctx: &mut C, arg0: Reg) -> Option { // Generated as internal constructor for term rbit64. pub fn constructor_rbit64(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1823. + // Rule at src/isa/aarch64/inst.isle line 1829. let expr0_0 = BitOp::RBit64; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2867,7 +2886,7 @@ pub fn constructor_rbit64(ctx: &mut C, arg0: Reg) -> Option { // Generated as internal constructor for term clz32. pub fn constructor_clz32(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1828. + // Rule at src/isa/aarch64/inst.isle line 1834. let expr0_0 = BitOp::Clz32; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2876,7 +2895,7 @@ pub fn constructor_clz32(ctx: &mut C, arg0: Reg) -> Option { // Generated as internal constructor for term clz64. pub fn constructor_clz64(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1831. + // Rule at src/isa/aarch64/inst.isle line 1837. let expr0_0 = BitOp::Clz64; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2885,7 +2904,7 @@ pub fn constructor_clz64(ctx: &mut C, arg0: Reg) -> Option { // Generated as internal constructor for term cls32. pub fn constructor_cls32(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1836. + // Rule at src/isa/aarch64/inst.isle line 1842. let expr0_0 = BitOp::Cls32; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2894,7 +2913,7 @@ pub fn constructor_cls32(ctx: &mut C, arg0: Reg) -> Option { // Generated as internal constructor for term cls64. pub fn constructor_cls64(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1839. + // Rule at src/isa/aarch64/inst.isle line 1845. let expr0_0 = BitOp::Cls64; let expr1_0 = constructor_bit_rr(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2905,7 +2924,7 @@ pub fn constructor_eon(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1844. + // Rule at src/isa/aarch64/inst.isle line 1850. let expr0_0 = ALUOp::EorNot; let expr1_0 = constructor_alu_rrr(ctx, &expr0_0, pattern0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2915,7 +2934,7 @@ pub fn constructor_eon(ctx: &mut C, arg0: Type, arg1: Reg, arg2: Reg pub fn constructor_vec_cnt(ctx: &mut C, arg0: Reg, arg1: &VectorSize) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/inst.isle line 1849. + // Rule at src/isa/aarch64/inst.isle line 1855. let expr0_0 = VecMisc2::Cnt; let expr1_0 = constructor_vec_misc(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2932,7 +2951,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option }; if let Some(pattern3_0) = closure3() { if let Some(pattern4_0) = C::imm_logic_from_u64(ctx, pattern2_0, pattern3_0) { - // Rule at src/isa/aarch64/inst.isle line 1864. + // Rule at src/isa/aarch64/inst.isle line 1870. let expr0_0: Type = I64; let expr1_0 = C::zero_reg(ctx); let expr2_0 = constructor_orr_imm(ctx, expr0_0, expr1_0, pattern4_0)?; @@ -2940,18 +2959,18 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option } } if let Some(pattern3_0) = C::move_wide_const_from_u64(ctx, pattern2_0) { - // Rule at src/isa/aarch64/inst.isle line 1856. + // Rule at src/isa/aarch64/inst.isle line 1862. let expr0_0 = OperandSize::Size64; let expr1_0 = constructor_movz(ctx, pattern3_0, &expr0_0)?; return Some(expr1_0); } if let Some(pattern3_0) = C::move_wide_const_from_negated_u64(ctx, pattern2_0) { - // Rule at src/isa/aarch64/inst.isle line 1860. + // Rule at src/isa/aarch64/inst.isle line 1866. let expr0_0 = OperandSize::Size64; let expr1_0 = constructor_movn(ctx, pattern3_0, &expr0_0)?; return Some(expr1_0); } - // Rule at src/isa/aarch64/inst.isle line 1871. + // Rule at src/isa/aarch64/inst.isle line 1877. let expr0_0 = C::load_constant64_full(ctx, pattern2_0); return Some(expr0_0); } @@ -2963,17 +2982,17 @@ pub fn constructor_put_in_reg_sext32(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if pattern1_0 == I32 { - // Rule at src/isa/aarch64/inst.isle line 1882. + // Rule at src/isa/aarch64/inst.isle line 1888. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if pattern1_0 == I64 { - // Rule at src/isa/aarch64/inst.isle line 1883. + // Rule at src/isa/aarch64/inst.isle line 1889. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if let Some(pattern2_0) = C::fits_in_32(ctx, pattern1_0) { - // Rule at src/isa/aarch64/inst.isle line 1878. + // Rule at src/isa/aarch64/inst.isle line 1884. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0: bool = true; let expr2_0 = C::ty_bits(ctx, pattern2_0); @@ -2989,17 +3008,17 @@ pub fn constructor_put_in_reg_zext32(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if pattern1_0 == I32 { - // Rule at src/isa/aarch64/inst.isle line 1891. + // Rule at src/isa/aarch64/inst.isle line 1897. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if pattern1_0 == I64 { - // Rule at src/isa/aarch64/inst.isle line 1892. + // Rule at src/isa/aarch64/inst.isle line 1898. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if let Some(pattern2_0) = C::fits_in_32(ctx, pattern1_0) { - // Rule at src/isa/aarch64/inst.isle line 1887. + // Rule at src/isa/aarch64/inst.isle line 1893. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0: bool = false; let expr2_0 = C::ty_bits(ctx, pattern2_0); @@ -3015,12 +3034,12 @@ pub fn constructor_put_in_reg_sext64(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if pattern1_0 == I64 { - // Rule at src/isa/aarch64/inst.isle line 1900. + // Rule at src/isa/aarch64/inst.isle line 1906. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if let Some(pattern2_0) = C::fits_in_32(ctx, pattern1_0) { - // Rule at src/isa/aarch64/inst.isle line 1896. + // Rule at src/isa/aarch64/inst.isle line 1902. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0: bool = true; let expr2_0 = C::ty_bits(ctx, pattern2_0); @@ -3036,12 +3055,12 @@ pub fn constructor_put_in_reg_zext64(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if pattern1_0 == I64 { - // Rule at src/isa/aarch64/inst.isle line 1908. + // Rule at src/isa/aarch64/inst.isle line 1914. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } if let Some(pattern2_0) = C::fits_in_32(ctx, pattern1_0) { - // Rule at src/isa/aarch64/inst.isle line 1904. + // Rule at src/isa/aarch64/inst.isle line 1910. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0: bool = false; let expr2_0 = C::ty_bits(ctx, pattern2_0); @@ -3055,7 +3074,7 @@ pub fn constructor_put_in_reg_zext64(ctx: &mut C, arg0: Value) -> Op // Generated as internal constructor for term trap_if_zero_divisor. pub fn constructor_trap_if_zero_divisor(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/inst.isle line 1913. + // Rule at src/isa/aarch64/inst.isle line 1919. let expr0_0 = C::cond_br_zero(ctx, pattern0_0); let expr1_0 = C::trap_code_division_by_zero(ctx); let expr2_0 = MInst::TrapIf { @@ -3070,12 +3089,12 @@ pub fn constructor_trap_if_zero_divisor(ctx: &mut C, arg0: Reg) -> O pub fn constructor_size_from_ty(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/aarch64/inst.isle line 1919. + // Rule at src/isa/aarch64/inst.isle line 1925. let expr0_0 = OperandSize::Size64; return Some(expr0_0); } if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { - // Rule at src/isa/aarch64/inst.isle line 1918. + // Rule at src/isa/aarch64/inst.isle line 1924. let expr0_0 = OperandSize::Size32; return Some(expr0_0); } @@ -3092,7 +3111,7 @@ pub fn constructor_trap_if_div_overflow( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/inst.isle line 1925. + // Rule at src/isa/aarch64/inst.isle line 1931. let expr0_0 = ALUOp::AddS; let expr1_0 = constructor_operand_size(ctx, pattern0_0)?; let expr2_0 = C::writable_zero_reg(ctx); @@ -3152,7 +3171,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( opcode: ref pattern5_0, imm: pattern5_1, } => { - if let &Opcode::Iconst = &pattern5_0 { + if let &Opcode::Iconst = pattern5_0 { let closure7 = || { return Some(pattern1_0); }; @@ -3161,7 +3180,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( C::imm_logic_from_imm64(ctx, pattern5_1, pattern7_0) { let pattern9_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1970. + // Rule at src/isa/aarch64/inst.isle line 1976. let expr0_0 = C::put_in_reg(ctx, pattern9_0); let expr1_0 = constructor_alu_rr_imm_logic( ctx, pattern0_0, pattern1_0, expr0_0, pattern8_0, @@ -3175,8 +3194,8 @@ pub fn constructor_alu_rs_imm_logic_commutative( opcode: ref pattern5_0, args: ref pattern5_1, } => { - if let &Opcode::Ishl = &pattern5_0 { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + if let &Opcode::Ishl = pattern5_0 { + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -3184,7 +3203,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( imm: pattern10_1, } = &pattern9_0 { - if let &Opcode::Iconst = &pattern10_0 { + if let &Opcode::Iconst = pattern10_0 { let closure12 = || { return Some(pattern1_0); }; @@ -3193,7 +3212,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( C::lshl_from_imm64(ctx, pattern10_1, pattern12_0) { let pattern14_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1976. + // Rule at src/isa/aarch64/inst.isle line 1982. let expr0_0 = C::put_in_reg(ctx, pattern14_0); let expr1_0 = C::put_in_reg(ctx, pattern7_0); let expr2_0 = constructor_alu_rrr_shift( @@ -3223,7 +3242,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( opcode: ref pattern6_0, imm: pattern6_1, } => { - if let &Opcode::Iconst = &pattern6_0 { + if let &Opcode::Iconst = pattern6_0 { let closure8 = || { return Some(pattern1_0); }; @@ -3231,7 +3250,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( if let Some(pattern9_0) = C::imm_logic_from_imm64(ctx, pattern6_1, pattern8_0) { - // Rule at src/isa/aarch64/inst.isle line 1968. + // Rule at src/isa/aarch64/inst.isle line 1974. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = constructor_alu_rr_imm_logic( ctx, pattern0_0, pattern1_0, expr0_0, pattern9_0, @@ -3245,8 +3264,8 @@ pub fn constructor_alu_rs_imm_logic_commutative( opcode: ref pattern6_0, args: ref pattern6_1, } => { - if let &Opcode::Ishl = &pattern6_0 { - let (pattern8_0, pattern8_1) = C::unpack_value_array_2(ctx, &pattern6_1); + if let &Opcode::Ishl = pattern6_0 { + let (pattern8_0, pattern8_1) = C::unpack_value_array_2(ctx, pattern6_1); if let Some(pattern9_0) = C::def_inst(ctx, pattern8_1) { let pattern10_0 = C::inst_data(ctx, pattern9_0); if let &InstructionData::UnaryImm { @@ -3254,7 +3273,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( imm: pattern11_1, } = &pattern10_0 { - if let &Opcode::Iconst = &pattern11_0 { + if let &Opcode::Iconst = pattern11_0 { let closure13 = || { return Some(pattern1_0); }; @@ -3262,7 +3281,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( if let Some(pattern14_0) = C::lshl_from_imm64(ctx, pattern11_1, pattern13_0) { - // Rule at src/isa/aarch64/inst.isle line 1974. + // Rule at src/isa/aarch64/inst.isle line 1980. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = C::put_in_reg(ctx, pattern8_0); let expr2_0 = constructor_alu_rrr_shift( @@ -3284,7 +3303,7 @@ pub fn constructor_alu_rs_imm_logic_commutative( _ => {} } } - // Rule at src/isa/aarch64/inst.isle line 1964. + // Rule at src/isa/aarch64/inst.isle line 1970. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = C::put_in_reg(ctx, pattern3_0); let expr2_0 = constructor_alu_rrr(ctx, pattern0_0, pattern1_0, expr0_0, expr1_0)?; @@ -3310,7 +3329,7 @@ pub fn constructor_alu_rs_imm_logic( opcode: ref pattern6_0, imm: pattern6_1, } => { - if let &Opcode::Iconst = &pattern6_0 { + if let &Opcode::Iconst = pattern6_0 { let closure8 = || { return Some(pattern1_0); }; @@ -3318,7 +3337,7 @@ pub fn constructor_alu_rs_imm_logic( if let Some(pattern9_0) = C::imm_logic_from_imm64(ctx, pattern6_1, pattern8_0) { - // Rule at src/isa/aarch64/inst.isle line 1984. + // Rule at src/isa/aarch64/inst.isle line 1990. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = constructor_alu_rr_imm_logic( ctx, pattern0_0, pattern1_0, expr0_0, pattern9_0, @@ -3332,8 +3351,8 @@ pub fn constructor_alu_rs_imm_logic( opcode: ref pattern6_0, args: ref pattern6_1, } => { - if let &Opcode::Ishl = &pattern6_0 { - let (pattern8_0, pattern8_1) = C::unpack_value_array_2(ctx, &pattern6_1); + if let &Opcode::Ishl = pattern6_0 { + let (pattern8_0, pattern8_1) = C::unpack_value_array_2(ctx, pattern6_1); if let Some(pattern9_0) = C::def_inst(ctx, pattern8_1) { let pattern10_0 = C::inst_data(ctx, pattern9_0); if let &InstructionData::UnaryImm { @@ -3341,7 +3360,7 @@ pub fn constructor_alu_rs_imm_logic( imm: pattern11_1, } = &pattern10_0 { - if let &Opcode::Iconst = &pattern11_0 { + if let &Opcode::Iconst = pattern11_0 { let closure13 = || { return Some(pattern1_0); }; @@ -3349,7 +3368,7 @@ pub fn constructor_alu_rs_imm_logic( if let Some(pattern14_0) = C::lshl_from_imm64(ctx, pattern11_1, pattern13_0) { - // Rule at src/isa/aarch64/inst.isle line 1986. + // Rule at src/isa/aarch64/inst.isle line 1992. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = C::put_in_reg(ctx, pattern8_0); let expr2_0 = constructor_alu_rrr_shift( @@ -3371,7 +3390,7 @@ pub fn constructor_alu_rs_imm_logic( _ => {} } } - // Rule at src/isa/aarch64/inst.isle line 1982. + // Rule at src/isa/aarch64/inst.isle line 1988. let expr0_0 = C::put_in_reg(ctx, pattern2_0); let expr1_0 = C::put_in_reg(ctx, pattern3_0); let expr2_0 = constructor_alu_rrr(ctx, pattern0_0, pattern1_0, expr0_0, expr1_0)?; @@ -3390,7 +3409,7 @@ pub fn constructor_i128_alu_bitop( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/aarch64/inst.isle line 1994. + // Rule at src/isa/aarch64/inst.isle line 2000. let expr0_0 = C::put_in_regs(ctx, pattern2_0); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -3419,9 +3438,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1013. + // Rule at src/isa/aarch64/lower.isle line 1016. let expr0_0: Type = I32; let expr1_0 = C::put_in_reg(ctx, pattern5_1); let expr2_0 = constructor_rbit32(ctx, expr1_0)?; @@ -3432,7 +3451,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1038. + // Rule at src/isa/aarch64/lower.isle line 1041. let expr0_0: Type = I32; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; let expr2_0 = constructor_clz32(ctx, expr1_0)?; @@ -3443,7 +3462,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1095. + // Rule at src/isa/aarch64/lower.isle line 1098. let expr0_0: Type = I32; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; let expr2_0 = constructor_cls32(ctx, expr1_0)?; @@ -3454,7 +3473,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1073. + // Rule at src/isa/aarch64/lower.isle line 1076. let expr0_0: Type = I32; let expr1_0 = C::put_in_reg(ctx, pattern5_1); let expr2_0 = constructor_rbit32(ctx, expr1_0)?; @@ -3467,7 +3486,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1152. + // Rule at src/isa/aarch64/lower.isle line 1155. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = ScalarSize::Size32; let expr2_0 = constructor_mov_to_fpu(ctx, expr0_0, &expr1_0)?; @@ -3490,9 +3509,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1019. + // Rule at src/isa/aarch64/lower.isle line 1022. let expr0_0: Type = I32; let expr1_0 = C::put_in_reg(ctx, pattern5_1); let expr2_0 = constructor_rbit32(ctx, expr1_0)?; @@ -3503,7 +3522,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1041. + // Rule at src/isa/aarch64/lower.isle line 1044. let expr0_0: Type = I32; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; let expr2_0 = constructor_clz32(ctx, expr1_0)?; @@ -3514,7 +3533,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1098. + // Rule at src/isa/aarch64/lower.isle line 1101. let expr0_0: Type = I32; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; let expr2_0 = constructor_cls32(ctx, expr1_0)?; @@ -3525,7 +3544,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1076. + // Rule at src/isa/aarch64/lower.isle line 1079. let expr0_0: Type = I32; let expr1_0 = C::put_in_reg(ctx, pattern5_1); let expr2_0 = constructor_rbit32(ctx, expr1_0)?; @@ -3538,7 +3557,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1160. + // Rule at src/isa/aarch64/lower.isle line 1163. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = ScalarSize::Size32; let expr2_0 = constructor_mov_to_fpu(ctx, expr0_0, &expr1_0)?; @@ -3563,10 +3582,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Rotl => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -3574,7 +3592,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -3622,7 +3639,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Bitrev => { - // Rule at src/isa/aarch64/lower.isle line 1022. + // Rule at src/isa/aarch64/lower.isle line 1025. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_rbit32(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Clz => { - // Rule at src/isa/aarch64/lower.isle line 1044. + // Rule at src/isa/aarch64/lower.isle line 1047. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_clz32(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Cls => { - // Rule at src/isa/aarch64/lower.isle line 1101. + // Rule at src/isa/aarch64/lower.isle line 1104. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_cls32(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Ctz => { - // Rule at src/isa/aarch64/lower.isle line 1079. + // Rule at src/isa/aarch64/lower.isle line 1082. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_rbit32(ctx, expr0_0)?; let expr2_0 = constructor_clz32(ctx, expr1_0)?; @@ -3695,7 +3712,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1168. + // Rule at src/isa/aarch64/lower.isle line 1171. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = ScalarSize::Size32; let expr2_0 = constructor_mov_to_fpu(ctx, expr0_0, &expr1_0)?; @@ -3723,10 +3740,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Umulhi => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 374. let expr0_0: Type = I64; let expr1_0 = C::put_in_reg(ctx, pattern7_0); @@ -3736,8 +3752,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 360. let expr0_0: Type = I64; let expr1_0 = C::put_in_reg(ctx, pattern7_0); @@ -3747,8 +3762,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 609. let expr0_0 = ALUOp::And; let expr1_0: Type = I64; @@ -3759,8 +3773,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 622. let expr0_0 = ALUOp::Orr; let expr1_0: Type = I64; @@ -3771,8 +3784,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 635. let expr0_0 = ALUOp::Eor; let expr1_0: Type = I64; @@ -3783,8 +3795,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 648. let expr0_0 = ALUOp::AndNot; let expr1_0: Type = I64; @@ -3795,8 +3806,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 661. let expr0_0 = ALUOp::OrrNot; let expr1_0: Type = I64; @@ -3807,8 +3817,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 671. let expr0_0 = ALUOp::EorNot; let expr1_0: Type = I64; @@ -3819,8 +3828,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -3828,7 +3836,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -3876,7 +3883,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 683. let expr0_0 = ALUOp::Lsl; let expr1_0: Type = I64; @@ -3924,9 +3930,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 771. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 772. let expr0_0 = ALUOp::Lsr; let expr1_0: Type = I64; let expr2_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; @@ -3936,9 +3941,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 820. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 822. let expr0_0 = ALUOp::Asr; let expr1_0: Type = I64; let expr2_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; @@ -3954,30 +3958,30 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Bitrev => { - // Rule at src/isa/aarch64/lower.isle line 1025. + // Rule at src/isa/aarch64/lower.isle line 1028. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_rbit64(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Clz => { - // Rule at src/isa/aarch64/lower.isle line 1047. + // Rule at src/isa/aarch64/lower.isle line 1050. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_clz64(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Cls => { - // Rule at src/isa/aarch64/lower.isle line 1104. + // Rule at src/isa/aarch64/lower.isle line 1107. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_cls64(ctx, expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); } &Opcode::Ctz => { - // Rule at src/isa/aarch64/lower.isle line 1082. + // Rule at src/isa/aarch64/lower.isle line 1085. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_rbit64(ctx, expr0_0)?; let expr2_0 = constructor_clz64(ctx, expr1_0)?; @@ -3985,7 +3989,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1176. + // Rule at src/isa/aarch64/lower.isle line 1179. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = ScalarSize::Size64; let expr2_0 = constructor_mov_to_fpu(ctx, expr0_0, &expr1_0)?; @@ -4013,10 +4017,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Iadd => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 79. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -4030,15 +4033,14 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 130. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -4052,15 +4054,14 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 185. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -4082,8 +4083,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 612. let expr0_0 = ALUOp::And; let expr1_0: Type = I64; @@ -4093,8 +4093,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 625. let expr0_0 = ALUOp::Orr; let expr1_0: Type = I64; @@ -4104,8 +4103,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 638. let expr0_0 = ALUOp::Eor; let expr1_0: Type = I64; @@ -4115,8 +4113,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 651. let expr0_0 = ALUOp::AndNot; let expr1_0: Type = I64; @@ -4126,8 +4123,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 664. let expr0_0 = ALUOp::OrrNot; let expr1_0: Type = I64; @@ -4137,8 +4133,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 674. let expr0_0 = ALUOp::EorNot; let expr1_0: Type = I64; @@ -4148,9 +4143,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 909. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 912. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); let expr2_0: usize = 0; @@ -4178,9 +4172,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 996. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 999. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); let expr2_0: usize = 0; @@ -4208,8 +4201,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 687. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); @@ -4219,9 +4211,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 775. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 776. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); let expr2_0: usize = 0; @@ -4230,9 +4221,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 824. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 826. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); let expr2_0: usize = 0; @@ -4247,7 +4237,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Bnot => { // Rule at src/isa/aarch64/lower.isle line 590. let expr0_0 = C::put_in_regs(ctx, pattern5_1); @@ -4265,7 +4255,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1028. + // Rule at src/isa/aarch64/lower.isle line 1031. let expr0_0 = C::put_in_regs(ctx, pattern5_1); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -4277,13 +4267,13 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1050. + // Rule at src/isa/aarch64/lower.isle line 1053. let expr0_0 = C::put_in_regs(ctx, pattern5_1); let expr1_0 = constructor_lower_clz128(ctx, expr0_0)?; return Some(expr1_0); } &Opcode::Cls => { - // Rule at src/isa/aarch64/lower.isle line 1116. + // Rule at src/isa/aarch64/lower.isle line 1119. let expr0_0 = C::put_in_regs(ctx, pattern5_1); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -4304,7 +4294,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1085. + // Rule at src/isa/aarch64/lower.isle line 1088. let expr0_0 = C::put_in_regs(ctx, pattern5_1); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -4327,7 +4317,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/aarch64/lower.isle line 1184. + // Rule at src/isa/aarch64/lower.isle line 1187. let expr0_0 = C::put_in_regs(ctx, pattern5_1); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -4362,7 +4352,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let pattern12_0 = C::value_type(ctx, pattern10_1); if pattern12_0 == I8X16 { @@ -4507,7 +4497,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let pattern12_0 = C::value_type(ctx, pattern10_1); if pattern12_0 == I16X8 { @@ -4655,7 +4645,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let pattern12_0 = C::value_type(ctx, pattern10_1); if pattern12_0 == I32X4 { @@ -4803,7 +4793,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Null = &pattern4_0 { + if let &Opcode::Null = pattern4_0 { // Rule at src/isa/aarch64/lower.isle line 22. let expr0_0: u64 = 0; let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; @@ -4960,7 +4950,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern4_0 { + if let &Opcode::Iconst = pattern4_0 { let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); // Rule at src/isa/aarch64/lower.isle line 9. let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; @@ -4972,7 +4962,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bconst = &pattern4_0 { + if let &Opcode::Bconst = pattern4_0 { if pattern4_1 == true { // Rule at src/isa/aarch64/lower.isle line 17. let expr0_0: u64 = 1; @@ -4998,9 +4988,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 75. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5010,7 +5000,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 126. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5030,9 +5020,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5040,7 +5030,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5082,7 +5072,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 377. let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; @@ -5140,7 +5130,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 363. let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; @@ -5154,7 +5144,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 606. let expr0_0 = ALUOp::And; let expr1_0 = constructor_alu_rs_imm_logic_commutative( @@ -5164,7 +5154,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 619. let expr0_0 = ALUOp::Orr; let expr1_0 = constructor_alu_rs_imm_logic_commutative( @@ -5174,7 +5164,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 632. let expr0_0 = ALUOp::Eor; let expr1_0 = constructor_alu_rs_imm_logic_commutative( @@ -5184,7 +5174,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 645. let expr0_0 = ALUOp::AndNot; let expr1_0 = constructor_alu_rs_imm_logic( @@ -5194,7 +5184,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 658. let expr0_0 = ALUOp::OrrNot; let expr1_0 = constructor_alu_rs_imm_logic( @@ -5204,7 +5194,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 668. let expr0_0 = ALUOp::EorNot; let expr1_0: Type = I32; @@ -5215,7 +5205,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 679. let expr0_0 = ALUOp::Lsl; let expr1_0 = C::put_in_reg(ctx, pattern7_0); @@ -5225,8 +5215,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 767. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 768. let expr0_0 = ALUOp::Lsr; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; let expr2_0 = @@ -5235,8 +5225,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 816. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 818. let expr0_0 = ALUOp::Asr; let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; let expr2_0 = @@ -5255,10 +5245,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Iadd => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { let pattern9_0 = C::inst_data(ctx, pattern8_0); match &pattern9_0 { @@ -5266,7 +5255,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern10_0 { + if let &Opcode::Iconst = pattern10_0 { let pattern12_0 = C::u64_from_imm64(ctx, pattern10_1); if let Some(pattern13_0) = C::imm12_from_u64(ctx, pattern12_0) @@ -5302,10 +5291,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern10_0 { + match pattern10_0 { &Opcode::Imul => { let (pattern12_0, pattern12_1) = - C::unpack_value_array_2(ctx, &pattern10_1); + C::unpack_value_array_2(ctx, pattern10_1); // Rule at src/isa/aarch64/lower.isle line 70. let expr0_0 = C::put_in_reg(ctx, pattern12_0); let expr1_0 = C::put_in_reg(ctx, pattern12_1); @@ -5318,7 +5307,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern12_0, pattern12_1) = - C::unpack_value_array_2(ctx, &pattern10_1); + C::unpack_value_array_2(ctx, pattern10_1); if let Some(pattern13_0) = C::def_inst(ctx, pattern12_1) { @@ -5329,7 +5318,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern10_0 { + if let &Opcode::Iconst = pattern10_0 { let pattern12_0 = C::u64_from_imm64(ctx, pattern10_1); if let Some(pattern13_0) = C::imm12_from_u64(ctx, pattern12_0) @@ -5424,10 +5413,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern10_0 { + match pattern10_0 { &Opcode::Imul => { let (pattern12_0, pattern12_1) = - C::unpack_value_array_2(ctx, &pattern10_1); + C::unpack_value_array_2(ctx, pattern10_1); // Rule at src/isa/aarch64/lower.isle line 67. let expr0_0 = C::put_in_reg(ctx, pattern12_0); let expr1_0 = C::put_in_reg(ctx, pattern12_1); @@ -5440,7 +5429,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern12_0, pattern12_1) = - C::unpack_value_array_2(ctx, &pattern10_1); + C::unpack_value_array_2(ctx, pattern10_1); if let Some(pattern13_0) = C::def_inst(ctx, pattern12_1) { @@ -5451,7 +5440,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); match &pattern9_0 { @@ -5520,7 +5508,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern10_0 { + if let &Opcode::Iconst = pattern10_0 { let pattern12_0 = C::u64_from_imm64(ctx, pattern10_1); if let Some(pattern13_0) = C::imm12_from_u64(ctx, pattern12_0) @@ -5556,9 +5544,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Ishl = &pattern10_0 { + if let &Opcode::Ishl = pattern10_0 { let (pattern12_0, pattern12_1) = - C::unpack_value_array_2(ctx, &pattern10_1); + C::unpack_value_array_2(ctx, pattern10_1); if let Some(pattern13_0) = C::def_inst(ctx, pattern12_1) { let pattern14_0 = C::inst_data(ctx, pattern13_0); @@ -5567,7 +5555,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 181. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5634,8 +5621,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 393. let expr0_0: Type = I64; let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; @@ -5645,8 +5631,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5654,7 +5639,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 469. let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_nonzero_in_reg_zext64(ctx, pattern7_1)?; @@ -5697,8 +5681,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 478. let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_nonzero_in_reg_sext64(ctx, pattern7_1)?; @@ -5715,7 +5698,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { // Rule at src/isa/aarch64/lower.isle line 171. let expr0_0 = C::zero_reg(ctx); @@ -5732,9 +5715,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::UaddSat => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 150. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5893,8 +5875,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 155. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5904,8 +5885,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 160. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5915,8 +5895,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 165. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5926,8 +5905,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 614. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5937,8 +5915,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 627. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5948,8 +5925,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 640. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5959,8 +5935,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/aarch64/lower.isle line 653. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -5970,9 +5945,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 717. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 718. let expr0_0 = constructor_vector_size(ctx, pattern3_0)?; let expr1_0 = C::put_in_reg(ctx, pattern7_1); let expr2_0 = constructor_vec_dup(ctx, expr1_0, &expr0_0)?; @@ -5982,9 +5956,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 779. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 780. let expr0_0 = constructor_vector_size(ctx, pattern3_0)?; let expr1_0: Type = I32; let expr2_0 = C::zero_reg(ctx); @@ -5997,9 +5970,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/aarch64/lower.isle line 830. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/aarch64/lower.isle line 832. let expr0_0 = constructor_vector_size(ctx, pattern3_0)?; let expr1_0: Type = I32; let expr2_0 = C::zero_reg(ctx); @@ -6018,7 +5990,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { // Rule at src/isa/aarch64/lower.isle line 175. let expr0_0 = C::put_in_reg(ctx, pattern5_1); @@ -6047,8 +6019,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Valu imm: pattern4_1, } = &pattern3_0 { - if let &Opcode::Iconst = &pattern4_0 { + if let &Opcode::Iconst = pattern4_0 { if let Some(pattern6_0) = C::nonzero_u64_from_imm64(ctx, pattern4_1) { // Rule at src/isa/aarch64/lower.isle line 403. let expr0_0 = constructor_imm(ctx, pattern1_0, pattern6_0)?; @@ -6101,7 +6073,7 @@ pub fn constructor_put_nonzero_in_reg_sext64(ctx: &mut C, arg0: Valu imm: pattern4_1, } = &pattern3_0 { - if let &Opcode::Iconst = &pattern4_0 { + if let &Opcode::Iconst = pattern4_0 { if let Some(pattern6_0) = C::nonzero_u64_from_imm64(ctx, pattern4_1) { // Rule at src/isa/aarch64/lower.isle line 451. let expr0_0 = constructor_imm(ctx, pattern1_0, pattern6_0)?; @@ -6154,8 +6126,9 @@ pub fn constructor_lower_shl128( let expr26_0 = constructor_csel(ctx, &expr24_0, expr25_0, expr5_0)?; let expr27_0 = Cond::Ne; let expr28_0 = constructor_csel(ctx, &expr27_0, expr5_0, expr18_0)?; - let expr29_0 = constructor_with_flags_2(ctx, &expr23_0, &expr26_0, &expr28_0)?; - return Some(expr29_0); + let expr29_0 = constructor_consumes_flags_concat(ctx, &expr26_0, &expr28_0)?; + let expr30_0 = constructor_with_flags(ctx, &expr23_0, &expr29_0)?; + return Some(expr30_0); } // Generated as internal constructor for term do_shift. @@ -6177,13 +6150,13 @@ pub fn constructor_do_shift( imm: pattern6_1, } = &pattern5_0 { - if let &Opcode::Iconst = &pattern6_0 { + if let &Opcode::Iconst = pattern6_0 { let closure8 = || { return Some(pattern1_0); }; if let Some(pattern8_0) = closure8() { if let Some(pattern9_0) = C::imm_shift_from_imm64(ctx, pattern6_1, pattern8_0) { - // Rule at src/isa/aarch64/lower.isle line 761. + // Rule at src/isa/aarch64/lower.isle line 762. let expr0_0 = constructor_alu_rr_imm_shift( ctx, pattern0_0, pattern1_0, pattern2_0, pattern9_0, )?; @@ -6198,7 +6171,7 @@ pub fn constructor_do_shift( if pattern1_0 == I32 { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/aarch64/lower.isle line 752. + // Rule at src/isa/aarch64/lower.isle line 753. let expr0_0: Type = I32; let expr1_0 = C::put_in_regs(ctx, pattern4_0); let expr2_0: usize = 0; @@ -6209,7 +6182,7 @@ pub fn constructor_do_shift( if pattern1_0 == I64 { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/aarch64/lower.isle line 753. + // Rule at src/isa/aarch64/lower.isle line 754. let expr0_0: Type = I64; let expr1_0 = C::put_in_regs(ctx, pattern4_0); let expr2_0: usize = 0; @@ -6220,7 +6193,7 @@ pub fn constructor_do_shift( if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/aarch64/lower.isle line 741. + // Rule at src/isa/aarch64/lower.isle line 742. let expr0_0 = C::put_in_regs(ctx, pattern4_0); let expr1_0: usize = 0; let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); @@ -6242,7 +6215,7 @@ pub fn constructor_lower_ushr128( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/lower.isle line 796. + // Rule at src/isa/aarch64/lower.isle line 797. let expr0_0: usize = 0; let expr1_0 = C::value_regs_get(ctx, pattern0_0, expr0_0); let expr2_0: usize = 1; @@ -6272,8 +6245,9 @@ pub fn constructor_lower_ushr128( let expr26_0 = Cond::Ne; let expr27_0 = C::zero_reg(ctx); let expr28_0 = constructor_csel(ctx, &expr26_0, expr27_0, expr7_0)?; - let expr29_0 = constructor_with_flags_2(ctx, &expr23_0, &expr25_0, &expr28_0)?; - return Some(expr29_0); + let expr29_0 = constructor_consumes_flags_concat(ctx, &expr25_0, &expr28_0)?; + let expr30_0 = constructor_with_flags(ctx, &expr23_0, &expr29_0)?; + return Some(expr30_0); } // Generated as internal constructor for term lower_sshr128. @@ -6284,7 +6258,7 @@ pub fn constructor_lower_sshr128( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/aarch64/lower.isle line 848. + // Rule at src/isa/aarch64/lower.isle line 850. let expr0_0: usize = 0; let expr1_0 = C::value_regs_get(ctx, pattern0_0, expr0_0); let expr2_0: usize = 1; @@ -6317,8 +6291,9 @@ pub fn constructor_lower_sshr128( let expr29_0 = constructor_csel(ctx, &expr28_0, expr7_0, expr22_0)?; let expr30_0 = Cond::Ne; let expr31_0 = constructor_csel(ctx, &expr30_0, expr20_0, expr7_0)?; - let expr32_0 = constructor_with_flags_2(ctx, &expr27_0, &expr29_0, &expr31_0)?; - return Some(expr32_0); + let expr32_0 = constructor_consumes_flags_concat(ctx, &expr29_0, &expr31_0)?; + let expr33_0 = constructor_with_flags(ctx, &expr27_0, &expr32_0)?; + return Some(expr33_0); } // Generated as internal constructor for term small_rotr. @@ -6331,7 +6306,7 @@ pub fn constructor_small_rotr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/lower.isle line 960. + // Rule at src/isa/aarch64/lower.isle line 963. let expr0_0: Type = I32; let expr1_0 = C::rotr_mask(ctx, pattern0_0); let expr2_0 = constructor_and_imm(ctx, expr0_0, pattern2_0, expr1_0)?; @@ -6361,7 +6336,7 @@ pub fn constructor_small_rotr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/aarch64/lower.isle line 983. + // Rule at src/isa/aarch64/lower.isle line 986. let expr0_0: Type = I32; let expr1_0 = constructor_lsr_imm(ctx, expr0_0, pattern1_0, pattern2_0)?; let expr2_0: Type = I32; @@ -6375,7 +6350,7 @@ pub fn constructor_small_rotr_imm( // Generated as internal constructor for term lower_clz128. pub fn constructor_lower_clz128(ctx: &mut C, arg0: ValueRegs) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/aarch64/lower.isle line 1059. + // Rule at src/isa/aarch64/lower.isle line 1062. let expr0_0: usize = 1; let expr1_0 = C::value_regs_get(ctx, pattern0_0, expr0_0); let expr2_0 = constructor_clz64(ctx, expr1_0)?; diff --git a/cranelift/codegen/src/isa/s390x/inst.isle b/cranelift/codegen/src/isa/s390x/inst.isle index becf1452e5..d072de0d9c 100644 --- a/cranelift/codegen/src/isa/s390x/inst.isle +++ b/cranelift/codegen/src/isa/s390x/inst.isle @@ -1427,9 +1427,8 @@ ;; Helper for emitting `MInst.RxSBGTest` instructions. (decl rxsbg_test (RxSBGOp Reg Reg u8 u8 i8) ProducesFlags) (rule (rxsbg_test op src1 src2 start_bit end_bit rotate_amt) - (ProducesFlags.ProducesFlags (MInst.RxSBGTest op src1 src2 - start_bit end_bit rotate_amt) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect + (MInst.RxSBGTest op src1 src2 start_bit end_bit rotate_amt))) ;; Helper for emitting `MInst.UnaryRR` instructions. (decl unary_rr (Type UnaryOp Reg) Reg) @@ -1441,32 +1440,27 @@ ;; Helper for emitting `MInst.CmpRR` instructions. (decl cmp_rr (CmpOp Reg Reg) ProducesFlags) (rule (cmp_rr op src1 src2) - (ProducesFlags.ProducesFlags (MInst.CmpRR op src1 src2) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.CmpRR op src1 src2))) ;; Helper for emitting `MInst.CmpRX` instructions. (decl cmp_rx (CmpOp Reg MemArg) ProducesFlags) (rule (cmp_rx op src mem) - (ProducesFlags.ProducesFlags (MInst.CmpRX op src mem) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.CmpRX op src mem))) ;; Helper for emitting `MInst.CmpRSImm16` instructions. (decl cmp_rsimm16 (CmpOp Reg i16) ProducesFlags) (rule (cmp_rsimm16 op src imm) - (ProducesFlags.ProducesFlags (MInst.CmpRSImm16 op src imm) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.CmpRSImm16 op src imm))) ;; Helper for emitting `MInst.CmpRSImm32` instructions. (decl cmp_rsimm32 (CmpOp Reg i32) ProducesFlags) (rule (cmp_rsimm32 op src imm) - (ProducesFlags.ProducesFlags (MInst.CmpRSImm32 op src imm) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.CmpRSImm32 op src imm))) ;; Helper for emitting `MInst.CmpRUImm32` instructions. (decl cmp_ruimm32 (CmpOp Reg u32) ProducesFlags) (rule (cmp_ruimm32 op src imm) - (ProducesFlags.ProducesFlags (MInst.CmpRUImm32 op src imm) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.CmpRUImm32 op src imm))) ;; Helper for emitting `MInst.AtomicRmw` instructions. (decl atomic_rmw_impl (Type ALUOp Reg MemArg) Reg) @@ -1615,21 +1609,19 @@ ;; Helper for emitting `MInst.FpuCmp32` instructions. (decl fpu_cmp32 (Reg Reg) ProducesFlags) (rule (fpu_cmp32 src1 src2) - (ProducesFlags.ProducesFlags (MInst.FpuCmp32 src1 src2) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.FpuCmp32 src1 src2))) ;; Helper for emitting `MInst.FpuCmp64` instructions. (decl fpu_cmp64 (Reg Reg) ProducesFlags) (rule (fpu_cmp64 src1 src2) - (ProducesFlags.ProducesFlags (MInst.FpuCmp64 src1 src2) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect (MInst.FpuCmp64 src1 src2))) ;; Helper for emitting `MInst.FpuToInt` instructions. (decl fpu_to_int (Type FpuToIntOp Reg) ProducesFlags) (rule (fpu_to_int ty op src) (let ((dst WritableReg (temp_writable_reg ty))) - (ProducesFlags.ProducesFlags (MInst.FpuToInt op dst src) - (writable_reg_to_reg dst)))) + (ProducesFlags.ProducesFlagsReturnsReg (MInst.FpuToInt op dst src) + (writable_reg_to_reg dst)))) ;; Helper for emitting `MInst.IntToFpu` instructions. (decl int_to_fpu (Type IntToFpuOp Reg) Reg) @@ -1751,7 +1743,7 @@ ;; Emit a `ProducesFlags` instruction when the flags are not actually needed. (decl drop_flags (ProducesFlags) Reg) -(rule (drop_flags (ProducesFlags.ProducesFlags inst result)) +(rule (drop_flags (ProducesFlags.ProducesFlagsReturnsReg inst result)) (let ((_ Unit (emit inst))) result)) @@ -1834,10 +1826,10 @@ ;; Push instructions to break out of the loop if condition is met. (decl push_break_if (VecMInstBuilder ProducesFlags Cond) Reg) -(rule (push_break_if ib (ProducesFlags.ProducesFlags inst result) cond) +(rule (push_break_if ib (ProducesFlags.ProducesFlagsSideEffect inst) cond) (let ((_1 Unit (inst_builder_push ib inst)) (_2 Unit (inst_builder_push ib (MInst.CondBreak cond)))) - result)) + (invalid_reg))) ;; Emit a `MInst.Loop` instruction holding a loop body instruction sequence. (decl emit_loop (VecMInstBuilder Cond) Unit) @@ -2215,11 +2207,11 @@ ;; Conditionally move immediate value into destination register. (Non-SSA form.) (decl emit_cmov_imm (Type WritableReg Cond i16) ConsumesFlags) (rule (emit_cmov_imm (gpr32_ty _ty) dst cond imm) - (ConsumesFlags.ConsumesFlags (MInst.CMov32SImm16 dst cond imm) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov32SImm16 dst cond imm) + (writable_reg_to_reg dst))) (rule (emit_cmov_imm (gpr64_ty _ty) dst cond imm) - (ConsumesFlags.ConsumesFlags (MInst.CMov64SImm16 dst cond imm) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov64SImm16 dst cond imm) + (writable_reg_to_reg dst))) ;; Conditionally select between immediate and source register. (decl cmov_imm (Type Cond i16 Reg) ConsumesFlags) @@ -2233,7 +2225,7 @@ (rule (cmov_imm_regpair_lo ty producer cond imm src) (let ((dst WritableRegPair (copy_writable_regpair src)) (consumer ConsumesFlags (emit_cmov_imm ty (writable_regpair_lo dst) cond imm)) - (_ Reg (with_flags_1 producer consumer))) + (_ Reg (with_flags_reg producer consumer))) (writable_regpair_to_regpair dst))) ;; Conditionally modify the high word of a register pair. @@ -2242,23 +2234,23 @@ (rule (cmov_imm_regpair_hi ty producer cond imm src) (let ((dst WritableRegPair (copy_writable_regpair src)) (consumer ConsumesFlags (emit_cmov_imm ty (writable_regpair_hi dst) cond imm)) - (_ Reg (with_flags_1 producer consumer))) + (_ Reg (with_flags_reg producer consumer))) (writable_regpair_to_regpair dst))) ;; Conditionally select between two source registers. (Non-SSA form.) (decl emit_cmov_reg (Type WritableReg Cond Reg) ConsumesFlags) (rule (emit_cmov_reg (gpr32_ty _ty) dst cond src) - (ConsumesFlags.ConsumesFlags (MInst.CMov32 dst cond src) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov32 dst cond src) + (writable_reg_to_reg dst))) (rule (emit_cmov_reg (gpr64_ty _ty) dst cond src) - (ConsumesFlags.ConsumesFlags (MInst.CMov64 dst cond src) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov64 dst cond src) + (writable_reg_to_reg dst))) (rule (emit_cmov_reg $F32 dst cond src) - (ConsumesFlags.ConsumesFlags (MInst.FpuCMov32 dst cond src) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.FpuCMov32 dst cond src) + (writable_reg_to_reg dst))) (rule (emit_cmov_reg $F64 dst cond src) - (ConsumesFlags.ConsumesFlags (MInst.FpuCMov64 dst cond src) - (writable_reg_to_reg dst))) + (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.FpuCMov64 dst cond src) + (writable_reg_to_reg dst))) ;; Conditionally select between two source registers. (decl cmov_reg (Type Cond Reg Reg) ConsumesFlags) @@ -2270,10 +2262,14 @@ ;; Helpers for generating conditional traps ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (decl trap_if (ProducesFlags Cond TrapCode) Reg) -(rule (trap_if (ProducesFlags.ProducesFlags inst result) cond trap_code) +(rule (trap_if (ProducesFlags.ProducesFlagsReturnsReg inst result) cond trap_code) (let ((_1 Unit (emit inst)) (_2 Unit (emit (MInst.TrapIf cond trap_code)))) result)) +(rule (trap_if (ProducesFlags.ProducesFlagsSideEffect inst) cond trap_code) + (let ((_1 Unit (emit inst)) + (_2 Unit (emit (MInst.TrapIf cond trap_code)))) + (invalid_reg))) (decl icmps_reg_and_trap (Type Reg Reg Cond TrapCode) Reg) (rule (icmps_reg_and_trap ty src1 src2 cond trap_code) @@ -2332,9 +2328,9 @@ ;; instruction in between the producer and consumer. (This use is only valid ;; if that unrelated instruction does not modify the condition code.) (decl emit_producer (ProducesFlags) Unit) -(rule (emit_producer (ProducesFlags.ProducesFlags insn _)) (emit insn)) +(rule (emit_producer (ProducesFlags.ProducesFlagsSideEffect insn)) (emit insn)) (decl emit_consumer (ConsumesFlags) Unit) -(rule (emit_consumer (ConsumesFlags.ConsumesFlags insn _)) (emit insn)) +(rule (emit_consumer (ConsumesFlags.ConsumesFlagsReturnsReg insn _)) (emit insn)) ;; Use a boolean condition to select between two registers. (decl select_bool_reg (Type ProducesBool Reg Reg) Reg) diff --git a/cranelift/codegen/src/isa/s390x/lower.isle b/cranelift/codegen/src/isa/s390x/lower.isle index a8f77e5930..dd316563eb 100644 --- a/cranelift/codegen/src/isa/s390x/lower.isle +++ b/cranelift/codegen/src/isa/s390x/lower.isle @@ -1102,9 +1102,9 @@ ;; result expected by Cranelift semantics. The only exception ;; it the case where the input was a NaN. We explicitly check ;; for that and force the output to 0 in that case. - (sat Reg (with_flags_1 (fcmp_reg src_ty src src) - (cmov_imm dst_ty - (floatcc_as_cond (FloatCC.Unordered)) 0 dst)))) + (sat Reg (with_flags_reg (fcmp_reg src_ty src src) + (cmov_imm dst_ty + (floatcc_as_cond (FloatCC.Unordered)) 0 dst)))) (value_reg sat))) @@ -1119,9 +1119,9 @@ ;; result expected by Cranelift semantics. The only exception ;; it the case where the input was a NaN. We explicitly check ;; for that and force the output to 0 in that case. - (sat Reg (with_flags_1 (fcmp_reg src_ty src src) - (cmov_imm dst_ty - (floatcc_as_cond (FloatCC.Unordered)) 0 dst)))) + (sat Reg (with_flags_reg (fcmp_reg src_ty src src) + (cmov_imm dst_ty + (floatcc_as_cond (FloatCC.Unordered)) 0 dst)))) (value_reg sat))) diff --git a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest index 06fd15c352..a68590a950 100644 --- a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest +++ b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest @@ -1,4 +1,4 @@ src/clif.isle 9ea75a6f790b5c03 -src/prelude.isle 73285cd431346d53 -src/isa/s390x/inst.isle 87a2d7c0c69d0324 -src/isa/s390x/lower.isle 3c124e26bc411983 +src/prelude.isle 980b300b3ec3e338 +src/isa/s390x/inst.isle b0f53fcf0cdadde1 +src/isa/s390x/lower.isle 59264a7442cf6e1c diff --git a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs index 419589ab6e..e4050fcc9a 100644 --- a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs @@ -142,16 +142,30 @@ pub enum SideEffectNoResult { Inst { inst: MInst }, } -/// Internal type ProducesFlags: defined at src/prelude.isle line 327. +/// Internal type ProducesFlags: defined at src/prelude.isle line 330. #[derive(Clone, Debug)] pub enum ProducesFlags { - ProducesFlags { inst: MInst, result: Reg }, + ProducesFlagsSideEffect { inst: MInst }, + ProducesFlagsReturnsReg { inst: MInst, result: Reg }, + ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, } -/// Internal type ConsumesFlags: defined at src/prelude.isle line 330. +/// Internal type ConsumesFlags: defined at src/prelude.isle line 341. #[derive(Clone, Debug)] pub enum ConsumesFlags { - ConsumesFlags { inst: MInst, result: Reg }, + ConsumesFlagsReturnsResultWithProducer { + inst: MInst, + result: Reg, + }, + ConsumesFlagsReturnsReg { + inst: MInst, + result: Reg, + }, + ConsumesFlagsTwiceReturnsValueRegs { + inst1: MInst, + inst2: MInst, + result: ValueRegs, + }, } /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. @@ -866,7 +880,7 @@ pub enum RegPair { RegPair { hi: Reg, lo: Reg }, } -/// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2320. +/// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. #[derive(Clone, Debug)] pub enum ProducesBool { ProducesBool { producer: ProducesFlags, cond: Cond }, @@ -902,7 +916,7 @@ pub fn constructor_value_regs_none( } = pattern0_0 { // Rule at src/prelude.isle line 313. - let expr0_0 = C::emit(ctx, &pattern1_0); + let expr0_0 = C::emit(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } @@ -920,13 +934,44 @@ pub fn constructor_safepoint( } = pattern0_0 { // Rule at src/prelude.isle line 319. - let expr0_0 = C::emit_safepoint(ctx, &pattern1_0); + let expr0_0 = C::emit_safepoint(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } return None; } +// Generated as internal constructor for term consumes_flags_concat. +pub fn constructor_consumes_flags_concat( + ctx: &mut C, + arg0: &ConsumesFlags, + arg1: &ConsumesFlags, +) -> Option { + let pattern0_0 = arg0; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern1_0, + result: pattern1_1, + } = pattern0_0 + { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 353. + let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: pattern1_0.clone(), + inst2: pattern3_0.clone(), + result: expr0_0, + }; + return Some(expr1_0); + } + } + return None; +} + // Generated as internal constructor for term with_flags. pub fn constructor_with_flags( ctx: &mut C, @@ -934,89 +979,71 @@ pub fn constructor_with_flags( arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 340. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); - return Some(expr2_0); + match pattern0_0 { + &ProducesFlags::ProducesFlagsSideEffect { + inst: ref pattern1_0, + } => { + let pattern2_0 = arg1; + match pattern2_0 { + &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } => { + // Rule at src/prelude.isle line 378. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_reg(ctx, pattern3_1); + return Some(expr2_0); + } + &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: ref pattern3_0, + inst2: ref pattern3_1, + result: pattern3_2, + } => { + // Rule at src/prelude.isle line 384. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_1); + let expr2_0 = C::emit(ctx, pattern3_0); + return Some(pattern3_2); + } + _ => {} + } } + &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { + inst: ref pattern1_0, + result: pattern1_1, + } => { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 372. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + return Some(expr2_0); + } + } + _ => {} } return None; } -// Generated as internal constructor for term with_flags_1. -pub fn constructor_with_flags_1( +// Generated as internal constructor for term with_flags_reg. +pub fn constructor_with_flags_reg( ctx: &mut C, arg0: &ProducesFlags, arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 348. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - return Some(pattern3_1); - } - } - return None; -} - -// Generated as internal constructor for term with_flags_2. -pub fn constructor_with_flags_2( - ctx: &mut C, - arg0: &ProducesFlags, - arg1: &ConsumesFlags, - arg2: &ConsumesFlags, -) -> Option { - let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - let pattern4_0 = arg2; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern5_0, - result: pattern5_1, - } = pattern4_0 - { - // Rule at src/prelude.isle line 358. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern5_0); - let expr2_0 = C::emit(ctx, &pattern3_0); - let expr3_0 = C::value_regs(ctx, pattern3_1, pattern5_1); - return Some(expr3_0); - } - } - } - return None; + let pattern1_0 = arg1; + // Rule at src/prelude.isle line 397. + let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; + let expr1_0: usize = 0; + let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); + return Some(expr2_0); } // Generated as internal constructor for term mask_amt_reg. @@ -1057,7 +1084,7 @@ pub fn constructor_lower_address( opcode: ref pattern4_0, global_value: pattern4_1, } => { - if let &Opcode::SymbolValue = &pattern4_0 { + if let &Opcode::SymbolValue = pattern4_0 { if let Some((pattern6_0, pattern6_1, pattern6_2)) = C::symbol_value_data(ctx, pattern4_1) { @@ -1085,8 +1112,8 @@ pub fn constructor_lower_address( opcode: ref pattern4_0, args: ref pattern4_1, } => { - if let &Opcode::Iadd = &pattern4_0 { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + if let &Opcode::Iadd = pattern4_0 { + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); let pattern7_0 = arg2; let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); if pattern8_0 == 0 { @@ -1138,7 +1165,7 @@ pub fn constructor_sink_load(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option( end_bit: pattern4_0, rotate_amt: pattern5_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term unary_rr. @@ -1736,7 +1759,7 @@ pub fn constructor_unary_rr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1436. + // Rule at src/isa/s390x/inst.isle line 1435. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::UnaryRR { op: pattern1_0.clone(), @@ -1758,18 +1781,14 @@ pub fn constructor_cmp_rr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1443. + // Rule at src/isa/s390x/inst.isle line 1442. let expr0_0 = MInst::CmpRR { op: pattern0_0.clone(), rn: pattern1_0, rm: pattern2_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term cmp_rx. @@ -1782,18 +1801,14 @@ pub fn constructor_cmp_rx( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1449. + // Rule at src/isa/s390x/inst.isle line 1447. let expr0_0 = MInst::CmpRX { op: pattern0_0.clone(), rn: pattern1_0, mem: pattern2_0.clone(), }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term cmp_rsimm16. @@ -1806,18 +1821,14 @@ pub fn constructor_cmp_rsimm16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1455. + // Rule at src/isa/s390x/inst.isle line 1452. let expr0_0 = MInst::CmpRSImm16 { op: pattern0_0.clone(), rn: pattern1_0, imm: pattern2_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term cmp_rsimm32. @@ -1830,18 +1841,14 @@ pub fn constructor_cmp_rsimm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1461. + // Rule at src/isa/s390x/inst.isle line 1457. let expr0_0 = MInst::CmpRSImm32 { op: pattern0_0.clone(), rn: pattern1_0, imm: pattern2_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term cmp_ruimm32. @@ -1854,18 +1861,14 @@ pub fn constructor_cmp_ruimm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1467. + // Rule at src/isa/s390x/inst.isle line 1462. let expr0_0 = MInst::CmpRUImm32 { op: pattern0_0.clone(), rn: pattern1_0, imm: pattern2_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term atomic_rmw_impl. @@ -1880,7 +1883,7 @@ pub fn constructor_atomic_rmw_impl( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1473. + // Rule at src/isa/s390x/inst.isle line 1467. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::AtomicRmw { alu_op: pattern1_0.clone(), @@ -1903,7 +1906,7 @@ pub fn constructor_atomic_cas32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1480. + // Rule at src/isa/s390x/inst.isle line 1474. let expr0_0: Type = I32; let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; let expr2_0 = MInst::AtomicCas32 { @@ -1926,7 +1929,7 @@ pub fn constructor_atomic_cas64( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1487. + // Rule at src/isa/s390x/inst.isle line 1481. let expr0_0: Type = I64; let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; let expr2_0 = MInst::AtomicCas64 { @@ -1941,7 +1944,7 @@ pub fn constructor_atomic_cas64( // Generated as internal constructor for term fence_impl. pub fn constructor_fence_impl(ctx: &mut C) -> Option { - // Rule at src/isa/s390x/inst.isle line 1494. + // Rule at src/isa/s390x/inst.isle line 1488. let expr0_0 = MInst::Fence; let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; return Some(expr1_0); @@ -1950,7 +1953,7 @@ pub fn constructor_fence_impl(ctx: &mut C) -> Option(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1499. + // Rule at src/isa/s390x/inst.isle line 1493. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::Load32 { @@ -1965,7 +1968,7 @@ pub fn constructor_load32(ctx: &mut C, arg0: &MemArg) -> Option // Generated as internal constructor for term load64. pub fn constructor_load64(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1506. + // Rule at src/isa/s390x/inst.isle line 1500. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::Load64 { @@ -1980,7 +1983,7 @@ pub fn constructor_load64(ctx: &mut C, arg0: &MemArg) -> Option // Generated as internal constructor for term loadrev16. pub fn constructor_loadrev16(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1513. + // Rule at src/isa/s390x/inst.isle line 1507. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::LoadRev16 { @@ -1995,7 +1998,7 @@ pub fn constructor_loadrev16(ctx: &mut C, arg0: &MemArg) -> Option(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1520. + // Rule at src/isa/s390x/inst.isle line 1514. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::LoadRev32 { @@ -2010,7 +2013,7 @@ pub fn constructor_loadrev32(ctx: &mut C, arg0: &MemArg) -> Option(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1527. + // Rule at src/isa/s390x/inst.isle line 1521. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::LoadRev64 { @@ -2030,7 +2033,7 @@ pub fn constructor_store8( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1534. + // Rule at src/isa/s390x/inst.isle line 1528. let expr0_0 = MInst::Store8 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2047,7 +2050,7 @@ pub fn constructor_store16( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1539. + // Rule at src/isa/s390x/inst.isle line 1533. let expr0_0 = MInst::Store16 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2064,7 +2067,7 @@ pub fn constructor_store32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1544. + // Rule at src/isa/s390x/inst.isle line 1538. let expr0_0 = MInst::Store32 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2081,7 +2084,7 @@ pub fn constructor_store64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1549. + // Rule at src/isa/s390x/inst.isle line 1543. let expr0_0 = MInst::Store64 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2098,7 +2101,7 @@ pub fn constructor_store8_imm( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1554. + // Rule at src/isa/s390x/inst.isle line 1548. let expr0_0 = MInst::StoreImm8 { imm: pattern0_0, mem: pattern1_0.clone(), @@ -2115,7 +2118,7 @@ pub fn constructor_store16_imm( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1559. + // Rule at src/isa/s390x/inst.isle line 1553. let expr0_0 = MInst::StoreImm16 { imm: pattern0_0, mem: pattern1_0.clone(), @@ -2132,7 +2135,7 @@ pub fn constructor_store32_simm16( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1564. + // Rule at src/isa/s390x/inst.isle line 1558. let expr0_0 = MInst::StoreImm32SExt16 { imm: pattern0_0, mem: pattern1_0.clone(), @@ -2149,7 +2152,7 @@ pub fn constructor_store64_simm16( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1569. + // Rule at src/isa/s390x/inst.isle line 1563. let expr0_0 = MInst::StoreImm64SExt16 { imm: pattern0_0, mem: pattern1_0.clone(), @@ -2166,7 +2169,7 @@ pub fn constructor_storerev16( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1574. + // Rule at src/isa/s390x/inst.isle line 1568. let expr0_0 = MInst::StoreRev16 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2183,7 +2186,7 @@ pub fn constructor_storerev32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1579. + // Rule at src/isa/s390x/inst.isle line 1573. let expr0_0 = MInst::StoreRev32 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2200,7 +2203,7 @@ pub fn constructor_storerev64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1584. + // Rule at src/isa/s390x/inst.isle line 1578. let expr0_0 = MInst::StoreRev64 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2219,7 +2222,7 @@ pub fn constructor_fpu_rr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1589. + // Rule at src/isa/s390x/inst.isle line 1583. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::FpuRR { fpu_op: pattern1_0.clone(), @@ -2243,7 +2246,7 @@ pub fn constructor_fpu_rrr( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1596. + // Rule at src/isa/s390x/inst.isle line 1590. let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; let expr1_0 = MInst::FpuRRR { fpu_op: pattern1_0.clone(), @@ -2269,7 +2272,7 @@ pub fn constructor_fpu_rrrr( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 1603. + // Rule at src/isa/s390x/inst.isle line 1597. let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; let expr1_0 = MInst::FpuRRRR { fpu_op: pattern1_0.clone(), @@ -2292,7 +2295,7 @@ pub fn constructor_fpu_copysign( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1610. + // Rule at src/isa/s390x/inst.isle line 1604. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::FpuCopysign { rd: expr0_0, @@ -2312,17 +2315,13 @@ pub fn constructor_fpu_cmp32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1617. + // Rule at src/isa/s390x/inst.isle line 1611. let expr0_0 = MInst::FpuCmp32 { rn: pattern0_0, rm: pattern1_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term fpu_cmp64. @@ -2333,17 +2332,13 @@ pub fn constructor_fpu_cmp64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1623. + // Rule at src/isa/s390x/inst.isle line 1616. let expr0_0 = MInst::FpuCmp64 { rn: pattern0_0, rm: pattern1_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term fpu_to_int. @@ -2356,7 +2351,7 @@ pub fn constructor_fpu_to_int( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1629. + // Rule at src/isa/s390x/inst.isle line 1621. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::FpuToInt { op: pattern1_0.clone(), @@ -2364,7 +2359,7 @@ pub fn constructor_fpu_to_int( rn: pattern2_0, }; let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); - let expr3_0 = ProducesFlags::ProducesFlags { + let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { inst: expr1_0, result: expr2_0, }; @@ -2381,7 +2376,7 @@ pub fn constructor_int_to_fpu( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1636. + // Rule at src/isa/s390x/inst.isle line 1628. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::IntToFpu { op: pattern1_0.clone(), @@ -2403,7 +2398,7 @@ pub fn constructor_fpu_round( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1643. + // Rule at src/isa/s390x/inst.isle line 1635. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::FpuRound { op: pattern1_0.clone(), @@ -2427,7 +2422,7 @@ pub fn constructor_fpuvec_rrr( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1650. + // Rule at src/isa/s390x/inst.isle line 1642. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = MInst::FpuVecRRR { fpu_op: pattern1_0.clone(), @@ -2443,7 +2438,7 @@ pub fn constructor_fpuvec_rrr( // Generated as internal constructor for term mov_to_fpr. pub fn constructor_mov_to_fpr(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1657. + // Rule at src/isa/s390x/inst.isle line 1649. let expr0_0: Type = F64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::MovToFpr { @@ -2458,7 +2453,7 @@ pub fn constructor_mov_to_fpr(ctx: &mut C, arg0: Reg) -> Option // Generated as internal constructor for term mov_from_fpr. pub fn constructor_mov_from_fpr(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1664. + // Rule at src/isa/s390x/inst.isle line 1656. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::MovFromFpr { @@ -2473,7 +2468,7 @@ pub fn constructor_mov_from_fpr(ctx: &mut C, arg0: Reg) -> Option(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1671. + // Rule at src/isa/s390x/inst.isle line 1663. let expr0_0: Type = F32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuLoad32 { @@ -2488,7 +2483,7 @@ pub fn constructor_fpu_load32(ctx: &mut C, arg0: &MemArg) -> Option< // Generated as internal constructor for term fpu_load64. pub fn constructor_fpu_load64(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1678. + // Rule at src/isa/s390x/inst.isle line 1670. let expr0_0: Type = F64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuLoad64 { @@ -2503,7 +2498,7 @@ pub fn constructor_fpu_load64(ctx: &mut C, arg0: &MemArg) -> Option< // Generated as internal constructor for term fpu_loadrev32. pub fn constructor_fpu_loadrev32(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1685. + // Rule at src/isa/s390x/inst.isle line 1677. let expr0_0: Type = F32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuLoadRev32 { @@ -2518,7 +2513,7 @@ pub fn constructor_fpu_loadrev32(ctx: &mut C, arg0: &MemArg) -> Opti // Generated as internal constructor for term fpu_loadrev64. pub fn constructor_fpu_loadrev64(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1692. + // Rule at src/isa/s390x/inst.isle line 1684. let expr0_0: Type = F64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::FpuLoadRev64 { @@ -2538,7 +2533,7 @@ pub fn constructor_fpu_store32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1699. + // Rule at src/isa/s390x/inst.isle line 1691. let expr0_0 = MInst::FpuStore32 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2555,7 +2550,7 @@ pub fn constructor_fpu_store64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1704. + // Rule at src/isa/s390x/inst.isle line 1696. let expr0_0 = MInst::FpuStore64 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2572,7 +2567,7 @@ pub fn constructor_fpu_storerev32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1709. + // Rule at src/isa/s390x/inst.isle line 1701. let expr0_0 = MInst::FpuStoreRev32 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2589,7 +2584,7 @@ pub fn constructor_fpu_storerev64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1714. + // Rule at src/isa/s390x/inst.isle line 1706. let expr0_0 = MInst::FpuStoreRev64 { rd: pattern0_0, mem: pattern1_0.clone(), @@ -2606,7 +2601,7 @@ pub fn constructor_load_ext_name_far( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1719. + // Rule at src/isa/s390x/inst.isle line 1711. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = C::box_external_name(ctx, pattern0_0); @@ -2623,7 +2618,7 @@ pub fn constructor_load_ext_name_far( // Generated as internal constructor for term load_addr. pub fn constructor_load_addr(ctx: &mut C, arg0: &MemArg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1727. + // Rule at src/isa/s390x/inst.isle line 1719. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = MInst::LoadAddr { @@ -2641,7 +2636,7 @@ pub fn constructor_jump_impl( arg0: MachLabel, ) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 1734. + // Rule at src/isa/s390x/inst.isle line 1726. let expr0_0 = MInst::Jump { dest: pattern0_0 }; let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; return Some(expr1_0); @@ -2657,7 +2652,7 @@ pub fn constructor_cond_br( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1739. + // Rule at src/isa/s390x/inst.isle line 1731. let expr0_0 = MInst::CondBr { taken: pattern0_0, not_taken: pattern1_0, @@ -2675,7 +2670,7 @@ pub fn constructor_oneway_cond_br( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1744. + // Rule at src/isa/s390x/inst.isle line 1736. let expr0_0 = MInst::OneWayCondBr { target: pattern0_0, cond: pattern1_0.clone(), @@ -2692,7 +2687,7 @@ pub fn constructor_jt_sequence( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1749. + // Rule at src/isa/s390x/inst.isle line 1741. let expr0_0 = MInst::JTSequence { ridx: pattern0_0, targets: pattern1_0.clone(), @@ -2704,13 +2699,13 @@ pub fn constructor_jt_sequence( // Generated as internal constructor for term drop_flags. pub fn constructor_drop_flags(ctx: &mut C, arg0: &ProducesFlags) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { + if let &ProducesFlags::ProducesFlagsReturnsReg { inst: ref pattern1_0, result: pattern1_1, } = pattern0_0 { - // Rule at src/isa/s390x/inst.isle line 1754. - let expr0_0 = C::emit(ctx, &pattern1_0); + // Rule at src/isa/s390x/inst.isle line 1746. + let expr0_0 = C::emit(ctx, pattern1_0); return Some(pattern1_1); } return None; @@ -2731,7 +2726,7 @@ pub fn constructor_push_alu_reg( if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { let pattern4_0 = arg3; let pattern5_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 1793. + // Rule at src/isa/s390x/inst.isle line 1785. let expr0_0 = MInst::AluRRR { alu_op: pattern1_0.clone(), rd: pattern3_0, @@ -2765,7 +2760,7 @@ pub fn constructor_push_alu_uimm32shifted( if let Some(pattern5_0) = closure5() { if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { let pattern7_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 1799. + // Rule at src/isa/s390x/inst.isle line 1791. let expr0_0 = MInst::AluRUImm32Shifted { alu_op: pattern1_0.clone(), rd: pattern3_0, @@ -2797,7 +2792,7 @@ pub fn constructor_push_shift( let pattern4_0 = arg3; let pattern5_0 = arg4; let pattern6_0 = arg5; - // Rule at src/isa/s390x/inst.isle line 1805. + // Rule at src/isa/s390x/inst.isle line 1797. let expr0_0 = MInst::ShiftRR { shift_op: pattern1_0.clone(), rd: pattern3_0, @@ -2838,7 +2833,7 @@ pub fn constructor_push_rxsbg( let pattern8_0 = arg5; let pattern9_0 = arg6; let pattern10_0 = arg7; - // Rule at src/isa/s390x/inst.isle line 1812. + // Rule at src/isa/s390x/inst.isle line 1804. let expr0_0 = MInst::RxSBG { op: pattern1_0.clone(), rd: pattern3_0, @@ -2869,7 +2864,7 @@ pub fn constructor_push_unary( let pattern2_0 = arg2; if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1819. + // Rule at src/isa/s390x/inst.isle line 1811. let expr0_0 = MInst::UnaryRR { op: pattern1_0.clone(), rd: pattern3_0, @@ -2895,7 +2890,7 @@ pub fn constructor_push_atomic_cas32( if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1825. + // Rule at src/isa/s390x/inst.isle line 1817. let expr0_0 = MInst::AtomicCas32 { rd: pattern2_0, rn: pattern3_0, @@ -2921,7 +2916,7 @@ pub fn constructor_push_atomic_cas64( if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 1831. + // Rule at src/isa/s390x/inst.isle line 1823. let expr0_0 = MInst::AtomicCas64 { rd: pattern2_0, rn: pattern3_0, @@ -2943,19 +2938,19 @@ pub fn constructor_push_break_if( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - if let &ProducesFlags::ProducesFlags { + if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref pattern2_0, - result: pattern2_1, } = pattern1_0 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1837. - let expr0_0 = C::inst_builder_push(ctx, pattern0_0, &pattern2_0); + // Rule at src/isa/s390x/inst.isle line 1829. + let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); let expr1_0 = MInst::CondBreak { cond: pattern3_0.clone(), }; let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); - return Some(pattern2_1); + let expr3_0 = C::invalid_reg(ctx); + return Some(expr3_0); } return None; } @@ -2968,7 +2963,7 @@ pub fn constructor_emit_loop( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1844. + // Rule at src/isa/s390x/inst.isle line 1836. let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); let expr1_0 = MInst::Loop { body: expr0_0, @@ -2989,7 +2984,7 @@ pub fn constructor_emit_mov( if pattern0_0 == F32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1859. + // Rule at src/isa/s390x/inst.isle line 1851. let expr0_0 = MInst::FpuMove32 { rd: pattern2_0, rn: pattern3_0, @@ -3000,7 +2995,7 @@ pub fn constructor_emit_mov( if pattern0_0 == F64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1862. + // Rule at src/isa/s390x/inst.isle line 1854. let expr0_0 = MInst::FpuMove64 { rd: pattern2_0, rn: pattern3_0, @@ -3011,7 +3006,7 @@ pub fn constructor_emit_mov( if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1853. + // Rule at src/isa/s390x/inst.isle line 1845. let expr0_0 = MInst::Mov32 { rd: pattern2_0, rm: pattern3_0, @@ -3022,7 +3017,7 @@ pub fn constructor_emit_mov( if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1856. + // Rule at src/isa/s390x/inst.isle line 1848. let expr0_0 = MInst::Mov64 { rd: pattern2_0, rm: pattern3_0, @@ -3041,7 +3036,7 @@ pub fn constructor_copy_writable_reg( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1867. + // Rule at src/isa/s390x/inst.isle line 1859. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; return Some(expr0_0); @@ -3051,7 +3046,7 @@ pub fn constructor_copy_writable_reg( pub fn constructor_copy_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1874. + // Rule at src/isa/s390x/inst.isle line 1866. let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); return Some(expr1_0); @@ -3068,7 +3063,7 @@ pub fn constructor_emit_load( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1878. + // Rule at src/isa/s390x/inst.isle line 1870. let expr0_0 = MInst::Load32 { rd: pattern2_0, mem: pattern3_0.clone(), @@ -3079,7 +3074,7 @@ pub fn constructor_emit_load( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1880. + // Rule at src/isa/s390x/inst.isle line 1872. let expr0_0 = MInst::Load64 { rd: pattern2_0, mem: pattern3_0.clone(), @@ -3101,7 +3096,7 @@ pub fn constructor_emit_imm( if pattern0_0 == F32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1936. + // Rule at src/isa/s390x/inst.isle line 1928. let expr0_0 = C::u64_as_u32(ctx, pattern3_0); let expr1_0 = MInst::LoadFpuConst32 { rd: pattern2_0, @@ -3113,7 +3108,7 @@ pub fn constructor_emit_imm( if pattern0_0 == F64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1941. + // Rule at src/isa/s390x/inst.isle line 1933. let expr0_0 = MInst::LoadFpuConst64 { rd: pattern2_0, const_data: pattern3_0, @@ -3124,7 +3119,7 @@ pub fn constructor_emit_imm( if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1890. + // Rule at src/isa/s390x/inst.isle line 1882. let expr0_0 = C::u64_as_i16(ctx, pattern3_0); let expr1_0 = MInst::Mov32SImm16 { rd: pattern2_0, @@ -3137,7 +3132,7 @@ pub fn constructor_emit_imm( let pattern2_0 = arg1; let pattern3_0 = arg2; if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1894. + // Rule at src/isa/s390x/inst.isle line 1886. let expr0_0 = MInst::Mov32SImm16 { rd: pattern2_0, imm: pattern4_0, @@ -3145,7 +3140,7 @@ pub fn constructor_emit_imm( let expr1_0 = C::emit(ctx, &expr0_0); return Some(expr1_0); } - // Rule at src/isa/s390x/inst.isle line 1898. + // Rule at src/isa/s390x/inst.isle line 1890. let expr0_0 = C::u64_as_u32(ctx, pattern3_0); let expr1_0 = MInst::Mov32Imm { rd: pattern2_0, @@ -3159,14 +3154,14 @@ pub fn constructor_emit_imm( let pattern3_0 = arg2; if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1918. + // Rule at src/isa/s390x/inst.isle line 1910. let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; return Some(expr1_0); } } if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1902. + // Rule at src/isa/s390x/inst.isle line 1894. let expr0_0 = MInst::Mov64SImm16 { rd: pattern2_0, imm: pattern4_0, @@ -3175,7 +3170,7 @@ pub fn constructor_emit_imm( return Some(expr1_0); } if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1906. + // Rule at src/isa/s390x/inst.isle line 1898. let expr0_0 = MInst::Mov64SImm32 { rd: pattern2_0, imm: pattern4_0, @@ -3184,7 +3179,7 @@ pub fn constructor_emit_imm( return Some(expr1_0); } if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1914. + // Rule at src/isa/s390x/inst.isle line 1906. let expr0_0 = MInst::Mov64UImm32Shifted { rd: pattern2_0, imm: pattern4_0, @@ -3193,7 +3188,7 @@ pub fn constructor_emit_imm( return Some(expr1_0); } if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { - // Rule at src/isa/s390x/inst.isle line 1910. + // Rule at src/isa/s390x/inst.isle line 1902. let expr0_0 = MInst::Mov64UImm16Shifted { rd: pattern2_0, imm: pattern4_0, @@ -3214,7 +3209,7 @@ pub fn constructor_emit_insert_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 1931. + // Rule at src/isa/s390x/inst.isle line 1923. let expr0_0 = MInst::Insert64UImm32Shifted { rd: pattern0_0, imm: pattern2_0, @@ -3223,7 +3218,7 @@ pub fn constructor_emit_insert_imm( return Some(expr1_0); } if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 1927. + // Rule at src/isa/s390x/inst.isle line 1919. let expr0_0 = MInst::Insert64UImm16Shifted { rd: pattern0_0, imm: pattern2_0, @@ -3238,7 +3233,7 @@ pub fn constructor_emit_insert_imm( pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 1946. + // Rule at src/isa/s390x/inst.isle line 1938. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); @@ -3255,7 +3250,7 @@ pub fn constructor_imm_regpair_lo( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1954. + // Rule at src/isa/s390x/inst.isle line 1946. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; @@ -3273,7 +3268,7 @@ pub fn constructor_imm_regpair_hi( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1962. + // Rule at src/isa/s390x/inst.isle line 1954. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; @@ -3285,22 +3280,22 @@ pub fn constructor_imm_regpair_hi( pub fn constructor_ty_ext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 1972. + // Rule at src/isa/s390x/inst.isle line 1964. let expr0_0: Type = I32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 1973. + // Rule at src/isa/s390x/inst.isle line 1965. let expr0_0: Type = I32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 1974. + // Rule at src/isa/s390x/inst.isle line 1966. let expr0_0: Type = I32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 1975. + // Rule at src/isa/s390x/inst.isle line 1967. let expr0_0: Type = I64; return Some(expr0_0); } @@ -3311,22 +3306,22 @@ pub fn constructor_ty_ext32(ctx: &mut C, arg0: Type) -> Option pub fn constructor_ty_ext64(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 1979. + // Rule at src/isa/s390x/inst.isle line 1971. let expr0_0: Type = I64; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 1980. + // Rule at src/isa/s390x/inst.isle line 1972. let expr0_0: Type = I64; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 1981. + // Rule at src/isa/s390x/inst.isle line 1973. let expr0_0: Type = I64; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 1982. + // Rule at src/isa/s390x/inst.isle line 1974. let expr0_0: Type = I64; return Some(expr0_0); } @@ -3343,7 +3338,7 @@ pub fn constructor_emit_zext32_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1987. + // Rule at src/isa/s390x/inst.isle line 1979. let expr0_0: bool = false; let expr1_0 = C::ty_bits(ctx, pattern1_0); let expr2_0: u8 = 32; @@ -3368,7 +3363,7 @@ pub fn constructor_emit_sext32_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1993. + // Rule at src/isa/s390x/inst.isle line 1985. let expr0_0: bool = true; let expr1_0 = C::ty_bits(ctx, pattern1_0); let expr2_0: u8 = 32; @@ -3393,7 +3388,7 @@ pub fn constructor_emit_zext64_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 1999. + // Rule at src/isa/s390x/inst.isle line 1991. let expr0_0: bool = false; let expr1_0 = C::ty_bits(ctx, pattern1_0); let expr2_0: u8 = 64; @@ -3418,7 +3413,7 @@ pub fn constructor_emit_sext64_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2005. + // Rule at src/isa/s390x/inst.isle line 1997. let expr0_0: bool = true; let expr1_0 = C::ty_bits(ctx, pattern1_0); let expr2_0: u8 = 64; @@ -3437,7 +3432,7 @@ pub fn constructor_emit_sext64_reg( pub fn constructor_zext32_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2011. + // Rule at src/isa/s390x/inst.isle line 2003. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3449,7 +3444,7 @@ pub fn constructor_zext32_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> pub fn constructor_sext32_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2019. + // Rule at src/isa/s390x/inst.isle line 2011. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3461,7 +3456,7 @@ pub fn constructor_sext32_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> pub fn constructor_zext64_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2027. + // Rule at src/isa/s390x/inst.isle line 2019. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3473,7 +3468,7 @@ pub fn constructor_zext64_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> pub fn constructor_sext64_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2035. + // Rule at src/isa/s390x/inst.isle line 2027. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3492,7 +3487,7 @@ pub fn constructor_emit_zext32_mem( let pattern1_0 = arg1; if pattern1_0 == I8 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2043. + // Rule at src/isa/s390x/inst.isle line 2035. let expr0_0 = MInst::Load32ZExt8 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3502,7 +3497,7 @@ pub fn constructor_emit_zext32_mem( } if pattern1_0 == I16 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2044. + // Rule at src/isa/s390x/inst.isle line 2036. let expr0_0 = MInst::Load32ZExt16 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3524,7 +3519,7 @@ pub fn constructor_emit_sext32_mem( let pattern1_0 = arg1; if pattern1_0 == I8 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2048. + // Rule at src/isa/s390x/inst.isle line 2040. let expr0_0 = MInst::Load32SExt8 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3534,7 +3529,7 @@ pub fn constructor_emit_sext32_mem( } if pattern1_0 == I16 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2049. + // Rule at src/isa/s390x/inst.isle line 2041. let expr0_0 = MInst::Load32SExt16 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3556,7 +3551,7 @@ pub fn constructor_emit_zext64_mem( let pattern1_0 = arg1; if pattern1_0 == I8 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2053. + // Rule at src/isa/s390x/inst.isle line 2045. let expr0_0 = MInst::Load64ZExt8 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3566,7 +3561,7 @@ pub fn constructor_emit_zext64_mem( } if pattern1_0 == I16 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2054. + // Rule at src/isa/s390x/inst.isle line 2046. let expr0_0 = MInst::Load64ZExt16 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3576,7 +3571,7 @@ pub fn constructor_emit_zext64_mem( } if pattern1_0 == I32 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2055. + // Rule at src/isa/s390x/inst.isle line 2047. let expr0_0 = MInst::Load64ZExt32 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3598,7 +3593,7 @@ pub fn constructor_emit_sext64_mem( let pattern1_0 = arg1; if pattern1_0 == I8 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2059. + // Rule at src/isa/s390x/inst.isle line 2051. let expr0_0 = MInst::Load64SExt8 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3608,7 +3603,7 @@ pub fn constructor_emit_sext64_mem( } if pattern1_0 == I16 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2060. + // Rule at src/isa/s390x/inst.isle line 2052. let expr0_0 = MInst::Load64SExt16 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3618,7 +3613,7 @@ pub fn constructor_emit_sext64_mem( } if pattern1_0 == I32 { let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2061. + // Rule at src/isa/s390x/inst.isle line 2053. let expr0_0 = MInst::Load64SExt32 { rd: pattern0_0, mem: pattern3_0.clone(), @@ -3633,7 +3628,7 @@ pub fn constructor_emit_sext64_mem( pub fn constructor_zext32_mem(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2065. + // Rule at src/isa/s390x/inst.isle line 2057. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3645,7 +3640,7 @@ pub fn constructor_zext32_mem(ctx: &mut C, arg0: Type, arg1: &MemArg pub fn constructor_sext32_mem(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2072. + // Rule at src/isa/s390x/inst.isle line 2064. let expr0_0: Type = I32; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3657,7 +3652,7 @@ pub fn constructor_sext32_mem(ctx: &mut C, arg0: Type, arg1: &MemArg pub fn constructor_zext64_mem(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2079. + // Rule at src/isa/s390x/inst.isle line 2071. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3669,7 +3664,7 @@ pub fn constructor_zext64_mem(ctx: &mut C, arg0: Type, arg1: &MemArg pub fn constructor_sext64_mem(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2086. + // Rule at src/isa/s390x/inst.isle line 2078. let expr0_0: Type = I64; let expr1_0 = C::temp_writable_reg(ctx, expr0_0); let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; @@ -3687,7 +3682,7 @@ pub fn constructor_emit_put_in_reg_zext32( let pattern1_0 = arg1; let pattern2_0 = C::value_type(ctx, pattern1_0); if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2094. + // Rule at src/isa/s390x/inst.isle line 2086. let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; return Some(expr1_0); @@ -3702,9 +3697,9 @@ pub fn constructor_emit_put_in_reg_zext32( offset: pattern6_3, } = &pattern5_0 { - if let &Opcode::Load = &pattern6_0 { + if let &Opcode::Load = pattern6_0 { if let Some(()) = C::bigendian(ctx, pattern6_2) { - // Rule at src/isa/s390x/inst.isle line 2096. + // Rule at src/isa/s390x/inst.isle line 2088. let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; let expr1_0 = constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; @@ -3713,13 +3708,13 @@ pub fn constructor_emit_put_in_reg_zext32( } } } - // Rule at src/isa/s390x/inst.isle line 2098. + // Rule at src/isa/s390x/inst.isle line 2090. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { - // Rule at src/isa/s390x/inst.isle line 2100. + // Rule at src/isa/s390x/inst.isle line 2092. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; return Some(expr1_0); @@ -3737,7 +3732,7 @@ pub fn constructor_emit_put_in_reg_sext32( let pattern1_0 = arg1; let pattern2_0 = C::value_type(ctx, pattern1_0); if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2105. + // Rule at src/isa/s390x/inst.isle line 2097. let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; return Some(expr1_0); @@ -3752,9 +3747,9 @@ pub fn constructor_emit_put_in_reg_sext32( offset: pattern6_3, } = &pattern5_0 { - if let &Opcode::Load = &pattern6_0 { + if let &Opcode::Load = pattern6_0 { if let Some(()) = C::bigendian(ctx, pattern6_2) { - // Rule at src/isa/s390x/inst.isle line 2107. + // Rule at src/isa/s390x/inst.isle line 2099. let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; let expr1_0 = constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; @@ -3763,13 +3758,13 @@ pub fn constructor_emit_put_in_reg_sext32( } } } - // Rule at src/isa/s390x/inst.isle line 2109. + // Rule at src/isa/s390x/inst.isle line 2101. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { - // Rule at src/isa/s390x/inst.isle line 2111. + // Rule at src/isa/s390x/inst.isle line 2103. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; return Some(expr1_0); @@ -3787,7 +3782,7 @@ pub fn constructor_emit_put_in_reg_zext64( let pattern1_0 = arg1; let pattern2_0 = C::value_type(ctx, pattern1_0); if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2116. + // Rule at src/isa/s390x/inst.isle line 2108. let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; return Some(expr1_0); @@ -3802,9 +3797,9 @@ pub fn constructor_emit_put_in_reg_zext64( offset: pattern6_3, } = &pattern5_0 { - if let &Opcode::Load = &pattern6_0 { + if let &Opcode::Load = pattern6_0 { if let Some(()) = C::bigendian(ctx, pattern6_2) { - // Rule at src/isa/s390x/inst.isle line 2118. + // Rule at src/isa/s390x/inst.isle line 2110. let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; let expr1_0 = constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; @@ -3813,13 +3808,13 @@ pub fn constructor_emit_put_in_reg_zext64( } } } - // Rule at src/isa/s390x/inst.isle line 2120. + // Rule at src/isa/s390x/inst.isle line 2112. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { - // Rule at src/isa/s390x/inst.isle line 2122. + // Rule at src/isa/s390x/inst.isle line 2114. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; return Some(expr1_0); @@ -3837,7 +3832,7 @@ pub fn constructor_emit_put_in_reg_sext64( let pattern1_0 = arg1; let pattern2_0 = C::value_type(ctx, pattern1_0); if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2127. + // Rule at src/isa/s390x/inst.isle line 2119. let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; return Some(expr1_0); @@ -3852,9 +3847,9 @@ pub fn constructor_emit_put_in_reg_sext64( offset: pattern6_3, } = &pattern5_0 { - if let &Opcode::Load = &pattern6_0 { + if let &Opcode::Load = pattern6_0 { if let Some(()) = C::bigendian(ctx, pattern6_2) { - // Rule at src/isa/s390x/inst.isle line 2129. + // Rule at src/isa/s390x/inst.isle line 2121. let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; let expr1_0 = constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; @@ -3863,13 +3858,13 @@ pub fn constructor_emit_put_in_reg_sext64( } } } - // Rule at src/isa/s390x/inst.isle line 2131. + // Rule at src/isa/s390x/inst.isle line 2123. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { - // Rule at src/isa/s390x/inst.isle line 2133. + // Rule at src/isa/s390x/inst.isle line 2125. let expr0_0 = C::put_in_reg(ctx, pattern1_0); let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; return Some(expr1_0); @@ -3882,7 +3877,7 @@ pub fn constructor_put_in_reg_zext32(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2138. + // Rule at src/isa/s390x/inst.isle line 2130. let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; return Some(expr1_0); @@ -3897,9 +3892,9 @@ pub fn constructor_put_in_reg_zext32(ctx: &mut C, arg0: Value) -> Op offset: pattern5_3, } = &pattern4_0 { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { - // Rule at src/isa/s390x/inst.isle line 2140. + // Rule at src/isa/s390x/inst.isle line 2132. let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; return Some(expr1_0); @@ -3907,13 +3902,13 @@ pub fn constructor_put_in_reg_zext32(ctx: &mut C, arg0: Value) -> Op } } } - // Rule at src/isa/s390x/inst.isle line 2142. + // Rule at src/isa/s390x/inst.isle line 2134. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2144. + // Rule at src/isa/s390x/inst.isle line 2136. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } @@ -3925,7 +3920,7 @@ pub fn constructor_put_in_reg_sext32(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2149. + // Rule at src/isa/s390x/inst.isle line 2141. let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; return Some(expr1_0); @@ -3940,9 +3935,9 @@ pub fn constructor_put_in_reg_sext32(ctx: &mut C, arg0: Value) -> Op offset: pattern5_3, } = &pattern4_0 { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { - // Rule at src/isa/s390x/inst.isle line 2151. + // Rule at src/isa/s390x/inst.isle line 2143. let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; return Some(expr1_0); @@ -3950,13 +3945,13 @@ pub fn constructor_put_in_reg_sext32(ctx: &mut C, arg0: Value) -> Op } } } - // Rule at src/isa/s390x/inst.isle line 2153. + // Rule at src/isa/s390x/inst.isle line 2145. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2155. + // Rule at src/isa/s390x/inst.isle line 2147. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } @@ -3968,7 +3963,7 @@ pub fn constructor_put_in_reg_zext64(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2160. + // Rule at src/isa/s390x/inst.isle line 2152. let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; return Some(expr1_0); @@ -3983,9 +3978,9 @@ pub fn constructor_put_in_reg_zext64(ctx: &mut C, arg0: Value) -> Op offset: pattern5_3, } = &pattern4_0 { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { - // Rule at src/isa/s390x/inst.isle line 2162. + // Rule at src/isa/s390x/inst.isle line 2154. let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; return Some(expr1_0); @@ -3993,13 +3988,13 @@ pub fn constructor_put_in_reg_zext64(ctx: &mut C, arg0: Value) -> Op } } } - // Rule at src/isa/s390x/inst.isle line 2164. + // Rule at src/isa/s390x/inst.isle line 2156. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2166. + // Rule at src/isa/s390x/inst.isle line 2158. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } @@ -4011,7 +4006,7 @@ pub fn constructor_put_in_reg_sext64(ctx: &mut C, arg0: Value) -> Op let pattern0_0 = arg0; let pattern1_0 = C::value_type(ctx, pattern0_0); if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2171. + // Rule at src/isa/s390x/inst.isle line 2163. let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; return Some(expr1_0); @@ -4026,9 +4021,9 @@ pub fn constructor_put_in_reg_sext64(ctx: &mut C, arg0: Value) -> Op offset: pattern5_3, } = &pattern4_0 { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { - // Rule at src/isa/s390x/inst.isle line 2173. + // Rule at src/isa/s390x/inst.isle line 2165. let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; return Some(expr1_0); @@ -4036,13 +4031,13 @@ pub fn constructor_put_in_reg_sext64(ctx: &mut C, arg0: Value) -> Op } } } - // Rule at src/isa/s390x/inst.isle line 2175. + // Rule at src/isa/s390x/inst.isle line 2167. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; return Some(expr1_0); } if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { - // Rule at src/isa/s390x/inst.isle line 2177. + // Rule at src/isa/s390x/inst.isle line 2169. let expr0_0 = C::put_in_reg(ctx, pattern0_0); return Some(expr0_0); } @@ -4057,7 +4052,7 @@ pub fn constructor_put_in_regpair_lo_zext32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2183. + // Rule at src/isa/s390x/inst.isle line 2175. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; @@ -4073,7 +4068,7 @@ pub fn constructor_put_in_regpair_lo_sext32( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2191. + // Rule at src/isa/s390x/inst.isle line 2183. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; @@ -4089,7 +4084,7 @@ pub fn constructor_put_in_regpair_lo_zext64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2199. + // Rule at src/isa/s390x/inst.isle line 2191. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; @@ -4105,7 +4100,7 @@ pub fn constructor_put_in_regpair_lo_sext64( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2207. + // Rule at src/isa/s390x/inst.isle line 2199. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; @@ -4126,14 +4121,14 @@ pub fn constructor_emit_cmov_imm( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2217. + // Rule at src/isa/s390x/inst.isle line 2209. let expr0_0 = MInst::CMov32SImm16 { rd: pattern2_0, cond: pattern3_0.clone(), imm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4143,14 +4138,14 @@ pub fn constructor_emit_cmov_imm( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2220. + // Rule at src/isa/s390x/inst.isle line 2212. let expr0_0 = MInst::CMov64SImm16 { rd: pattern2_0, cond: pattern3_0.clone(), imm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4171,7 +4166,7 @@ pub fn constructor_cmov_imm( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2226. + // Rule at src/isa/s390x/inst.isle line 2218. let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -4191,11 +4186,11 @@ pub fn constructor_cmov_imm_regpair_lo( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2233. + // Rule at src/isa/s390x/inst.isle line 2225. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; - let expr3_0 = constructor_with_flags_1(ctx, pattern1_0, &expr2_0)?; + let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; return Some(expr4_0); } @@ -4214,11 +4209,11 @@ pub fn constructor_cmov_imm_regpair_hi( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2242. + // Rule at src/isa/s390x/inst.isle line 2234. let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; - let expr3_0 = constructor_with_flags_1(ctx, pattern1_0, &expr2_0)?; + let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; return Some(expr4_0); } @@ -4236,14 +4231,14 @@ pub fn constructor_emit_cmov_reg( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2256. + // Rule at src/isa/s390x/inst.isle line 2248. let expr0_0 = MInst::FpuCMov32 { rd: pattern2_0, cond: pattern3_0.clone(), rm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4253,14 +4248,14 @@ pub fn constructor_emit_cmov_reg( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2259. + // Rule at src/isa/s390x/inst.isle line 2251. let expr0_0 = MInst::FpuCMov64 { rd: pattern2_0, cond: pattern3_0.clone(), rm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4270,14 +4265,14 @@ pub fn constructor_emit_cmov_reg( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2250. + // Rule at src/isa/s390x/inst.isle line 2242. let expr0_0 = MInst::CMov32 { rd: pattern2_0, cond: pattern3_0.clone(), rm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4287,14 +4282,14 @@ pub fn constructor_emit_cmov_reg( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2253. + // Rule at src/isa/s390x/inst.isle line 2245. let expr0_0 = MInst::CMov64 { rd: pattern2_0, cond: pattern3_0.clone(), rm: pattern4_0, }; let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); - let expr2_0 = ConsumesFlags::ConsumesFlags { + let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr0_0, result: expr1_0, }; @@ -4315,7 +4310,7 @@ pub fn constructor_cmov_reg( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2265. + // Rule at src/isa/s390x/inst.isle line 2257. let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -4329,21 +4324,38 @@ pub fn constructor_trap_if( arg2: &TrapCode, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2273. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = MInst::TrapIf { - cond: pattern2_0.clone(), - trap_code: pattern3_0.clone(), - }; - let expr2_0 = C::emit(ctx, &expr1_0); - return Some(pattern1_1); + match pattern0_0 { + &ProducesFlags::ProducesFlagsSideEffect { + inst: ref pattern1_0, + } => { + let pattern2_0 = arg1; + let pattern3_0 = arg2; + // Rule at src/isa/s390x/inst.isle line 2269. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = MInst::TrapIf { + cond: pattern2_0.clone(), + trap_code: pattern3_0.clone(), + }; + let expr2_0 = C::emit(ctx, &expr1_0); + let expr3_0 = C::invalid_reg(ctx); + return Some(expr3_0); + } + &ProducesFlags::ProducesFlagsReturnsReg { + inst: ref pattern1_0, + result: pattern1_1, + } => { + let pattern2_0 = arg1; + let pattern3_0 = arg2; + // Rule at src/isa/s390x/inst.isle line 2265. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = MInst::TrapIf { + cond: pattern2_0.clone(), + trap_code: pattern3_0.clone(), + }; + let expr2_0 = C::emit(ctx, &expr1_0); + return Some(pattern1_1); + } + _ => {} } return None; } @@ -4362,7 +4374,7 @@ pub fn constructor_icmps_reg_and_trap( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2279. + // Rule at src/isa/s390x/inst.isle line 2275. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = MInst::CmpTrapRR { op: expr0_0, @@ -4390,7 +4402,7 @@ pub fn constructor_icmps_simm16_and_trap( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2285. + // Rule at src/isa/s390x/inst.isle line 2281. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = MInst::CmpTrapRSImm16 { op: expr0_0, @@ -4418,7 +4430,7 @@ pub fn constructor_icmpu_reg_and_trap( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2291. + // Rule at src/isa/s390x/inst.isle line 2287. let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; let expr1_0 = MInst::CmpTrapRR { op: expr0_0, @@ -4446,7 +4458,7 @@ pub fn constructor_icmpu_uimm16_and_trap( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2297. + // Rule at src/isa/s390x/inst.isle line 2293. let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; let expr1_0 = MInst::CmpTrapRUImm16 { op: expr0_0, @@ -4466,7 +4478,7 @@ pub fn constructor_trap_impl( arg0: &TrapCode, ) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 2303. + // Rule at src/isa/s390x/inst.isle line 2299. let expr0_0 = MInst::Trap { trap_code: pattern0_0.clone(), }; @@ -4482,7 +4494,7 @@ pub fn constructor_trap_if_impl( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2307. + // Rule at src/isa/s390x/inst.isle line 2303. let expr0_0 = MInst::TrapIf { cond: pattern0_0.clone(), trap_code: pattern1_0.clone(), @@ -4493,7 +4505,7 @@ pub fn constructor_trap_if_impl( // Generated as internal constructor for term debugtrap_impl. pub fn constructor_debugtrap_impl(ctx: &mut C) -> Option { - // Rule at src/isa/s390x/inst.isle line 2311. + // Rule at src/isa/s390x/inst.isle line 2307. let expr0_0 = MInst::Debugtrap; let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; return Some(expr1_0); @@ -4507,7 +4519,7 @@ pub fn constructor_bool( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2322. + // Rule at src/isa/s390x/inst.isle line 2318. let expr0_0 = ProducesBool::ProducesBool { producer: pattern0_0.clone(), cond: pattern1_0.clone(), @@ -4526,9 +4538,9 @@ pub fn constructor_invert_bool( cond: ref pattern1_1, } = pattern0_0 { - // Rule at src/isa/s390x/inst.isle line 2326. - let expr0_0 = C::invert_cond(ctx, &pattern1_1); - let expr1_0 = constructor_bool(ctx, &pattern1_0, &expr0_0)?; + // Rule at src/isa/s390x/inst.isle line 2322. + let expr0_0 = C::invert_cond(ctx, pattern1_1); + let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; return Some(expr1_0); } return None; @@ -4537,13 +4549,12 @@ pub fn constructor_invert_bool( // Generated as internal constructor for term emit_producer. pub fn constructor_emit_producer(ctx: &mut C, arg0: &ProducesFlags) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { + if let &ProducesFlags::ProducesFlagsSideEffect { inst: ref pattern1_0, - result: pattern1_1, } = pattern0_0 { - // Rule at src/isa/s390x/inst.isle line 2335. - let expr0_0 = C::emit(ctx, &pattern1_0); + // Rule at src/isa/s390x/inst.isle line 2331. + let expr0_0 = C::emit(ctx, pattern1_0); return Some(expr0_0); } return None; @@ -4552,13 +4563,13 @@ pub fn constructor_emit_producer(ctx: &mut C, arg0: &ProducesFlags) // Generated as internal constructor for term emit_consumer. pub fn constructor_emit_consumer(ctx: &mut C, arg0: &ConsumesFlags) -> Option { let pattern0_0 = arg0; - if let &ConsumesFlags::ConsumesFlags { + if let &ConsumesFlags::ConsumesFlagsReturnsReg { inst: ref pattern1_0, result: pattern1_1, } = pattern0_0 { - // Rule at src/isa/s390x/inst.isle line 2337. - let expr0_0 = C::emit(ctx, &pattern1_0); + // Rule at src/isa/s390x/inst.isle line 2333. + let expr0_0 = C::emit(ctx, pattern1_0); return Some(expr0_0); } return None; @@ -4581,11 +4592,11 @@ pub fn constructor_select_bool_reg( { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2341. + // Rule at src/isa/s390x/inst.isle line 2337. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); - let expr1_0 = constructor_emit_producer(ctx, &pattern2_0)?; + let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; - let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, &pattern2_1, pattern3_0)?; + let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); return Some(expr5_0); @@ -4610,11 +4621,11 @@ pub fn constructor_select_bool_imm( { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2350. + // Rule at src/isa/s390x/inst.isle line 2346. let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); - let expr1_0 = constructor_emit_producer(ctx, &pattern2_0)?; + let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; - let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, &pattern2_1, pattern3_0)?; + let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); return Some(expr5_0); @@ -4631,7 +4642,7 @@ pub fn constructor_lower_bool( let pattern0_0 = arg0; if pattern0_0 == B1 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2360. + // Rule at src/isa/s390x/inst.isle line 2356. let expr0_0: Type = B1; let expr1_0: i16 = 1; let expr2_0: u64 = 0; @@ -4640,7 +4651,7 @@ pub fn constructor_lower_bool( } if pattern0_0 == B8 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2361. + // Rule at src/isa/s390x/inst.isle line 2357. let expr0_0: Type = B8; let expr1_0: i16 = -1; let expr2_0: u64 = 0; @@ -4649,7 +4660,7 @@ pub fn constructor_lower_bool( } if pattern0_0 == B16 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2362. + // Rule at src/isa/s390x/inst.isle line 2358. let expr0_0: Type = B16; let expr1_0: i16 = -1; let expr2_0: u64 = 0; @@ -4658,7 +4669,7 @@ pub fn constructor_lower_bool( } if pattern0_0 == B32 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2363. + // Rule at src/isa/s390x/inst.isle line 2359. let expr0_0: Type = B32; let expr1_0: i16 = -1; let expr2_0: u64 = 0; @@ -4667,7 +4678,7 @@ pub fn constructor_lower_bool( } if pattern0_0 == B64 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2364. + // Rule at src/isa/s390x/inst.isle line 2360. let expr0_0: Type = B64; let expr1_0: i16 = -1; let expr2_0: u64 = 0; @@ -4692,9 +4703,9 @@ pub fn constructor_cond_br_bool( { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2368. - let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; - let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, &pattern1_1)?; + // Rule at src/isa/s390x/inst.isle line 2364. + let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; + let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; return Some(expr1_0); } return None; @@ -4713,9 +4724,9 @@ pub fn constructor_oneway_cond_br_bool( } = pattern0_0 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2374. - let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; - let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, &pattern1_1)?; + // Rule at src/isa/s390x/inst.isle line 2370. + let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; + let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; return Some(expr1_0); } return None; @@ -4734,9 +4745,9 @@ pub fn constructor_trap_if_bool( } = pattern0_0 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2380. - let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; - let expr1_0 = constructor_trap_if_impl(ctx, &pattern1_1, pattern2_0)?; + // Rule at src/isa/s390x/inst.isle line 2376. + let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; + let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; return Some(expr1_0); } return None; @@ -4744,7 +4755,7 @@ pub fn constructor_trap_if_bool( // Generated as internal constructor for term casloop_val_reg. pub fn constructor_casloop_val_reg(ctx: &mut C) -> Option { - // Rule at src/isa/s390x/inst.isle line 2394. + // Rule at src/isa/s390x/inst.isle line 2390. let expr0_0: u8 = 0; let expr1_0 = C::writable_gpr(ctx, expr0_0); return Some(expr1_0); @@ -4752,7 +4763,7 @@ pub fn constructor_casloop_val_reg(ctx: &mut C) -> Option(ctx: &mut C) -> Option { - // Rule at src/isa/s390x/inst.isle line 2398. + // Rule at src/isa/s390x/inst.isle line 2394. let expr0_0: u8 = 1; let expr1_0 = C::writable_gpr(ctx, expr0_0); return Some(expr1_0); @@ -4772,7 +4783,7 @@ pub fn constructor_casloop_emit( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2407. + // Rule at src/isa/s390x/inst.isle line 2403. let expr0_0: i64 = 0; let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; @@ -4800,13 +4811,13 @@ pub fn constructor_casloop_result( let pattern2_0 = arg1; if let Some(()) = C::littleendian(ctx, pattern2_0) { let pattern4_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2425. + // Rule at src/isa/s390x/inst.isle line 2421. let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; return Some(expr0_0); } if let Some(()) = C::bigendian(ctx, pattern2_0) { let pattern4_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2423. + // Rule at src/isa/s390x/inst.isle line 2419. let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; return Some(expr0_0); } @@ -4828,7 +4839,7 @@ pub fn constructor_casloop( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2430. + // Rule at src/isa/s390x/inst.isle line 2426. let expr0_0 = constructor_casloop_emit( ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, )?; @@ -4839,7 +4850,7 @@ pub fn constructor_casloop( // Generated as internal constructor for term casloop_bitshift. pub fn constructor_casloop_bitshift(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 2445. + // Rule at src/isa/s390x/inst.isle line 2441. let expr0_0: Type = I32; let expr1_0: u8 = 3; let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; @@ -4849,7 +4860,7 @@ pub fn constructor_casloop_bitshift(ctx: &mut C, arg0: Reg) -> Optio // Generated as internal constructor for term casloop_aligned_addr. pub fn constructor_casloop_aligned_addr(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 2450. + // Rule at src/isa/s390x/inst.isle line 2446. let expr0_0: Type = I64; let expr1_0: u16 = 65532; let expr2_0: u8 = 0; @@ -4873,7 +4884,7 @@ pub fn constructor_casloop_rotate_in( let pattern3_0 = arg2; let pattern4_0 = arg3; let pattern5_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2460. + // Rule at src/isa/s390x/inst.isle line 2456. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 0; @@ -4887,7 +4898,7 @@ pub fn constructor_casloop_rotate_in( if let Some(()) = C::littleendian(ctx, pattern3_0) { let pattern5_0 = arg3; let pattern6_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2464. + // Rule at src/isa/s390x/inst.isle line 2460. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 16; @@ -4899,7 +4910,7 @@ pub fn constructor_casloop_rotate_in( if let Some(()) = C::bigendian(ctx, pattern3_0) { let pattern5_0 = arg3; let pattern6_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2462. + // Rule at src/isa/s390x/inst.isle line 2458. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 0; @@ -4927,7 +4938,7 @@ pub fn constructor_casloop_rotate_out( let pattern3_0 = arg2; let pattern4_0 = arg3; let pattern5_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2473. + // Rule at src/isa/s390x/inst.isle line 2469. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 0; @@ -4943,7 +4954,7 @@ pub fn constructor_casloop_rotate_out( if let Some(()) = C::littleendian(ctx, pattern3_0) { let pattern5_0 = arg3; let pattern6_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2477. + // Rule at src/isa/s390x/inst.isle line 2473. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 16; @@ -4955,7 +4966,7 @@ pub fn constructor_casloop_rotate_out( if let Some(()) = C::bigendian(ctx, pattern3_0) { let pattern5_0 = arg3; let pattern6_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2475. + // Rule at src/isa/s390x/inst.isle line 2471. let expr0_0: Type = I32; let expr1_0 = constructor_casloop_tmp_reg(ctx)?; let expr2_0: u8 = 0; @@ -4981,7 +4992,7 @@ pub fn constructor_casloop_rotate_result( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2488. + // Rule at src/isa/s390x/inst.isle line 2484. let expr0_0: Type = I32; let expr1_0: u8 = 8; let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; @@ -4992,7 +5003,7 @@ pub fn constructor_casloop_rotate_result( if let Some(()) = C::littleendian(ctx, pattern2_0) { let pattern4_0 = arg2; let pattern5_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2492. + // Rule at src/isa/s390x/inst.isle line 2488. let expr0_0: Type = I32; let expr1_0: Type = I32; let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; @@ -5002,7 +5013,7 @@ pub fn constructor_casloop_rotate_result( if let Some(()) = C::bigendian(ctx, pattern2_0) { let pattern4_0 = arg2; let pattern5_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2490. + // Rule at src/isa/s390x/inst.isle line 2486. let expr0_0: Type = I32; let expr1_0: u8 = 16; let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; @@ -5028,7 +5039,7 @@ pub fn constructor_casloop_subword( let pattern3_0 = arg3; let pattern4_0 = arg4; let pattern5_0 = arg5; - // Rule at src/isa/s390x/inst.isle line 2497. + // Rule at src/isa/s390x/inst.isle line 2493. let expr0_0 = constructor_casloop_emit( ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, )?; @@ -5042,7 +5053,7 @@ pub fn constructor_clz_reg(ctx: &mut C, arg0: i16, arg1: Reg) -> Opt let pattern0_0 = arg0; if pattern0_0 == 64 { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2508. + // Rule at src/isa/s390x/inst.isle line 2504. let expr0_0 = constructor_temp_writable_regpair(ctx)?; let expr1_0 = MInst::Flogr { rn: pattern2_0 }; let expr2_0 = C::emit(ctx, &expr1_0); @@ -5050,7 +5061,7 @@ pub fn constructor_clz_reg(ctx: &mut C, arg0: i16, arg1: Reg) -> Opt return Some(expr3_0); } let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2517. + // Rule at src/isa/s390x/inst.isle line 2513. let expr0_0 = constructor_temp_writable_regpair(ctx)?; let expr1_0 = MInst::Flogr { rn: pattern1_0 }; let expr2_0 = C::emit(ctx, &expr1_0); @@ -5071,22 +5082,22 @@ pub fn constructor_clz_reg(ctx: &mut C, arg0: i16, arg1: Reg) -> Opt pub fn constructor_aluop_add(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 2528. + // Rule at src/isa/s390x/inst.isle line 2524. let expr0_0 = ALUOp::Add32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2529. + // Rule at src/isa/s390x/inst.isle line 2525. let expr0_0 = ALUOp::Add32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2530. + // Rule at src/isa/s390x/inst.isle line 2526. let expr0_0 = ALUOp::Add32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2531. + // Rule at src/isa/s390x/inst.isle line 2527. let expr0_0 = ALUOp::Add64; return Some(expr0_0); } @@ -5097,17 +5108,17 @@ pub fn constructor_aluop_add(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2534. + // Rule at src/isa/s390x/inst.isle line 2530. let expr0_0 = ALUOp::Add32Ext16; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2535. + // Rule at src/isa/s390x/inst.isle line 2531. let expr0_0 = ALUOp::Add32Ext16; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2536. + // Rule at src/isa/s390x/inst.isle line 2532. let expr0_0 = ALUOp::Add64Ext16; return Some(expr0_0); } @@ -5118,7 +5129,7 @@ pub fn constructor_aluop_add_sext16(ctx: &mut C, arg0: Type) -> Opti pub fn constructor_aluop_add_sext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2539. + // Rule at src/isa/s390x/inst.isle line 2535. let expr0_0 = ALUOp::Add64Ext32; return Some(expr0_0); } @@ -5135,7 +5146,7 @@ pub fn constructor_add_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2542. + // Rule at src/isa/s390x/inst.isle line 2538. let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5151,7 +5162,7 @@ pub fn constructor_add_reg_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2545. + // Rule at src/isa/s390x/inst.isle line 2541. let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5167,7 +5178,7 @@ pub fn constructor_add_simm16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2548. + // Rule at src/isa/s390x/inst.isle line 2544. let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5183,7 +5194,7 @@ pub fn constructor_add_simm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2551. + // Rule at src/isa/s390x/inst.isle line 2547. let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5199,7 +5210,7 @@ pub fn constructor_add_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2554. + // Rule at src/isa/s390x/inst.isle line 2550. let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5215,7 +5226,7 @@ pub fn constructor_add_mem_sext16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2557. + // Rule at src/isa/s390x/inst.isle line 2553. let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5231,7 +5242,7 @@ pub fn constructor_add_mem_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2560. + // Rule at src/isa/s390x/inst.isle line 2556. let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5241,12 +5252,12 @@ pub fn constructor_add_mem_sext32( pub fn constructor_aluop_add_logical(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2566. + // Rule at src/isa/s390x/inst.isle line 2562. let expr0_0 = ALUOp::AddLogical32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2567. + // Rule at src/isa/s390x/inst.isle line 2563. let expr0_0 = ALUOp::AddLogical64; return Some(expr0_0); } @@ -5257,7 +5268,7 @@ pub fn constructor_aluop_add_logical(ctx: &mut C, arg0: Type) -> Opt pub fn constructor_aluop_add_logical_zext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2570. + // Rule at src/isa/s390x/inst.isle line 2566. let expr0_0 = ALUOp::AddLogical64Ext32; return Some(expr0_0); } @@ -5274,7 +5285,7 @@ pub fn constructor_add_logical_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2573. + // Rule at src/isa/s390x/inst.isle line 2569. let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5290,7 +5301,7 @@ pub fn constructor_add_logical_reg_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2576. + // Rule at src/isa/s390x/inst.isle line 2572. let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5306,7 +5317,7 @@ pub fn constructor_add_logical_zimm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2579. + // Rule at src/isa/s390x/inst.isle line 2575. let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5322,7 +5333,7 @@ pub fn constructor_add_logical_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2582. + // Rule at src/isa/s390x/inst.isle line 2578. let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5338,7 +5349,7 @@ pub fn constructor_add_logical_mem_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2585. + // Rule at src/isa/s390x/inst.isle line 2581. let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5348,22 +5359,22 @@ pub fn constructor_add_logical_mem_zext32( pub fn constructor_aluop_sub(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 2591. + // Rule at src/isa/s390x/inst.isle line 2587. let expr0_0 = ALUOp::Sub32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2592. + // Rule at src/isa/s390x/inst.isle line 2588. let expr0_0 = ALUOp::Sub32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2593. + // Rule at src/isa/s390x/inst.isle line 2589. let expr0_0 = ALUOp::Sub32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2594. + // Rule at src/isa/s390x/inst.isle line 2590. let expr0_0 = ALUOp::Sub64; return Some(expr0_0); } @@ -5374,17 +5385,17 @@ pub fn constructor_aluop_sub(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2597. + // Rule at src/isa/s390x/inst.isle line 2593. let expr0_0 = ALUOp::Sub32Ext16; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2598. + // Rule at src/isa/s390x/inst.isle line 2594. let expr0_0 = ALUOp::Sub32Ext16; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2599. + // Rule at src/isa/s390x/inst.isle line 2595. let expr0_0 = ALUOp::Sub64Ext16; return Some(expr0_0); } @@ -5395,7 +5406,7 @@ pub fn constructor_aluop_sub_sext16(ctx: &mut C, arg0: Type) -> Opti pub fn constructor_aluop_sub_sext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2602. + // Rule at src/isa/s390x/inst.isle line 2598. let expr0_0 = ALUOp::Sub64Ext32; return Some(expr0_0); } @@ -5412,7 +5423,7 @@ pub fn constructor_sub_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2605. + // Rule at src/isa/s390x/inst.isle line 2601. let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5428,7 +5439,7 @@ pub fn constructor_sub_reg_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2608. + // Rule at src/isa/s390x/inst.isle line 2604. let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5444,7 +5455,7 @@ pub fn constructor_sub_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2611. + // Rule at src/isa/s390x/inst.isle line 2607. let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5460,7 +5471,7 @@ pub fn constructor_sub_mem_sext16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2614. + // Rule at src/isa/s390x/inst.isle line 2610. let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5476,7 +5487,7 @@ pub fn constructor_sub_mem_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2617. + // Rule at src/isa/s390x/inst.isle line 2613. let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5486,12 +5497,12 @@ pub fn constructor_sub_mem_sext32( pub fn constructor_aluop_sub_logical(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2623. + // Rule at src/isa/s390x/inst.isle line 2619. let expr0_0 = ALUOp::SubLogical32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2624. + // Rule at src/isa/s390x/inst.isle line 2620. let expr0_0 = ALUOp::SubLogical64; return Some(expr0_0); } @@ -5502,7 +5513,7 @@ pub fn constructor_aluop_sub_logical(ctx: &mut C, arg0: Type) -> Opt pub fn constructor_aluop_sub_logical_zext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2627. + // Rule at src/isa/s390x/inst.isle line 2623. let expr0_0 = ALUOp::SubLogical64Ext32; return Some(expr0_0); } @@ -5519,7 +5530,7 @@ pub fn constructor_sub_logical_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2630. + // Rule at src/isa/s390x/inst.isle line 2626. let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5535,7 +5546,7 @@ pub fn constructor_sub_logical_reg_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2633. + // Rule at src/isa/s390x/inst.isle line 2629. let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5551,7 +5562,7 @@ pub fn constructor_sub_logical_zimm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2636. + // Rule at src/isa/s390x/inst.isle line 2632. let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5567,7 +5578,7 @@ pub fn constructor_sub_logical_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2639. + // Rule at src/isa/s390x/inst.isle line 2635. let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5583,7 +5594,7 @@ pub fn constructor_sub_logical_mem_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2642. + // Rule at src/isa/s390x/inst.isle line 2638. let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5593,22 +5604,22 @@ pub fn constructor_sub_logical_mem_zext32( pub fn constructor_aluop_mul(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 2648. + // Rule at src/isa/s390x/inst.isle line 2644. let expr0_0 = ALUOp::Mul32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2649. + // Rule at src/isa/s390x/inst.isle line 2645. let expr0_0 = ALUOp::Mul32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2650. + // Rule at src/isa/s390x/inst.isle line 2646. let expr0_0 = ALUOp::Mul32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2651. + // Rule at src/isa/s390x/inst.isle line 2647. let expr0_0 = ALUOp::Mul64; return Some(expr0_0); } @@ -5619,17 +5630,17 @@ pub fn constructor_aluop_mul(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2654. + // Rule at src/isa/s390x/inst.isle line 2650. let expr0_0 = ALUOp::Mul32Ext16; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2655. + // Rule at src/isa/s390x/inst.isle line 2651. let expr0_0 = ALUOp::Mul32Ext16; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2656. + // Rule at src/isa/s390x/inst.isle line 2652. let expr0_0 = ALUOp::Mul64Ext16; return Some(expr0_0); } @@ -5640,7 +5651,7 @@ pub fn constructor_aluop_mul_sext16(ctx: &mut C, arg0: Type) -> Opti pub fn constructor_aluop_mul_sext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2659. + // Rule at src/isa/s390x/inst.isle line 2655. let expr0_0 = ALUOp::Mul64Ext32; return Some(expr0_0); } @@ -5657,7 +5668,7 @@ pub fn constructor_mul_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2662. + // Rule at src/isa/s390x/inst.isle line 2658. let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5673,7 +5684,7 @@ pub fn constructor_mul_reg_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2665. + // Rule at src/isa/s390x/inst.isle line 2661. let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5689,7 +5700,7 @@ pub fn constructor_mul_simm16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2668. + // Rule at src/isa/s390x/inst.isle line 2664. let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5705,7 +5716,7 @@ pub fn constructor_mul_simm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2671. + // Rule at src/isa/s390x/inst.isle line 2667. let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5721,7 +5732,7 @@ pub fn constructor_mul_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2674. + // Rule at src/isa/s390x/inst.isle line 2670. let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5737,7 +5748,7 @@ pub fn constructor_mul_mem_sext16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2677. + // Rule at src/isa/s390x/inst.isle line 2673. let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5753,7 +5764,7 @@ pub fn constructor_mul_mem_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2680. + // Rule at src/isa/s390x/inst.isle line 2676. let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5770,14 +5781,14 @@ pub fn constructor_udivmod( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2686. + // Rule at src/isa/s390x/inst.isle line 2682. let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2687. + // Rule at src/isa/s390x/inst.isle line 2683. let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } @@ -5795,14 +5806,14 @@ pub fn constructor_sdivmod( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2693. + // Rule at src/isa/s390x/inst.isle line 2689. let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2694. + // Rule at src/isa/s390x/inst.isle line 2690. let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } @@ -5813,12 +5824,12 @@ pub fn constructor_sdivmod( pub fn constructor_aluop_and(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2700. + // Rule at src/isa/s390x/inst.isle line 2696. let expr0_0 = ALUOp::And32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2701. + // Rule at src/isa/s390x/inst.isle line 2697. let expr0_0 = ALUOp::And64; return Some(expr0_0); } @@ -5835,7 +5846,7 @@ pub fn constructor_and_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2704. + // Rule at src/isa/s390x/inst.isle line 2700. let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5851,7 +5862,7 @@ pub fn constructor_and_uimm16shifted( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2707. + // Rule at src/isa/s390x/inst.isle line 2703. let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; @@ -5868,7 +5879,7 @@ pub fn constructor_and_uimm32shifted( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2710. + // Rule at src/isa/s390x/inst.isle line 2706. let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; @@ -5885,7 +5896,7 @@ pub fn constructor_and_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2713. + // Rule at src/isa/s390x/inst.isle line 2709. let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5895,12 +5906,12 @@ pub fn constructor_and_mem( pub fn constructor_aluop_or(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2719. + // Rule at src/isa/s390x/inst.isle line 2715. let expr0_0 = ALUOp::Orr32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2720. + // Rule at src/isa/s390x/inst.isle line 2716. let expr0_0 = ALUOp::Orr64; return Some(expr0_0); } @@ -5917,7 +5928,7 @@ pub fn constructor_or_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2723. + // Rule at src/isa/s390x/inst.isle line 2719. let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5933,7 +5944,7 @@ pub fn constructor_or_uimm16shifted( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2726. + // Rule at src/isa/s390x/inst.isle line 2722. let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; @@ -5950,7 +5961,7 @@ pub fn constructor_or_uimm32shifted( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2729. + // Rule at src/isa/s390x/inst.isle line 2725. let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; @@ -5967,7 +5978,7 @@ pub fn constructor_or_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2732. + // Rule at src/isa/s390x/inst.isle line 2728. let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -5977,12 +5988,12 @@ pub fn constructor_or_mem( pub fn constructor_aluop_xor(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2738. + // Rule at src/isa/s390x/inst.isle line 2734. let expr0_0 = ALUOp::Xor32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2739. + // Rule at src/isa/s390x/inst.isle line 2735. let expr0_0 = ALUOp::Xor64; return Some(expr0_0); } @@ -5999,7 +6010,7 @@ pub fn constructor_xor_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2742. + // Rule at src/isa/s390x/inst.isle line 2738. let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6015,7 +6026,7 @@ pub fn constructor_xor_uimm32shifted( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2745. + // Rule at src/isa/s390x/inst.isle line 2741. let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; let expr1_0 = constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; @@ -6032,7 +6043,7 @@ pub fn constructor_xor_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2748. + // Rule at src/isa/s390x/inst.isle line 2744. let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6052,7 +6063,7 @@ pub fn constructor_push_xor_uimm32shifted( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2751. + // Rule at src/isa/s390x/inst.isle line 2747. let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; let expr1_0 = constructor_push_alu_uimm32shifted( ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, @@ -6065,7 +6076,7 @@ pub fn constructor_not_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Op let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2757. + // Rule at src/isa/s390x/inst.isle line 2753. let expr0_0: u32 = 4294967295; let expr1_0: u8 = 0; let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); @@ -6074,7 +6085,7 @@ pub fn constructor_not_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Op } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { let pattern2_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2759. + // Rule at src/isa/s390x/inst.isle line 2755. let expr0_0: u32 = 4294967295; let expr1_0: u8 = 0; let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); @@ -6101,7 +6112,7 @@ pub fn constructor_push_not_reg( if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2765. + // Rule at src/isa/s390x/inst.isle line 2761. let expr0_0: u32 = 4294967295; let expr1_0: u8 = 0; let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); @@ -6113,7 +6124,7 @@ pub fn constructor_push_not_reg( if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2767. + // Rule at src/isa/s390x/inst.isle line 2763. let expr0_0: u32 = 4294967295; let expr1_0: u8 = 0; let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); @@ -6135,12 +6146,12 @@ pub fn constructor_push_not_reg( pub fn constructor_aluop_and_not(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2775. + // Rule at src/isa/s390x/inst.isle line 2771. let expr0_0 = ALUOp::AndNot32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2776. + // Rule at src/isa/s390x/inst.isle line 2772. let expr0_0 = ALUOp::AndNot64; return Some(expr0_0); } @@ -6157,7 +6168,7 @@ pub fn constructor_and_not_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2779. + // Rule at src/isa/s390x/inst.isle line 2775. let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6167,12 +6178,12 @@ pub fn constructor_and_not_reg( pub fn constructor_aluop_or_not(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2785. + // Rule at src/isa/s390x/inst.isle line 2781. let expr0_0 = ALUOp::OrrNot32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2786. + // Rule at src/isa/s390x/inst.isle line 2782. let expr0_0 = ALUOp::OrrNot64; return Some(expr0_0); } @@ -6189,7 +6200,7 @@ pub fn constructor_or_not_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2789. + // Rule at src/isa/s390x/inst.isle line 2785. let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6199,12 +6210,12 @@ pub fn constructor_or_not_reg( pub fn constructor_aluop_xor_not(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2795. + // Rule at src/isa/s390x/inst.isle line 2791. let expr0_0 = ALUOp::XorNot32; return Some(expr0_0); } if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { - // Rule at src/isa/s390x/inst.isle line 2796. + // Rule at src/isa/s390x/inst.isle line 2792. let expr0_0 = ALUOp::XorNot64; return Some(expr0_0); } @@ -6221,7 +6232,7 @@ pub fn constructor_xor_not_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2799. + // Rule at src/isa/s390x/inst.isle line 2795. let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6231,12 +6242,12 @@ pub fn constructor_xor_not_reg( pub fn constructor_unaryop_abs(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2805. + // Rule at src/isa/s390x/inst.isle line 2801. let expr0_0 = UnaryOp::Abs32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2806. + // Rule at src/isa/s390x/inst.isle line 2802. let expr0_0 = UnaryOp::Abs64; return Some(expr0_0); } @@ -6247,7 +6258,7 @@ pub fn constructor_unaryop_abs(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2809. + // Rule at src/isa/s390x/inst.isle line 2805. let expr0_0 = UnaryOp::Abs64Ext32; return Some(expr0_0); } @@ -6258,7 +6269,7 @@ pub fn constructor_unaryop_abs_sext32(ctx: &mut C, arg0: Type) -> Op pub fn constructor_abs_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2812. + // Rule at src/isa/s390x/inst.isle line 2808. let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -6268,7 +6279,7 @@ pub fn constructor_abs_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Op pub fn constructor_abs_reg_sext32(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2815. + // Rule at src/isa/s390x/inst.isle line 2811. let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -6278,22 +6289,22 @@ pub fn constructor_abs_reg_sext32(ctx: &mut C, arg0: Type, arg1: Reg pub fn constructor_unaryop_neg(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 2821. + // Rule at src/isa/s390x/inst.isle line 2817. let expr0_0 = UnaryOp::Neg32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2822. + // Rule at src/isa/s390x/inst.isle line 2818. let expr0_0 = UnaryOp::Neg32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2823. + // Rule at src/isa/s390x/inst.isle line 2819. let expr0_0 = UnaryOp::Neg32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2824. + // Rule at src/isa/s390x/inst.isle line 2820. let expr0_0 = UnaryOp::Neg64; return Some(expr0_0); } @@ -6304,7 +6315,7 @@ pub fn constructor_unaryop_neg(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2827. + // Rule at src/isa/s390x/inst.isle line 2823. let expr0_0 = UnaryOp::Neg64Ext32; return Some(expr0_0); } @@ -6315,7 +6326,7 @@ pub fn constructor_unaryop_neg_sext32(ctx: &mut C, arg0: Type) -> Op pub fn constructor_neg_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2830. + // Rule at src/isa/s390x/inst.isle line 2826. let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -6325,7 +6336,7 @@ pub fn constructor_neg_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Op pub fn constructor_neg_reg_sext32(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2833. + // Rule at src/isa/s390x/inst.isle line 2829. let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -6335,12 +6346,12 @@ pub fn constructor_neg_reg_sext32(ctx: &mut C, arg0: Type, arg1: Reg pub fn constructor_unaryop_bswap(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2839. + // Rule at src/isa/s390x/inst.isle line 2835. let expr0_0 = UnaryOp::BSwap32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2840. + // Rule at src/isa/s390x/inst.isle line 2836. let expr0_0 = UnaryOp::BSwap64; return Some(expr0_0); } @@ -6351,7 +6362,7 @@ pub fn constructor_unaryop_bswap(ctx: &mut C, arg0: Type) -> Option< pub fn constructor_bswap_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 2843. + // Rule at src/isa/s390x/inst.isle line 2839. let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -6369,7 +6380,7 @@ pub fn constructor_push_bswap_reg( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2846. + // Rule at src/isa/s390x/inst.isle line 2842. let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; return Some(expr1_0); @@ -6379,12 +6390,12 @@ pub fn constructor_push_bswap_reg( pub fn constructor_shiftop_rot(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2852. + // Rule at src/isa/s390x/inst.isle line 2848. let expr0_0 = ShiftOp::RotL32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2853. + // Rule at src/isa/s390x/inst.isle line 2849. let expr0_0 = ShiftOp::RotL64; return Some(expr0_0); } @@ -6401,7 +6412,7 @@ pub fn constructor_rot_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2856. + // Rule at src/isa/s390x/inst.isle line 2852. let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; let expr1_0: u8 = 0; let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; @@ -6418,7 +6429,7 @@ pub fn constructor_rot_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2860. + // Rule at src/isa/s390x/inst.isle line 2856. let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; let expr1_0 = C::zero_reg(ctx); let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; @@ -6437,7 +6448,7 @@ pub fn constructor_rot_imm_reg( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2864. + // Rule at src/isa/s390x/inst.isle line 2860. let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; let expr1_0 = constructor_shift_rr( ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, @@ -6461,7 +6472,7 @@ pub fn constructor_push_rot_imm_reg( let pattern3_0 = arg3; let pattern4_0 = arg4; let pattern5_0 = arg5; - // Rule at src/isa/s390x/inst.isle line 2868. + // Rule at src/isa/s390x/inst.isle line 2864. let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; let expr1_0 = constructor_push_shift( ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, @@ -6473,22 +6484,22 @@ pub fn constructor_push_rot_imm_reg( pub fn constructor_shiftop_lshl(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I8 { - // Rule at src/isa/s390x/inst.isle line 2875. + // Rule at src/isa/s390x/inst.isle line 2871. let expr0_0 = ShiftOp::LShL32; return Some(expr0_0); } if pattern0_0 == I16 { - // Rule at src/isa/s390x/inst.isle line 2876. + // Rule at src/isa/s390x/inst.isle line 2872. let expr0_0 = ShiftOp::LShL32; return Some(expr0_0); } if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2877. + // Rule at src/isa/s390x/inst.isle line 2873. let expr0_0 = ShiftOp::LShL32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2878. + // Rule at src/isa/s390x/inst.isle line 2874. let expr0_0 = ShiftOp::LShL64; return Some(expr0_0); } @@ -6505,7 +6516,7 @@ pub fn constructor_lshl_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2881. + // Rule at src/isa/s390x/inst.isle line 2877. let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; let expr1_0: u8 = 0; let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; @@ -6522,7 +6533,7 @@ pub fn constructor_lshl_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2885. + // Rule at src/isa/s390x/inst.isle line 2881. let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; let expr1_0 = C::zero_reg(ctx); let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; @@ -6533,12 +6544,12 @@ pub fn constructor_lshl_imm( pub fn constructor_shiftop_lshr(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2892. + // Rule at src/isa/s390x/inst.isle line 2888. let expr0_0 = ShiftOp::LShR32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2893. + // Rule at src/isa/s390x/inst.isle line 2889. let expr0_0 = ShiftOp::LShR64; return Some(expr0_0); } @@ -6555,7 +6566,7 @@ pub fn constructor_lshr_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2896. + // Rule at src/isa/s390x/inst.isle line 2892. let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; let expr1_0: u8 = 0; let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; @@ -6572,7 +6583,7 @@ pub fn constructor_lshr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2900. + // Rule at src/isa/s390x/inst.isle line 2896. let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; let expr1_0 = C::zero_reg(ctx); let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; @@ -6583,12 +6594,12 @@ pub fn constructor_lshr_imm( pub fn constructor_shiftop_ashr(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 2907. + // Rule at src/isa/s390x/inst.isle line 2903. let expr0_0 = ShiftOp::AShR32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 2908. + // Rule at src/isa/s390x/inst.isle line 2904. let expr0_0 = ShiftOp::AShR64; return Some(expr0_0); } @@ -6605,7 +6616,7 @@ pub fn constructor_ashr_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2911. + // Rule at src/isa/s390x/inst.isle line 2907. let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; let expr1_0: u8 = 0; let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; @@ -6622,7 +6633,7 @@ pub fn constructor_ashr_imm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2915. + // Rule at src/isa/s390x/inst.isle line 2911. let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; let expr1_0 = C::zero_reg(ctx); let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; @@ -6632,7 +6643,7 @@ pub fn constructor_ashr_imm( // Generated as internal constructor for term popcnt_byte. pub fn constructor_popcnt_byte(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 2922. + // Rule at src/isa/s390x/inst.isle line 2918. let expr0_0: Type = I64; let expr1_0 = UnaryOp::PopcntByte; let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; @@ -6642,7 +6653,7 @@ pub fn constructor_popcnt_byte(ctx: &mut C, arg0: Reg) -> Option(ctx: &mut C, arg0: Reg) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/s390x/inst.isle line 2925. + // Rule at src/isa/s390x/inst.isle line 2921. let expr0_0: Type = I64; let expr1_0 = UnaryOp::PopcntReg; let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; @@ -6660,7 +6671,7 @@ pub fn constructor_atomic_rmw_and( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2931. + // Rule at src/isa/s390x/inst.isle line 2927. let expr0_0: Type = I32; let expr1_0 = ALUOp::And32; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6669,7 +6680,7 @@ pub fn constructor_atomic_rmw_and( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2932. + // Rule at src/isa/s390x/inst.isle line 2928. let expr0_0: Type = I64; let expr1_0 = ALUOp::And64; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6689,7 +6700,7 @@ pub fn constructor_atomic_rmw_or( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2935. + // Rule at src/isa/s390x/inst.isle line 2931. let expr0_0: Type = I32; let expr1_0 = ALUOp::Orr32; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6698,7 +6709,7 @@ pub fn constructor_atomic_rmw_or( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2936. + // Rule at src/isa/s390x/inst.isle line 2932. let expr0_0: Type = I64; let expr1_0 = ALUOp::Orr64; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6718,7 +6729,7 @@ pub fn constructor_atomic_rmw_xor( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2939. + // Rule at src/isa/s390x/inst.isle line 2935. let expr0_0: Type = I32; let expr1_0 = ALUOp::Xor32; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6727,7 +6738,7 @@ pub fn constructor_atomic_rmw_xor( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2940. + // Rule at src/isa/s390x/inst.isle line 2936. let expr0_0: Type = I64; let expr1_0 = ALUOp::Xor64; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6747,7 +6758,7 @@ pub fn constructor_atomic_rmw_add( if pattern0_0 == I32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2943. + // Rule at src/isa/s390x/inst.isle line 2939. let expr0_0: Type = I32; let expr1_0 = ALUOp::Add32; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6756,7 +6767,7 @@ pub fn constructor_atomic_rmw_add( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2944. + // Rule at src/isa/s390x/inst.isle line 2940. let expr0_0: Type = I64; let expr1_0 = ALUOp::Add64; let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; @@ -6778,7 +6789,7 @@ pub fn constructor_atomic_cas_impl( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2950. + // Rule at src/isa/s390x/inst.isle line 2946. let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -6786,7 +6797,7 @@ pub fn constructor_atomic_cas_impl( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 2951. + // Rule at src/isa/s390x/inst.isle line 2947. let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -6808,7 +6819,7 @@ pub fn constructor_push_atomic_cas( let pattern3_0 = arg2; let pattern4_0 = arg3; let pattern5_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2954. + // Rule at src/isa/s390x/inst.isle line 2950. let expr0_0 = constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; return Some(expr0_0); @@ -6817,7 +6828,7 @@ pub fn constructor_push_atomic_cas( let pattern3_0 = arg2; let pattern4_0 = arg3; let pattern5_0 = arg4; - // Rule at src/isa/s390x/inst.isle line 2955. + // Rule at src/isa/s390x/inst.isle line 2951. let expr0_0 = constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; return Some(expr0_0); @@ -6829,12 +6840,12 @@ pub fn constructor_push_atomic_cas( pub fn constructor_fpuop2_add(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 2961. + // Rule at src/isa/s390x/inst.isle line 2957. let expr0_0 = FPUOp2::Add32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 2962. + // Rule at src/isa/s390x/inst.isle line 2958. let expr0_0 = FPUOp2::Add64; return Some(expr0_0); } @@ -6851,7 +6862,7 @@ pub fn constructor_fadd_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2965. + // Rule at src/isa/s390x/inst.isle line 2961. let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6861,12 +6872,12 @@ pub fn constructor_fadd_reg( pub fn constructor_fpuop2_sub(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 2971. + // Rule at src/isa/s390x/inst.isle line 2967. let expr0_0 = FPUOp2::Sub32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 2972. + // Rule at src/isa/s390x/inst.isle line 2968. let expr0_0 = FPUOp2::Sub64; return Some(expr0_0); } @@ -6883,7 +6894,7 @@ pub fn constructor_fsub_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2975. + // Rule at src/isa/s390x/inst.isle line 2971. let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6893,12 +6904,12 @@ pub fn constructor_fsub_reg( pub fn constructor_fpuop2_mul(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 2981. + // Rule at src/isa/s390x/inst.isle line 2977. let expr0_0 = FPUOp2::Mul32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 2982. + // Rule at src/isa/s390x/inst.isle line 2978. let expr0_0 = FPUOp2::Mul64; return Some(expr0_0); } @@ -6915,7 +6926,7 @@ pub fn constructor_fmul_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2985. + // Rule at src/isa/s390x/inst.isle line 2981. let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6925,12 +6936,12 @@ pub fn constructor_fmul_reg( pub fn constructor_fpuop2_div(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 2991. + // Rule at src/isa/s390x/inst.isle line 2987. let expr0_0 = FPUOp2::Div32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 2992. + // Rule at src/isa/s390x/inst.isle line 2988. let expr0_0 = FPUOp2::Div64; return Some(expr0_0); } @@ -6947,7 +6958,7 @@ pub fn constructor_fdiv_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 2995. + // Rule at src/isa/s390x/inst.isle line 2991. let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6957,12 +6968,12 @@ pub fn constructor_fdiv_reg( pub fn constructor_fpuop2_min(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3001. + // Rule at src/isa/s390x/inst.isle line 2997. let expr0_0 = FPUOp2::Min32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3002. + // Rule at src/isa/s390x/inst.isle line 2998. let expr0_0 = FPUOp2::Min64; return Some(expr0_0); } @@ -6979,7 +6990,7 @@ pub fn constructor_fmin_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3005. + // Rule at src/isa/s390x/inst.isle line 3001. let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -6989,12 +7000,12 @@ pub fn constructor_fmin_reg( pub fn constructor_fpuop2_max(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3011. + // Rule at src/isa/s390x/inst.isle line 3007. let expr0_0 = FPUOp2::Max32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3012. + // Rule at src/isa/s390x/inst.isle line 3008. let expr0_0 = FPUOp2::Max64; return Some(expr0_0); } @@ -7011,7 +7022,7 @@ pub fn constructor_fmax_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3015. + // Rule at src/isa/s390x/inst.isle line 3011. let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7021,12 +7032,12 @@ pub fn constructor_fmax_reg( pub fn constructor_fpuop3_fma(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3021. + // Rule at src/isa/s390x/inst.isle line 3017. let expr0_0 = FPUOp3::MAdd32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3022. + // Rule at src/isa/s390x/inst.isle line 3018. let expr0_0 = FPUOp3::MAdd64; return Some(expr0_0); } @@ -7045,7 +7056,7 @@ pub fn constructor_fma_reg( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/s390x/inst.isle line 3025. + // Rule at src/isa/s390x/inst.isle line 3021. let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rrrr( ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, @@ -7057,12 +7068,12 @@ pub fn constructor_fma_reg( pub fn constructor_fpuop1_sqrt(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3031. + // Rule at src/isa/s390x/inst.isle line 3027. let expr0_0 = FPUOp1::Sqrt32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3032. + // Rule at src/isa/s390x/inst.isle line 3028. let expr0_0 = FPUOp1::Sqrt64; return Some(expr0_0); } @@ -7073,7 +7084,7 @@ pub fn constructor_fpuop1_sqrt(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3035. + // Rule at src/isa/s390x/inst.isle line 3031. let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7083,12 +7094,12 @@ pub fn constructor_sqrt_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> O pub fn constructor_fpuop1_neg(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3041. + // Rule at src/isa/s390x/inst.isle line 3037. let expr0_0 = FPUOp1::Neg32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3042. + // Rule at src/isa/s390x/inst.isle line 3038. let expr0_0 = FPUOp1::Neg64; return Some(expr0_0); } @@ -7099,7 +7110,7 @@ pub fn constructor_fpuop1_neg(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3045. + // Rule at src/isa/s390x/inst.isle line 3041. let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7109,12 +7120,12 @@ pub fn constructor_fneg_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> O pub fn constructor_fpuop1_abs(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3051. + // Rule at src/isa/s390x/inst.isle line 3047. let expr0_0 = FPUOp1::Abs32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3052. + // Rule at src/isa/s390x/inst.isle line 3048. let expr0_0 = FPUOp1::Abs64; return Some(expr0_0); } @@ -7125,7 +7136,7 @@ pub fn constructor_fpuop1_abs(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3055. + // Rule at src/isa/s390x/inst.isle line 3051. let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7135,12 +7146,12 @@ pub fn constructor_fabs_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> O pub fn constructor_fpuroundmode_ceil(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3061. + // Rule at src/isa/s390x/inst.isle line 3057. let expr0_0 = FpuRoundMode::Plus32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3062. + // Rule at src/isa/s390x/inst.isle line 3058. let expr0_0 = FpuRoundMode::Plus64; return Some(expr0_0); } @@ -7151,7 +7162,7 @@ pub fn constructor_fpuroundmode_ceil(ctx: &mut C, arg0: Type) -> Opt pub fn constructor_ceil_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3065. + // Rule at src/isa/s390x/inst.isle line 3061. let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7161,12 +7172,12 @@ pub fn constructor_ceil_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> O pub fn constructor_fpuroundmode_floor(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3071. + // Rule at src/isa/s390x/inst.isle line 3067. let expr0_0 = FpuRoundMode::Minus32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3072. + // Rule at src/isa/s390x/inst.isle line 3068. let expr0_0 = FpuRoundMode::Minus64; return Some(expr0_0); } @@ -7177,7 +7188,7 @@ pub fn constructor_fpuroundmode_floor(ctx: &mut C, arg0: Type) -> Op pub fn constructor_floor_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3075. + // Rule at src/isa/s390x/inst.isle line 3071. let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7187,12 +7198,12 @@ pub fn constructor_floor_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> pub fn constructor_fpuroundmode_trunc(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3081. + // Rule at src/isa/s390x/inst.isle line 3077. let expr0_0 = FpuRoundMode::Zero32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3082. + // Rule at src/isa/s390x/inst.isle line 3078. let expr0_0 = FpuRoundMode::Zero64; return Some(expr0_0); } @@ -7203,7 +7214,7 @@ pub fn constructor_fpuroundmode_trunc(ctx: &mut C, arg0: Type) -> Op pub fn constructor_trunc_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3085. + // Rule at src/isa/s390x/inst.isle line 3081. let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7216,12 +7227,12 @@ pub fn constructor_fpuroundmode_nearest( ) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3091. + // Rule at src/isa/s390x/inst.isle line 3087. let expr0_0 = FpuRoundMode::Nearest32; return Some(expr0_0); } if pattern0_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3092. + // Rule at src/isa/s390x/inst.isle line 3088. let expr0_0 = FpuRoundMode::Nearest64; return Some(expr0_0); } @@ -7232,7 +7243,7 @@ pub fn constructor_fpuroundmode_nearest( pub fn constructor_nearest_reg(ctx: &mut C, arg0: Type, arg1: Reg) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/s390x/inst.isle line 3095. + // Rule at src/isa/s390x/inst.isle line 3091. let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; return Some(expr1_0); @@ -7248,7 +7259,7 @@ pub fn constructor_fpuop1_promote( if pattern0_0 == F64 { let pattern2_0 = arg1; if pattern2_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3101. + // Rule at src/isa/s390x/inst.isle line 3097. let expr0_0 = FPUOp1::Cvt32To64; return Some(expr0_0); } @@ -7266,7 +7277,7 @@ pub fn constructor_fpromote_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3104. + // Rule at src/isa/s390x/inst.isle line 3100. let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7282,7 +7293,7 @@ pub fn constructor_fpuop1_demote( if pattern0_0 == F32 { let pattern2_0 = arg1; if pattern2_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3111. + // Rule at src/isa/s390x/inst.isle line 3107. let expr0_0 = FPUOp1::Cvt64To32; return Some(expr0_0); } @@ -7300,7 +7311,7 @@ pub fn constructor_fdemote_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3114. + // Rule at src/isa/s390x/inst.isle line 3110. let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7316,12 +7327,12 @@ pub fn constructor_uint_to_fpu_op( if pattern0_0 == F32 { let pattern2_0 = arg1; if pattern2_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3121. + // Rule at src/isa/s390x/inst.isle line 3117. let expr0_0 = IntToFpuOp::U32ToF32; return Some(expr0_0); } if pattern2_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3123. + // Rule at src/isa/s390x/inst.isle line 3119. let expr0_0 = IntToFpuOp::U64ToF32; return Some(expr0_0); } @@ -7329,12 +7340,12 @@ pub fn constructor_uint_to_fpu_op( if pattern0_0 == F64 { let pattern2_0 = arg1; if pattern2_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3122. + // Rule at src/isa/s390x/inst.isle line 3118. let expr0_0 = IntToFpuOp::U32ToF64; return Some(expr0_0); } if pattern2_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3124. + // Rule at src/isa/s390x/inst.isle line 3120. let expr0_0 = IntToFpuOp::U64ToF64; return Some(expr0_0); } @@ -7352,7 +7363,7 @@ pub fn constructor_fcvt_from_uint_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3127. + // Rule at src/isa/s390x/inst.isle line 3123. let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7368,12 +7379,12 @@ pub fn constructor_sint_to_fpu_op( if pattern0_0 == F32 { let pattern2_0 = arg1; if pattern2_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3134. + // Rule at src/isa/s390x/inst.isle line 3130. let expr0_0 = IntToFpuOp::I32ToF32; return Some(expr0_0); } if pattern2_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3136. + // Rule at src/isa/s390x/inst.isle line 3132. let expr0_0 = IntToFpuOp::I64ToF32; return Some(expr0_0); } @@ -7381,12 +7392,12 @@ pub fn constructor_sint_to_fpu_op( if pattern0_0 == F64 { let pattern2_0 = arg1; if pattern2_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3135. + // Rule at src/isa/s390x/inst.isle line 3131. let expr0_0 = IntToFpuOp::I32ToF64; return Some(expr0_0); } if pattern2_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3137. + // Rule at src/isa/s390x/inst.isle line 3133. let expr0_0 = IntToFpuOp::I64ToF64; return Some(expr0_0); } @@ -7404,7 +7415,7 @@ pub fn constructor_fcvt_from_sint_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3140. + // Rule at src/isa/s390x/inst.isle line 3136. let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7420,12 +7431,12 @@ pub fn constructor_fpu_to_uint_op( if pattern0_0 == I32 { let pattern2_0 = arg1; if pattern2_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3147. + // Rule at src/isa/s390x/inst.isle line 3143. let expr0_0 = FpuToIntOp::F32ToU32; return Some(expr0_0); } if pattern2_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3148. + // Rule at src/isa/s390x/inst.isle line 3144. let expr0_0 = FpuToIntOp::F64ToU32; return Some(expr0_0); } @@ -7433,12 +7444,12 @@ pub fn constructor_fpu_to_uint_op( if pattern0_0 == I64 { let pattern2_0 = arg1; if pattern2_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3149. + // Rule at src/isa/s390x/inst.isle line 3145. let expr0_0 = FpuToIntOp::F32ToU64; return Some(expr0_0); } if pattern2_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3150. + // Rule at src/isa/s390x/inst.isle line 3146. let expr0_0 = FpuToIntOp::F64ToU64; return Some(expr0_0); } @@ -7456,7 +7467,7 @@ pub fn constructor_fcvt_to_uint_reg_with_flags( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3153. + // Rule at src/isa/s390x/inst.isle line 3149. let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7472,7 +7483,7 @@ pub fn constructor_fcvt_to_uint_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3157. + // Rule at src/isa/s390x/inst.isle line 3153. let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; return Some(expr1_0); @@ -7488,12 +7499,12 @@ pub fn constructor_fpu_to_sint_op( if pattern0_0 == I32 { let pattern2_0 = arg1; if pattern2_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3164. + // Rule at src/isa/s390x/inst.isle line 3160. let expr0_0 = FpuToIntOp::F32ToI32; return Some(expr0_0); } if pattern2_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3165. + // Rule at src/isa/s390x/inst.isle line 3161. let expr0_0 = FpuToIntOp::F64ToI32; return Some(expr0_0); } @@ -7501,12 +7512,12 @@ pub fn constructor_fpu_to_sint_op( if pattern0_0 == I64 { let pattern2_0 = arg1; if pattern2_0 == F32 { - // Rule at src/isa/s390x/inst.isle line 3166. + // Rule at src/isa/s390x/inst.isle line 3162. let expr0_0 = FpuToIntOp::F32ToI64; return Some(expr0_0); } if pattern2_0 == F64 { - // Rule at src/isa/s390x/inst.isle line 3167. + // Rule at src/isa/s390x/inst.isle line 3163. let expr0_0 = FpuToIntOp::F64ToI64; return Some(expr0_0); } @@ -7524,7 +7535,7 @@ pub fn constructor_fcvt_to_sint_reg_with_flags( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3170. + // Rule at src/isa/s390x/inst.isle line 3166. let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; return Some(expr1_0); @@ -7540,7 +7551,7 @@ pub fn constructor_fcvt_to_sint_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3174. + // Rule at src/isa/s390x/inst.isle line 3170. let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; return Some(expr1_0); @@ -7550,12 +7561,12 @@ pub fn constructor_fcvt_to_sint_reg( pub fn constructor_cmpop_cmps(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3181. + // Rule at src/isa/s390x/inst.isle line 3177. let expr0_0 = CmpOp::CmpS32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3182. + // Rule at src/isa/s390x/inst.isle line 3178. let expr0_0 = CmpOp::CmpS64; return Some(expr0_0); } @@ -7566,12 +7577,12 @@ pub fn constructor_cmpop_cmps(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3185. + // Rule at src/isa/s390x/inst.isle line 3181. let expr0_0 = CmpOp::CmpS32Ext16; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3186. + // Rule at src/isa/s390x/inst.isle line 3182. let expr0_0 = CmpOp::CmpS64Ext16; return Some(expr0_0); } @@ -7582,7 +7593,7 @@ pub fn constructor_cmpop_cmps_sext16(ctx: &mut C, arg0: Type) -> Opt pub fn constructor_cmpop_cmps_sext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3189. + // Rule at src/isa/s390x/inst.isle line 3185. let expr0_0 = CmpOp::CmpS64Ext32; return Some(expr0_0); } @@ -7599,7 +7610,7 @@ pub fn constructor_icmps_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3192. + // Rule at src/isa/s390x/inst.isle line 3188. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7615,7 +7626,7 @@ pub fn constructor_icmps_reg_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3195. + // Rule at src/isa/s390x/inst.isle line 3191. let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7631,7 +7642,7 @@ pub fn constructor_icmps_simm16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3198. + // Rule at src/isa/s390x/inst.isle line 3194. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7647,7 +7658,7 @@ pub fn constructor_icmps_simm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3201. + // Rule at src/isa/s390x/inst.isle line 3197. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7663,7 +7674,7 @@ pub fn constructor_icmps_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3204. + // Rule at src/isa/s390x/inst.isle line 3200. let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7679,7 +7690,7 @@ pub fn constructor_icmps_mem_sext16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3207. + // Rule at src/isa/s390x/inst.isle line 3203. let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7695,7 +7706,7 @@ pub fn constructor_icmps_mem_sext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3210. + // Rule at src/isa/s390x/inst.isle line 3206. let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7705,12 +7716,12 @@ pub fn constructor_icmps_mem_sext32( pub fn constructor_cmpop_cmpu(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3216. + // Rule at src/isa/s390x/inst.isle line 3212. let expr0_0 = CmpOp::CmpL32; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3217. + // Rule at src/isa/s390x/inst.isle line 3213. let expr0_0 = CmpOp::CmpL64; return Some(expr0_0); } @@ -7721,12 +7732,12 @@ pub fn constructor_cmpop_cmpu(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I32 { - // Rule at src/isa/s390x/inst.isle line 3220. + // Rule at src/isa/s390x/inst.isle line 3216. let expr0_0 = CmpOp::CmpL32Ext16; return Some(expr0_0); } if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3221. + // Rule at src/isa/s390x/inst.isle line 3217. let expr0_0 = CmpOp::CmpL64Ext16; return Some(expr0_0); } @@ -7737,7 +7748,7 @@ pub fn constructor_cmpop_cmpu_zext16(ctx: &mut C, arg0: Type) -> Opt pub fn constructor_cmpop_cmpu_zext32(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == I64 { - // Rule at src/isa/s390x/inst.isle line 3224. + // Rule at src/isa/s390x/inst.isle line 3220. let expr0_0 = CmpOp::CmpL64Ext32; return Some(expr0_0); } @@ -7754,7 +7765,7 @@ pub fn constructor_icmpu_reg( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3227. + // Rule at src/isa/s390x/inst.isle line 3223. let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7770,7 +7781,7 @@ pub fn constructor_icmpu_reg_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3230. + // Rule at src/isa/s390x/inst.isle line 3226. let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7786,7 +7797,7 @@ pub fn constructor_icmpu_uimm32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3233. + // Rule at src/isa/s390x/inst.isle line 3229. let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7802,7 +7813,7 @@ pub fn constructor_icmpu_mem( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3236. + // Rule at src/isa/s390x/inst.isle line 3232. let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7818,7 +7829,7 @@ pub fn constructor_icmpu_mem_zext16( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3239. + // Rule at src/isa/s390x/inst.isle line 3235. let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7834,7 +7845,7 @@ pub fn constructor_icmpu_mem_zext32( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3242. + // Rule at src/isa/s390x/inst.isle line 3238. let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -7851,14 +7862,14 @@ pub fn constructor_fcmp_reg( if pattern0_0 == F32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3248. + // Rule at src/isa/s390x/inst.isle line 3244. let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } if pattern0_0 == F64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/s390x/inst.isle line 3249. + // Rule at src/isa/s390x/inst.isle line 3245. let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } @@ -7873,7 +7884,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Debugtrap => { // Rule at src/isa/s390x/lower.isle line 2169. let expr0_0 = constructor_debugtrap_impl(ctx)?; @@ -7899,7 +7910,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::FuncAddr = &pattern2_0 { + if let &Opcode::FuncAddr = pattern2_0 { let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { // Rule at src/isa/s390x/lower.isle line 1159. @@ -7921,7 +7932,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::SymbolValue = &pattern2_0 { + if let &Opcode::SymbolValue = pattern2_0 { if let Some((pattern4_0, pattern4_1, pattern4_2)) = C::symbol_value_data(ctx, pattern2_1) { @@ -7949,7 +7960,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::F32const = &pattern2_0 { + if let &Opcode::F32const = pattern2_0 { let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); // Rule at src/isa/s390x/lower.isle line 29. let expr0_0: Type = F32; @@ -7962,7 +7973,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::F64const = &pattern2_0 { + if let &Opcode::F64const = pattern2_0 { let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); // Rule at src/isa/s390x/lower.isle line 35. let expr0_0: Type = F64; @@ -7975,16 +7986,16 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Trap => { // Rule at src/isa/s390x/lower.isle line 2139. - let expr0_0 = constructor_trap_impl(ctx, &pattern2_1)?; + let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; return Some(expr1_0); } &Opcode::ResumableTrap => { // Rule at src/isa/s390x/lower.isle line 2145. - let expr0_0 = constructor_trap_impl(ctx, &pattern2_1)?; + let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; return Some(expr1_0); } @@ -7996,8 +8007,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicStore = &pattern2_0 { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + if let &Opcode::AtomicStore = pattern2_0 { + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); let pattern5_0 = C::value_type(ctx, pattern4_0); if pattern5_0 == I8 { // Rule at src/isa/s390x/lower.isle line 1863. @@ -8042,9 +8053,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Store => { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); let pattern5_0 = C::value_type(ctx, pattern4_0); if pattern5_0 == I8 { // Rule at src/isa/s390x/lower.isle line 1354. @@ -8163,7 +8174,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); // Rule at src/isa/s390x/lower.isle line 1413. let expr0_0 = constructor_istore8_impl( ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, @@ -8172,7 +8183,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); // Rule at src/isa/s390x/lower.isle line 1431. let expr0_0 = constructor_istore16_impl( ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, @@ -8181,7 +8192,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); // Rule at src/isa/s390x/lower.isle line 1457. let expr0_0 = constructor_istore32_impl( ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, @@ -8196,7 +8207,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Copy => { // Rule at src/isa/s390x/lower.isle line 53. let expr0_0 = C::put_in_reg(ctx, pattern2_1); @@ -8224,7 +8235,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Trapif = &pattern2_0 { + if let &Opcode::Trapif = pattern2_0 { if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { let pattern5_0 = C::inst_data(ctx, pattern4_0); if let &InstructionData::Binary { @@ -8232,32 +8243,28 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 2181. let expr0_0: bool = false; let expr1_0 = constructor_icmp_val( - ctx, - expr0_0, - &pattern2_2, - pattern8_0, - pattern8_1, + ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, )?; - let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, &pattern2_3)?; + let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; return Some(expr3_0); } &Opcode::IaddIfcout => { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); - if let &IntCC::UnsignedGreaterThan = &pattern2_2 { + C::unpack_value_array_2(ctx, pattern6_1); + if let &IntCC::UnsignedGreaterThan = pattern2_2 { // Rule at src/isa/s390x/lower.isle line 2206. let expr0_0: u8 = 3; let expr1_0 = C::mask_as_cond(ctx, expr0_0); let expr2_0 = - constructor_trap_if_impl(ctx, &expr1_0, &pattern2_3)?; + constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; return Some(expr3_0); } @@ -8273,26 +8280,26 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Trapz => { // Rule at src/isa/s390x/lower.isle line 2151. let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; - let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, &pattern2_2)?; + let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; return Some(expr3_0); } &Opcode::Trapnz => { // Rule at src/isa/s390x/lower.isle line 2157. let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; - let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, &pattern2_2)?; + let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; return Some(expr2_0); } &Opcode::ResumableTrapnz => { // Rule at src/isa/s390x/lower.isle line 2163. let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; - let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, &pattern2_2)?; + let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; return Some(expr2_0); } @@ -8310,7 +8317,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let pattern7_0 = C::value_type(ctx, pattern5_1); if pattern7_0 == R64 { @@ -8356,7 +8363,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Popcnt = &pattern5_0 { + if let &Opcode::Popcnt = pattern5_0 { // Rule at src/isa/s390x/lower.isle line 884. let expr0_0 = C::put_in_reg(ctx, pattern5_1); let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; @@ -8369,7 +8376,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicLoad = &pattern5_0 { + if let &Opcode::AtomicLoad = pattern5_0 { // Rule at src/isa/s390x/lower.isle line 1826. let expr0_0: Type = I8; let expr1_0 = C::zero_offset(ctx); @@ -8386,7 +8393,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { // Rule at src/isa/s390x/lower.isle line 1182. let expr0_0: Type = I8; let expr1_0 = @@ -8407,7 +8414,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicLoad = &pattern5_0 { + if let &Opcode::AtomicLoad = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1834. let expr0_0 = C::zero_offset(ctx); @@ -8435,7 +8442,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1190. let expr0_0 = @@ -8465,10 +8472,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Umulhi => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 252. let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; @@ -8481,8 +8487,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 274. let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; @@ -8501,7 +8506,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitcast = &pattern5_0 { + if let &Opcode::Bitcast = pattern5_0 { let pattern7_0 = C::value_type(ctx, pattern5_1); if pattern7_0 == F32 { // Rule at src/isa/s390x/lower.isle line 1145. @@ -8520,7 +8525,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicLoad = &pattern5_0 { + if let &Opcode::AtomicLoad = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1842. let expr0_0 = C::zero_offset(ctx); @@ -8547,7 +8552,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1198. let expr0_0 = @@ -8576,10 +8581,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Umulhi => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 259. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -8591,8 +8595,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 281. let expr0_0 = C::put_in_reg(ctx, pattern7_0); let expr1_0 = C::put_in_reg(ctx, pattern7_1); @@ -8610,7 +8613,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitcast = &pattern5_0 { + if let &Opcode::Bitcast = pattern5_0 { let pattern7_0 = C::value_type(ctx, pattern5_1); if pattern7_0 == F64 { // Rule at src/isa/s390x/lower.isle line 1135. @@ -8626,7 +8629,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicLoad = &pattern5_0 { + if let &Opcode::AtomicLoad = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1850. let expr0_0 = C::zero_offset(ctx); @@ -8653,7 +8656,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1206. let expr0_0 = @@ -8684,7 +8687,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitcast = &pattern5_0 { + if let &Opcode::Bitcast = pattern5_0 { let pattern7_0 = C::value_type(ctx, pattern5_1); if pattern7_0 == I32 { // Rule at src/isa/s390x/lower.isle line 1140. @@ -8731,7 +8734,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1218. let expr0_0 = @@ -8752,7 +8755,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitcast = &pattern5_0 { + if let &Opcode::Bitcast = pattern5_0 { let pattern7_0 = C::value_type(ctx, pattern5_1); if pattern7_0 == I64 { // Rule at src/isa/s390x/lower.isle line 1131. @@ -8769,7 +8772,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Load = &pattern5_0 { + if let &Opcode::Load = pattern5_0 { if let Some(()) = C::bigendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1233. let expr0_0 = @@ -8788,7 +8791,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Null = &pattern4_0 { + if let &Opcode::Null = pattern4_0 { // Rule at src/isa/s390x/lower.isle line 41. let expr0_0: u64 = 0; let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; @@ -8800,7 +8803,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern4_0 { + if let &Opcode::Iconst = pattern4_0 { let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 15. let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; @@ -8813,7 +8816,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::StackAddr = &pattern4_0 { + if let &Opcode::StackAddr = pattern4_0 { // Rule at src/isa/s390x/lower.isle line 1152. let expr0_0 = constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; @@ -8825,7 +8828,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bconst = &pattern4_0 { + if let &Opcode::Bconst = pattern4_0 { if pattern4_1 == true { // Rule at src/isa/s390x/lower.isle line 23. let expr0_0: u64 = 1; @@ -8846,9 +8849,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern4_0 { + match pattern4_0 { &Opcode::Fadd => { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 920. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8857,7 +8860,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 927. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8866,7 +8869,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 934. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8875,7 +8878,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 941. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8884,7 +8887,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 962. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8893,7 +8896,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 948. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8902,7 +8905,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 955. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8918,10 +8921,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Fcmp = &pattern4_0 { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + if let &Opcode::Fcmp = pattern4_0 { + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 2004. - let expr0_0 = constructor_fcmp_val(ctx, &pattern4_2, pattern6_0, pattern6_1)?; + let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; let expr2_0 = C::value_reg(ctx, expr1_0); return Some(expr2_0); @@ -8932,12 +8935,12 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Icmp = &pattern4_0 { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); + if let &Opcode::Icmp = pattern4_0 { + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 1915. let expr0_0: bool = true; let expr1_0 = - constructor_icmp_val(ctx, expr0_0, &pattern4_2, pattern6_0, pattern6_1)?; + constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; let expr3_0 = C::value_reg(ctx, expr2_0); return Some(expr3_0); @@ -8947,10 +8950,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern4_0 { + match pattern4_0 { &Opcode::Select => { let (pattern6_0, pattern6_1, pattern6_2) = - C::unpack_value_array_3(ctx, &pattern4_1); + C::unpack_value_array_3(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 2046. let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8963,7 +8966,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern6_0, pattern6_1, pattern6_2) = - C::unpack_value_array_3(ctx, &pattern4_1); + C::unpack_value_array_3(ctx, pattern4_1); // Rule at src/isa/s390x/lower.isle line 969. let expr0_0 = C::put_in_reg(ctx, pattern6_0); let expr1_0 = C::put_in_reg(ctx, pattern6_1); @@ -8981,9 +8984,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::SelectifSpectreGuard = &pattern4_0 { + if let &Opcode::SelectifSpectreGuard = pattern4_0 { let (pattern6_0, pattern6_1, pattern6_2) = - C::unpack_value_array_3(ctx, &pattern4_1); + C::unpack_value_array_3(ctx, pattern4_1); if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { let pattern8_0 = C::inst_data(ctx, pattern7_0); if let &InstructionData::Binary { @@ -8991,15 +8994,15 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern4_0 { + match pattern4_0 { &Opcode::Sqrt => { // Rule at src/isa/s390x/lower.isle line 976. let expr0_0 = C::put_in_reg(ctx, pattern4_1); @@ -9132,10 +9135,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern6_0 { + match pattern6_0 { &Opcode::BandNot => { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 702. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9146,7 +9149,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 713. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9157,7 +9160,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 724. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9173,9 +9176,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitselect = &pattern6_0 { + if let &Opcode::Bitselect = pattern6_0 { let (pattern8_0, pattern8_1, pattern8_2) = - C::unpack_value_array_3(ctx, &pattern6_1); + C::unpack_value_array_3(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 735. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9192,7 +9195,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern6_0 { + match pattern6_0 { &Opcode::Bnot => { // Rule at src/isa/s390x/lower.isle line 625. let expr0_0 = C::put_in_reg(ctx, pattern6_1); @@ -9223,7 +9226,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern6_0 { + match pattern6_0 { &Opcode::BandNot => { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 706. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9325,7 +9328,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 717. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9337,7 +9340,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern8_0, pattern8_1) = - C::unpack_value_array_2(ctx, &pattern6_1); + C::unpack_value_array_2(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 728. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9354,9 +9357,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bitselect = &pattern6_0 { + if let &Opcode::Bitselect = pattern6_0 { let (pattern8_0, pattern8_1, pattern8_2) = - C::unpack_value_array_3(ctx, &pattern6_1); + C::unpack_value_array_3(ctx, pattern6_1); // Rule at src/isa/s390x/lower.isle line 742. let expr0_0 = C::put_in_reg(ctx, pattern8_0); let expr1_0 = C::put_in_reg(ctx, pattern8_1); @@ -9373,7 +9376,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bnot = &pattern6_0 { + if let &Opcode::Bnot = pattern6_0 { // Rule at src/isa/s390x/lower.isle line 630. let expr0_0 = C::put_in_reg(ctx, pattern6_1); let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; @@ -9395,7 +9398,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Iadd => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { // Rule at src/isa/s390x/lower.isle line 72. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -9550,7 +9552,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 94. @@ -9616,7 +9618,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 92. @@ -9747,7 +9749,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 113. let expr0_0 = C::put_in_reg(ctx, pattern7_0); @@ -9822,7 +9823,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 127. @@ -9888,7 +9889,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { // Rule at src/isa/s390x/lower.isle line 212. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -9963,7 +9963,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 234. @@ -10029,7 +10029,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 232. @@ -10160,7 +10160,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 303. let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; @@ -10233,8 +10232,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 375. let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; @@ -10256,8 +10254,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 326. let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; let expr1_0: u64 = 0; @@ -10278,8 +10275,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 398. let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; @@ -10301,8 +10297,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { // Rule at src/isa/s390x/lower.isle line 170. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -10319,7 +10314,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); let pattern8_0 = C::value_type(ctx, pattern7_0); if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { @@ -10495,7 +10489,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); let pattern8_0 = C::value_type(ctx, pattern7_0); if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { @@ -10603,7 +10596,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); let pattern8_0 = C::value_type(ctx, pattern7_0); if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { @@ -10703,7 +10695,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 482. let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); @@ -10792,8 +10783,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 498. let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; @@ -10813,8 +10803,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 515. let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; @@ -10840,7 +10829,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { let pattern8_0 = C::inst_data(ctx, pattern7_0); @@ -10849,7 +10838,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Rotl => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 528. let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); @@ -10966,8 +10954,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { // Rule at src/isa/s390x/lower.isle line 566. let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); @@ -10994,10 +10981,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicRmw = &pattern5_0 { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + if let &Opcode::AtomicRmw = pattern5_0 { + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(()) = C::littleendian(ctx, pattern5_2) { - match &pattern5_3 { + match pattern5_3 { &AtomicRmwOp::And => { // Rule at src/isa/s390x/lower.isle line 1505. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -11047,7 +11034,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { // Rule at src/isa/s390x/lower.isle line 1535. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -11125,13 +11112,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicCas = &pattern5_0 { + if let &Opcode::AtomicCas = pattern5_0 { let (pattern7_0, pattern7_1, pattern7_2) = - C::unpack_value_array_3(ctx, &pattern5_1); + C::unpack_value_array_3(ctx, pattern5_1); if let Some(()) = C::littleendian(ctx, pattern5_2) { // Rule at src/isa/s390x/lower.isle line 1762. let expr0_0 = C::put_in_reg(ctx, pattern7_1); @@ -11184,7 +11165,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::FcvtToUint => { let pattern7_0 = C::value_type(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 1057. @@ -11216,7 +11197,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Umulhi => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 245. let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; @@ -11284,8 +11264,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 267. let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; @@ -11298,8 +11277,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) { @@ -11332,8 +11310,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) { @@ -11374,8 +11351,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicRmw = &pattern5_0 { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + if let &Opcode::AtomicRmw = pattern5_0 { + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 1562. let expr0_0 = C::put_in_reg(ctx, pattern7_1); let expr1_0 = C::put_in_reg(ctx, pattern7_0); @@ -11389,13 +11366,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::AtomicCas = &pattern5_0 { + if let &Opcode::AtomicCas = pattern5_0 { let (pattern7_0, pattern7_1, pattern7_2) = - C::unpack_value_array_3(ctx, &pattern5_1); + C::unpack_value_array_3(ctx, pattern5_1); // Rule at src/isa/s390x/lower.isle line 1769. let expr0_0 = C::put_in_reg(ctx, pattern7_1); let expr1_0 = C::put_in_reg(ctx, pattern7_2); @@ -11453,7 +11424,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ctz => { // Rule at src/isa/s390x/lower.isle line 859. let expr0_0: Type = I64; @@ -11496,7 +11467,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Uload8 => { // Rule at src/isa/s390x/lower.isle line 1251. let expr0_0: Type = I8; @@ -11574,7 +11545,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ctz => { // Rule at src/isa/s390x/lower.isle line 874. let expr0_0 = C::put_in_reg(ctx, pattern5_1); @@ -11614,7 +11585,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Uload8 => { // Rule at src/isa/s390x/lower.isle line 1255. let expr0_0: Type = I8; @@ -11750,7 +11721,7 @@ pub fn constructor_lower_branch( destination: pattern2_2, table: pattern2_3, } => { - if let &Opcode::BrTable = &pattern2_0 { + if let &Opcode::BrTable = pattern2_0 { let pattern4_0 = arg1; // Rule at src/isa/s390x/lower.isle line 2076. let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; @@ -11777,7 +11748,7 @@ pub fn constructor_lower_branch( args: pattern2_1, destination: pattern2_2, } => { - match &pattern2_0 { + match pattern2_0 { &Opcode::Brz => { let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); let pattern5_0 = arg1; @@ -11813,7 +11784,7 @@ pub fn constructor_lower_branch( args: pattern2_1, destination: pattern2_2, } => { - if let &Opcode::Jump = &pattern2_0 { + if let &Opcode::Jump = pattern2_0 { let pattern4_0 = C::value_list_slice(ctx, pattern2_1); let pattern5_0 = arg1; // Rule at src/isa/s390x/lower.isle line 2068. @@ -11830,7 +11801,7 @@ pub fn constructor_lower_branch( cond: ref pattern2_2, destination: pattern2_3, } => { - if let &Opcode::Brif = &pattern2_0 { + if let &Opcode::Brif = pattern2_0 { let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { let pattern6_0 = C::inst_data(ctx, pattern5_0); @@ -11839,18 +11810,13 @@ pub fn constructor_lower_branch( args: ref pattern7_1, } = &pattern6_0 { - if let &Opcode::Ifcmp = &pattern7_0 { - let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + if let &Opcode::Ifcmp = pattern7_0 { + let (pattern9_0, pattern9_1) = C::unpack_value_array_2(ctx, pattern7_1); let pattern10_0 = arg1; // Rule at src/isa/s390x/lower.isle line 2131. let expr0_0: bool = false; let expr1_0 = constructor_icmp_val( - ctx, - expr0_0, - &pattern2_2, - pattern9_0, - pattern9_1, + ctx, expr0_0, pattern2_2, pattern9_0, pattern9_1, )?; let expr2_0: u8 = 0; let expr3_0 = C::vec_element(ctx, pattern10_0, expr2_0); @@ -13208,7 +13174,7 @@ pub fn constructor_icmps_val( offset: pattern8_3, } = &pattern7_0 { - match &pattern8_0 { + match pattern8_0 { &Opcode::Sload16 => { if let Some(()) = C::bigendian(ctx, pattern8_2) { // Rule at src/isa/s390x/lower.isle line 1958. @@ -13246,7 +13212,7 @@ pub fn constructor_icmps_val( offset: pattern10_3, } = &pattern9_0 { - if let &Opcode::Load = &pattern10_0 { + if let &Opcode::Load = pattern10_0 { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 1954. let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; @@ -13270,7 +13236,7 @@ pub fn constructor_icmps_val( offset: pattern10_3, } = &pattern9_0 { - if let &Opcode::Load = &pattern10_0 { + if let &Opcode::Load = pattern10_0 { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 1950. let expr0_0 = C::put_in_reg(ctx, pattern2_0); @@ -13310,7 +13276,7 @@ pub fn constructor_icmps_val( arg: pattern7_1, } = &pattern6_0 { - if let &Opcode::Sextend = &pattern7_0 { + if let &Opcode::Sextend = pattern7_0 { let pattern9_0 = C::value_type(ctx, pattern7_1); if pattern9_0 == I32 { // Rule at src/isa/s390x/lower.isle line 1940. @@ -13355,7 +13321,7 @@ pub fn constructor_icmpu_val( offset: pattern8_3, } = &pattern7_0 { - match &pattern8_0 { + match pattern8_0 { &Opcode::Uload16 => { if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { let pattern11_0 = C::inst_data(ctx, pattern10_0); @@ -13364,7 +13330,7 @@ pub fn constructor_icmpu_val( global_value: pattern12_1, } = &pattern11_0 { - if let &Opcode::SymbolValue = &pattern12_0 { + if let &Opcode::SymbolValue = pattern12_0 { if let Some((pattern14_0, pattern14_1, pattern14_2)) = C::symbol_value_data(ctx, pattern12_1) { @@ -13393,7 +13359,7 @@ pub fn constructor_icmpu_val( offset: pattern20_3, } = &pattern19_0 { - if let &Opcode::Uload16 = &pattern20_0 { + if let &Opcode::Uload16 = pattern20_0 { if let Some(()) = C::bigendian(ctx, pattern20_2) { @@ -13444,7 +13410,7 @@ pub fn constructor_icmpu_val( offset: pattern10_3, } = &pattern9_0 { - if let &Opcode::Load = &pattern10_0 { + if let &Opcode::Load = pattern10_0 { if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { let pattern13_0 = C::inst_data(ctx, pattern12_0); if let &InstructionData::UnaryGlobalValue { @@ -13452,7 +13418,7 @@ pub fn constructor_icmpu_val( global_value: pattern14_1, } = &pattern13_0 { - if let &Opcode::SymbolValue = &pattern14_0 { + if let &Opcode::SymbolValue = pattern14_0 { if let Some((pattern16_0, pattern16_1, pattern16_2)) = C::symbol_value_data(ctx, pattern14_1) { @@ -13481,7 +13447,7 @@ pub fn constructor_icmpu_val( offset: pattern22_3, } = &pattern21_0 { - if let &Opcode::Load = &pattern22_0 { + if let &Opcode::Load = pattern22_0 { if let Some(()) = C::bigendian(ctx, pattern22_2) { @@ -13521,7 +13487,7 @@ pub fn constructor_icmpu_val( offset: pattern10_3, } = &pattern9_0 { - if let &Opcode::Load = &pattern10_0 { + if let &Opcode::Load = pattern10_0 { if let Some(()) = C::bigendian(ctx, pattern10_2) { // Rule at src/isa/s390x/lower.isle line 1980. let expr0_0 = C::put_in_reg(ctx, pattern2_0); @@ -13554,7 +13520,7 @@ pub fn constructor_icmpu_val( arg: pattern7_1, } = &pattern6_0 { - if let &Opcode::Uextend = &pattern7_0 { + if let &Opcode::Uextend = pattern7_0 { let pattern9_0 = C::value_type(ctx, pattern7_1); if pattern9_0 == I32 { // Rule at src/isa/s390x/lower.isle line 1972. @@ -13608,10 +13574,10 @@ pub fn constructor_value_nonzero(ctx: &mut C, arg0: Value) -> Option args: ref pattern3_1, cond: ref pattern3_2, } => { - if let &Opcode::Fcmp = &pattern3_0 { - let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, &pattern3_1); + if let &Opcode::Fcmp = pattern3_0 { + let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); // Rule at src/isa/s390x/lower.isle line 2037. - let expr0_0 = constructor_fcmp_val(ctx, &pattern3_2, pattern5_0, pattern5_1)?; + let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; return Some(expr0_0); } } @@ -13620,12 +13586,12 @@ pub fn constructor_value_nonzero(ctx: &mut C, arg0: Value) -> Option args: ref pattern3_1, cond: ref pattern3_2, } => { - if let &Opcode::Icmp = &pattern3_0 { - let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, &pattern3_1); + if let &Opcode::Icmp = pattern3_0 { + let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); // Rule at src/isa/s390x/lower.isle line 2036. let expr0_0: bool = false; let expr1_0 = - constructor_icmp_val(ctx, expr0_0, &pattern3_2, pattern5_0, pattern5_1)?; + constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; return Some(expr1_0); } } @@ -13633,7 +13599,7 @@ pub fn constructor_value_nonzero(ctx: &mut C, arg0: Value) -> Option opcode: ref pattern3_0, arg: pattern3_1, } => { - if let &Opcode::Bint = &pattern3_0 { + if let &Opcode::Bint = pattern3_0 { // Rule at src/isa/s390x/lower.isle line 2035. let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; return Some(expr0_0); diff --git a/cranelift/codegen/src/isa/x64/inst.isle b/cranelift/codegen/src/isa/x64/inst.isle index 9ff8c22ed7..013d37e7d6 100644 --- a/cranelift/codegen/src/isa/x64/inst.isle +++ b/cranelift/codegen/src/isa/x64/inst.isle @@ -149,15 +149,41 @@ (Setcc (cc CC) (dst WritableGpr)) - ;; Integer conditional move. - ;; - ;; Overwrites the destination register. + ;; ========================================= + ;; Conditional moves. + + ;; GPR conditional move; overwrites the destination register. (Cmove (size OperandSize) (cc CC) (consequent GprMem) (alternative Gpr) (dst WritableGpr)) + ;; GPR conditional move with the `OR` of two conditions; overwrites + ;; the destination register. + (CmoveOr (size OperandSize) + (cc1 CC) + (cc2 CC) + (consequent GprMem) + (alternative Gpr) + (dst WritableGpr)) + + ;; XMM conditional move; overwrites the destination register. + (XmmCmove (size OperandSize) + (cc CC) + (consequent XmmMem) + (alternative Xmm) + (dst WritableXmm)) + + ;; XMM conditional move with the `OR` of two conditions; overwrites + ;; the destination register. + (XmmCmoveOr (size OperandSize) + (cc1 CC) + (cc2 CC) + (consequent XmmMem) + (alternative Xmm) + (dst WritableXmm)) + ;; ========================================= ;; Stack manipulation. @@ -275,14 +301,6 @@ (lhs Xmm) (rhs_dst WritableXmm)) - ;; XMM (scalar) conditional move. - ;; - ;; Overwrites the destination register if cc is set. - (XmmCmove (size OperandSize) - (cc CC) - (src XmmMem) - (dst WritableXmm)) - ;; Float comparisons/tests: cmp (b w l q) (reg addr imm) reg. (XmmCmpRmR (op SseOpcode) (src XmmMem) @@ -1027,6 +1045,17 @@ (decl xmm0 () WritableXmm) (extern constructor xmm0 xmm0) +;;;; Helpers for determining the register class of a value type ;;;;;;;;;;;;;;;; + +(decl is_xmm_type (Type) Type) +(extern extractor is_xmm_type is_xmm_type) + +(decl is_gpr_type (Type) Type) +(extern extractor is_gpr_type is_gpr_type) + +(decl is_single_register_type (Type) Type) +(extern extractor is_single_register_type is_single_register_type) + ;;;; Helpers for Querying Enabled ISA Extensions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; (decl avx512vl_enabled () Type) @@ -1256,26 +1285,28 @@ src2)) ;; Helper for creating `add` instructions whose flags are also used. -(decl add_with_flags (Type Gpr GprMemImm) ProducesFlags) -(rule (add_with_flags ty src1 src2) +(decl add_with_flags_paired (Type Gpr GprMemImm) ProducesFlags) +(rule (add_with_flags_paired ty src1 src2) (let ((dst WritableGpr (temp_writable_gpr))) - (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty) - (AluRmiROpcode.Add) - src1 - src2 - dst) - (gpr_to_reg (writable_gpr_to_gpr dst))))) + (ProducesFlags.ProducesFlagsReturnsResultWithConsumer + (MInst.AluRmiR (operand_size_of_type_32_64 ty) + (AluRmiROpcode.Add) + src1 + src2 + dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) ;; Helper for creating `adc` instructions. -(decl adc (Type Gpr GprMemImm) ConsumesFlags) -(rule (adc ty src1 src2) +(decl adc_paired (Type Gpr GprMemImm) ConsumesFlags) +(rule (adc_paired ty src1 src2) (let ((dst WritableGpr (temp_writable_gpr))) - (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty) - (AluRmiROpcode.Adc) - src1 - src2 - dst) - (gpr_to_reg (writable_gpr_to_gpr dst))))) + (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer + (MInst.AluRmiR (operand_size_of_type_32_64 ty) + (AluRmiROpcode.Adc) + src1 + src2 + dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) ;; Helper for emitting `sub` instructions. (decl sub (Type Gpr GprMemImm) Gpr) @@ -1286,26 +1317,28 @@ src2)) ;; Helper for creating `sub` instructions whose flags are also used. -(decl sub_with_flags (Type Gpr GprMemImm) ProducesFlags) -(rule (sub_with_flags ty src1 src2) +(decl sub_with_flags_paired (Type Gpr GprMemImm) ProducesFlags) +(rule (sub_with_flags_paired ty src1 src2) (let ((dst WritableGpr (temp_writable_gpr))) - (ProducesFlags.ProducesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty) - (AluRmiROpcode.Sub) - src1 - src2 - dst) - (gpr_to_reg (writable_gpr_to_gpr dst))))) + (ProducesFlags.ProducesFlagsReturnsResultWithConsumer + (MInst.AluRmiR (operand_size_of_type_32_64 ty) + (AluRmiROpcode.Sub) + src1 + src2 + dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) ;; Helper for creating `sbb` instructions. -(decl sbb (Type Gpr GprMemImm) ConsumesFlags) -(rule (sbb ty src1 src2) +(decl sbb_paired (Type Gpr GprMemImm) ConsumesFlags) +(rule (sbb_paired ty src1 src2) (let ((dst WritableGpr (temp_writable_gpr))) - (ConsumesFlags.ConsumesFlags (MInst.AluRmiR (operand_size_of_type_32_64 ty) - (AluRmiROpcode.Sbb) - src1 - src2 - dst) - (gpr_to_reg (writable_gpr_to_gpr dst))))) + (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer + (MInst.AluRmiR (operand_size_of_type_32_64 ty) + (AluRmiROpcode.Sbb) + src1 + src2 + dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) ;; Helper for creating `mul` instructions. (decl mul (Type Gpr GprMemImm) Gpr) @@ -1456,29 +1489,128 @@ ;; Helper for creating `MInst.CmpRmiR` instructions. (decl cmp_rmi_r (OperandSize CmpOpcode GprMemImm Gpr) ProducesFlags) (rule (cmp_rmi_r size opcode src1 src2) - (ProducesFlags.ProducesFlags (MInst.CmpRmiR size - opcode - src1 - src2) - (invalid_reg))) + (ProducesFlags.ProducesFlagsSideEffect + (MInst.CmpRmiR size + opcode + src1 + src2))) ;; Helper for creating `cmp` instructions. (decl cmp (OperandSize GprMemImm Gpr) ProducesFlags) (rule (cmp size src1 src2) (cmp_rmi_r size (CmpOpcode.Cmp) src1 src2)) +;; Helper for creating `MInst.XmmCmpRmR` instructions. +(decl xmm_cmp_rm_r (SseOpcode XmmMem Xmm) ProducesFlags) +(rule (xmm_cmp_rm_r opcode src1 src2) + (ProducesFlags.ProducesFlagsSideEffect + (MInst.XmmCmpRmR opcode src1 src2))) + +;; Helper for creating `fpcmp` instructions (cannot use `fcmp` as it is taken by +;; `clif.isle`). +(decl fpcmp (Value Value) ProducesFlags) +(rule (fpcmp src1 @ (value_type $F32) src2) + (xmm_cmp_rm_r (SseOpcode.Ucomiss) (put_in_xmm_mem src1) (put_in_xmm src2))) +(rule (fpcmp src1 @ (value_type $F64) src2) + (xmm_cmp_rm_r (SseOpcode.Ucomisd) (put_in_xmm_mem src1) (put_in_xmm src2))) + ;; Helper for creating `test` instructions. (decl test (OperandSize GprMemImm Gpr) ProducesFlags) (rule (test size src1 src2) (cmp_rmi_r size (CmpOpcode.Test) src1 src2)) -;; Helper for creating `MInst.Cmove` instructions. +;; Helper for creating `cmove` instructions. Note that these instructions do not +;; always result in a single emitted x86 instruction; e.g., XmmCmove uses jumps +;; to conditionally move the selected value into an XMM register. (decl cmove (Type CC GprMem Gpr) ConsumesFlags) (rule (cmove ty cc consequent alternative) (let ((dst WritableGpr (temp_writable_gpr)) (size OperandSize (operand_size_of_type_32_64 ty))) - (ConsumesFlags.ConsumesFlags (MInst.Cmove size cc consequent alternative dst) - (gpr_to_reg (writable_gpr_to_gpr dst))))) + (ConsumesFlags.ConsumesFlagsReturnsReg + (MInst.Cmove size cc consequent alternative dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) + +(decl cmove_xmm (Type CC XmmMem Xmm) ConsumesFlags) +(rule (cmove_xmm ty cc consequent alternative) + (let ((dst WritableXmm (temp_writable_xmm)) + (size OperandSize (operand_size_of_type_32_64 ty))) + (ConsumesFlags.ConsumesFlagsReturnsReg + (MInst.XmmCmove size cc consequent alternative dst) + (xmm_to_reg (writable_xmm_to_xmm dst))))) + +;; Helper for creating `cmove` instructions directly from values. This allows us +;; to special-case the `I128` types and default to the `cmove` helper otherwise. +;; It also eliminates some `put_in_reg*` boilerplate in the lowering ISLE code. +(decl cmove_from_values (Type CC Value Value) ConsumesFlags) +(rule (cmove_from_values $I128 cc consequent alternative) + (let ((cons ValueRegs (put_in_regs consequent)) + (alt ValueRegs (put_in_regs alternative)) + (dst1 WritableGpr (temp_writable_gpr)) + (dst2 WritableGpr (temp_writable_gpr)) + (size OperandSize (OperandSize.Size64)) + (lower_cmove MInst (MInst.Cmove + size cc + (gpr_to_gpr_mem (value_regs_get_gpr cons 0)) + (value_regs_get_gpr alt 0) dst1)) + (upper_cmove MInst (MInst.Cmove + size cc + (gpr_to_gpr_mem (value_regs_get_gpr cons 1)) + (value_regs_get_gpr alt 1) dst2))) + (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs + lower_cmove + upper_cmove + (value_regs + (gpr_to_reg (writable_gpr_to_gpr dst1)) + (gpr_to_reg (writable_gpr_to_gpr dst2)))))) + +(rule (cmove_from_values (is_gpr_type (is_single_register_type ty)) cc consequent alternative) + (cmove ty cc (put_in_gpr_mem consequent) (put_in_gpr alternative))) + +(rule (cmove_from_values (is_xmm_type (is_single_register_type ty)) cc consequent alternative) + (cmove_xmm ty cc (put_in_xmm_mem consequent) (put_in_xmm alternative))) + +;; Helper for creating `cmove` instructions with the logical OR of multiple +;; flags. Note that these instructions will always result in more than one +;; emitted x86 instruction. +(decl cmove_or (Type CC CC GprMem Gpr) ConsumesFlags) +(rule (cmove_or ty cc1 cc2 consequent alternative) + (let ((dst WritableGpr (temp_writable_gpr)) + (size OperandSize (operand_size_of_type_32_64 ty))) + (ConsumesFlags.ConsumesFlagsReturnsReg + (MInst.CmoveOr size cc1 cc2 consequent alternative dst) + (gpr_to_reg (writable_gpr_to_gpr dst))))) + +(decl cmove_or_xmm (Type CC CC XmmMem Xmm) ConsumesFlags) +(rule (cmove_or_xmm ty cc1 cc2 consequent alternative) + (let ((dst WritableXmm (temp_writable_xmm)) + (size OperandSize (operand_size_of_type_32_64 ty))) + (ConsumesFlags.ConsumesFlagsReturnsReg + (MInst.XmmCmoveOr size cc1 cc2 consequent alternative dst) + (xmm_to_reg (writable_xmm_to_xmm dst))))) + +;; Helper for creating `cmove_or` instructions directly from values. This allows +;; us to special-case the `I128` types and default to the `cmove_or` helper +;; otherwise. +(decl cmove_or_from_values (Type CC CC Value Value) ConsumesFlags) +(rule (cmove_or_from_values $I128 cc1 cc2 consequent alternative) + (let ((cons ValueRegs (put_in_regs consequent)) + (alt ValueRegs (put_in_regs alternative)) + (dst1 WritableGpr (temp_writable_gpr)) + (dst2 WritableGpr (temp_writable_gpr)) + (size OperandSize (OperandSize.Size64)) + (lower_cmove MInst (MInst.CmoveOr size cc1 cc2 (gpr_to_gpr_mem (value_regs_get_gpr cons 0)) (value_regs_get_gpr alt 0) dst1)) + (upper_cmove MInst (MInst.CmoveOr size cc1 cc2 (gpr_to_gpr_mem (value_regs_get_gpr cons 1)) (value_regs_get_gpr alt 1) dst2))) + (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs + lower_cmove + upper_cmove + (value_regs (gpr_to_reg (writable_gpr_to_gpr dst1)) + (gpr_to_reg (writable_gpr_to_gpr dst2)))))) + +(rule (cmove_or_from_values (is_gpr_type (is_single_register_type ty)) cc1 cc2 consequent alternative) + (cmove_or ty cc1 cc2 (put_in_gpr_mem consequent) (put_in_gpr alternative))) + +(rule (cmove_or_from_values (is_xmm_type (is_single_register_type ty)) cc1 cc2 consequent alternative) + (cmove_or_xmm ty cc1 cc2 (put_in_xmm_mem consequent) (put_in_xmm alternative))) ;; Helper for creating `MInst.MovzxRmR` instructions. (decl movzx (Type ExtMode GprMem) Gpr) diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs index c8a8ca71be..4bd8fb5d70 100644 --- a/cranelift/codegen/src/isa/x64/inst/emit.rs +++ b/cranelift/codegen/src/isa/x64/inst/emit.rs @@ -1064,9 +1064,9 @@ pub(crate) fn emit( cc, consequent, alternative, - dst: reg_g, + dst, } => { - debug_assert_eq!(*alternative, reg_g.to_reg()); + debug_assert_eq!(*alternative, dst.to_reg()); let rex_flags = RexFlags::from(*size); let prefix = match size { OperandSize::Size16 => LegacyPrefixes::_66, @@ -1076,14 +1076,14 @@ pub(crate) fn emit( }; let opcode = 0x0F40 + cc.get_enc() as u32; match consequent.clone().to_reg_mem() { - RegMem::Reg { reg: reg_e } => { + RegMem::Reg { reg } => { emit_std_reg_reg( sink, prefix, opcode, 2, - reg_g.to_reg().to_reg(), - reg_e, + dst.to_reg().to_reg(), + reg, rex_flags, ); } @@ -1096,7 +1096,7 @@ pub(crate) fn emit( prefix, opcode, 2, - reg_g.to_reg().to_reg(), + dst.to_reg().to_reg(), addr, rex_flags, ); @@ -1104,7 +1104,42 @@ pub(crate) fn emit( } } - Inst::XmmCmove { size, cc, src, dst } => { + Inst::CmoveOr { + size, + cc1, + cc2, + consequent, + alternative, + dst, + } => { + let first_cmove = Inst::Cmove { + cc: *cc1, + size: *size, + consequent: consequent.clone(), + alternative: alternative.clone(), + dst: dst.clone(), + }; + first_cmove.emit(sink, info, state); + + let second_cmove = Inst::Cmove { + cc: *cc2, + size: *size, + consequent: consequent.clone(), + alternative: alternative.clone(), + dst: dst.clone(), + }; + second_cmove.emit(sink, info, state); + } + + Inst::XmmCmove { + size, + cc, + consequent, + alternative, + dst, + } => { + debug_assert_eq!(*alternative, dst.to_reg()); + // Lowering of the Select IR opcode when the input is an fcmp relies on the fact that // this doesn't clobber flags. Make sure to not do so here. let next = sink.get_label(); @@ -1117,12 +1152,46 @@ pub(crate) fn emit( } else { SseOpcode::Movss }; - let inst = Inst::xmm_unary_rm_r(op, src.clone().to_reg_mem(), dst.to_writable_reg()); + let inst = + Inst::xmm_unary_rm_r(op, consequent.clone().to_reg_mem(), dst.to_writable_reg()); inst.emit(sink, info, state); sink.bind_label(next); } + Inst::XmmCmoveOr { + size, + cc1, + cc2, + consequent, + alternative, + dst, + } => { + debug_assert_eq!(*alternative, dst.to_reg()); + + let op = if *size == OperandSize::Size64 { + SseOpcode::Movsd + } else { + SseOpcode::Movss + }; + let second_test = sink.get_label(); + let next_instruction = sink.get_label(); + + // Jump to second test if `cc1` is *not* set. + one_way_jmp(sink, cc1.invert(), next_instruction); + let inst = + Inst::xmm_unary_rm_r(op, consequent.clone().to_reg_mem(), dst.to_writable_reg()); + inst.emit(sink, info, state); + sink.bind_label(second_test); + + // Jump to next instruction if `cc2` is *not* set. + one_way_jmp(sink, cc2.invert(), next_instruction); + let inst = + Inst::xmm_unary_rm_r(op, consequent.clone().to_reg_mem(), dst.to_writable_reg()); + inst.emit(sink, info, state); + sink.bind_label(next_instruction); + } + Inst::Push64 { src } => { if info.flags.enable_probestack() { sink.add_trap(state.cur_srcloc(), TrapCode::StackOverflow); diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs index 20b02f2280..6532f23273 100644 --- a/cranelift/codegen/src/isa/x64/inst/mod.rs +++ b/cranelift/codegen/src/isa/x64/inst/mod.rs @@ -52,6 +52,7 @@ impl Inst { | Inst::CallUnknown { .. } | Inst::CheckedDivOrRemSeq { .. } | Inst::Cmove { .. } + | Inst::CmoveOr { .. } | Inst::CmpRmiR { .. } | Inst::CvtFloatToSintSeq { .. } | Inst::CvtFloatToUintSeq { .. } @@ -88,6 +89,7 @@ impl Inst { | Inst::Ud2 { .. } | Inst::VirtualSPOffsetAdj { .. } | Inst::XmmCmove { .. } + | Inst::XmmCmoveOr { .. } | Inst::XmmCmpRmR { .. } | Inst::XmmLoadConst { .. } | Inst::XmmMinMaxSeq { .. } @@ -629,7 +631,13 @@ impl Inst { debug_assert!(dst.to_reg().get_class() == RegClass::V128); let src = XmmMem::new(src).unwrap(); let dst = WritableXmm::from_writable_reg(dst).unwrap(); - Inst::XmmCmove { size, cc, src, dst } + Inst::XmmCmove { + size, + cc, + consequent: src, + alternative: dst.to_reg(), + dst, + } } pub(crate) fn push64(src: RegMemImm) -> Inst { @@ -898,6 +906,12 @@ impl Inst { alternative, dst, .. + } + | Inst::CmoveOr { + size, + alternative, + dst, + .. } => { if *alternative != dst.to_reg() { debug_assert!(alternative.is_virtual()); @@ -910,6 +924,23 @@ impl Inst { } insts.push(self); } + Inst::XmmCmove { + alternative, dst, .. + } + | Inst::XmmCmoveOr { + alternative, dst, .. + } => { + if *alternative != dst.to_reg() { + debug_assert!(alternative.is_virtual()); + insts.push(Self::gen_move( + dst.to_writable_reg(), + alternative.to_reg(), + types::F32X4, + )); + *alternative = dst.to_reg(); + } + insts.push(self); + } Inst::Not { src, dst, .. } | Inst::Neg { src, dst, .. } => { if *src != dst.to_reg() { debug_assert!(src.is_virtual()); @@ -1588,7 +1619,34 @@ impl PrettyPrint for Inst { show_ireg_sized(dst.to_reg().to_reg(), mb_rru, size.to_bytes()) ), - Inst::XmmCmove { size, cc, src, dst } => { + Inst::CmoveOr { + size, + cc1, + cc2, + consequent: src, + alternative: _, + dst, + } => { + let src = src.show_rru_sized(mb_rru, size.to_bytes()); + let dst = show_ireg_sized(dst.to_reg().to_reg(), mb_rru, size.to_bytes()); + format!( + "{} {}, {}; {} {}, {}", + ljustify(format!("cmov{}{}", cc1.to_string(), suffix_bwlq(*size))), + src, + dst, + ljustify(format!("cmov{}{}", cc2.to_string(), suffix_bwlq(*size))), + src, + dst, + ) + } + + Inst::XmmCmove { + size, + cc, + consequent: src, + dst, + .. + } => { format!( "j{} $next; mov{} {}, {}; $next: ", cc.invert().to_string(), @@ -1602,6 +1660,34 @@ impl PrettyPrint for Inst { ) } + Inst::XmmCmoveOr { + size, + cc1, + cc2, + consequent: src, + dst, + .. + } => { + let suffix = if *size == OperandSize::Size64 { + "sd" + } else { + "ss" + }; + let src = src.show_rru_sized(mb_rru, size.to_bytes()); + let dst = show_ireg_sized(dst.to_reg().to_reg(), mb_rru, size.to_bytes()); + format!( + "j{} $check; mov{} {}, {}; $check: j{} $next; mov{} {}, {}; $next", + cc1.invert().to_string(), + suffix, + src, + dst, + cc2.invert().to_string(), + suffix, + src, + dst, + ) + } + Inst::Push64 { src } => { format!("{} {}", ljustify("pushq".to_string()), src.show_rru(mb_rru)) } @@ -2000,11 +2086,25 @@ fn x64_get_regs(inst: &Inst, collector: &mut RegUsageCollector) { consequent: src, dst, .. + } + | Inst::CmoveOr { + consequent: src, + dst, + .. } => { src.get_regs_as_uses(collector); collector.add_mod(dst.to_writable_reg()); } - Inst::XmmCmove { src, dst, .. } => { + Inst::XmmCmove { + consequent: src, + dst, + .. + } + | Inst::XmmCmoveOr { + consequent: src, + dst, + .. + } => { src.get_regs_as_uses(collector); collector.add_mod(dst.to_writable_reg()); } @@ -2454,18 +2554,32 @@ pub(crate) fn x64_map_regs(inst: &mut Inst, mapper: &RM) { ref mut dst, ref mut alternative, .. + } + | Inst::CmoveOr { + consequent: ref mut src, + ref mut dst, + ref mut alternative, + .. } => { src.map_uses(mapper); dst.map_mod(mapper); *alternative = dst.to_reg(); } Inst::XmmCmove { - ref mut src, + consequent: ref mut src, ref mut dst, + ref mut alternative, + .. + } + | Inst::XmmCmoveOr { + consequent: ref mut src, + ref mut dst, + ref mut alternative, .. } => { src.map_uses(mapper); dst.map_mod(mapper); + *alternative = dst.to_reg(); } Inst::Push64 { ref mut src } => src.map_uses(mapper), Inst::Pop64 { ref mut dst } => { diff --git a/cranelift/codegen/src/isa/x64/lower.isle b/cranelift/codegen/src/isa/x64/lower.isle index 78d0bada8c..9c3a4a1aa8 100644 --- a/cranelift/codegen/src/isa/x64/lower.isle +++ b/cranelift/codegen/src/isa/x64/lower.isle @@ -124,8 +124,8 @@ (y_lo Gpr (value_regs_get_gpr y_regs 0)) (y_hi Gpr (value_regs_get_gpr y_regs 1))) ;; Do an add followed by an add-with-carry. - (with_flags (add_with_flags $I64 x_lo (gpr_to_gpr_mem_imm y_lo)) - (adc $I64 x_hi (gpr_to_gpr_mem_imm y_hi)))))) + (with_flags (add_with_flags_paired $I64 x_lo (gpr_to_gpr_mem_imm y_lo)) + (adc_paired $I64 x_hi (gpr_to_gpr_mem_imm y_hi)))))) ;;;; Rules for `sadd_sat` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -225,8 +225,8 @@ (let ((y_regs ValueRegs (put_in_regs y)) (y_lo Gpr (value_regs_get_gpr y_regs 0)) (y_hi Gpr (value_regs_get_gpr y_regs 1))) - (with_flags (add_with_flags $I64 y_lo x) - (adc $I64 y_hi (gpr_mem_imm_new (RegMemImm.Imm 0)))))) + (with_flags (add_with_flags_paired $I64 y_lo x) + (adc_paired $I64 y_hi (gpr_mem_imm_new (RegMemImm.Imm 0)))))) ;; Otherwise, put the immediate into a register. (rule (lower (has_type $I128 (iadd_imm y (u64_from_imm64 x)))) @@ -234,8 +234,8 @@ (y_lo Gpr (value_regs_get_gpr y_regs 0)) (y_hi Gpr (value_regs_get_gpr y_regs 1)) (x_lo Gpr (gpr_new (imm $I64 x)))) - (with_flags (add_with_flags $I64 y_lo (gpr_to_gpr_mem_imm x_lo)) - (adc $I64 y_hi (gpr_mem_imm_new (RegMemImm.Imm 0)))))) + (with_flags (add_with_flags_paired $I64 y_lo (gpr_to_gpr_mem_imm x_lo)) + (adc_paired $I64 y_hi (gpr_mem_imm_new (RegMemImm.Imm 0)))))) ;;;; Rules for `isub` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -293,8 +293,8 @@ (y_lo Gpr (value_regs_get_gpr y_regs 0)) (y_hi Gpr (value_regs_get_gpr y_regs 1))) ;; Do a sub followed by an sub-with-borrow. - (with_flags (sub_with_flags $I64 x_lo (gpr_to_gpr_mem_imm y_lo)) - (sbb $I64 x_hi (gpr_to_gpr_mem_imm y_hi)))))) + (with_flags (sub_with_flags_paired $I64 x_lo (gpr_to_gpr_mem_imm y_lo)) + (sbb_paired $I64 x_hi (gpr_to_gpr_mem_imm y_hi)))))) ;;;; Rules for `ssub_sat` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -562,7 +562,7 @@ (gpr_to_gpr_mem_imm amt))))) (zero Gpr (gpr_new (imm $I64 0))) ;; Nullify the carry if we are shifting in by a multiple of 128. - (carry_ Gpr (gpr_new (with_flags_1 (test (OperandSize.Size64) + (carry_ Gpr (gpr_new (with_flags_reg (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 127)) amt) (cmove $I64 @@ -574,11 +574,10 @@ ;; Combine the two shifted halves. However, if we are shifting by >= 64 ;; (modulo 128), then the low bits are zero and the high bits are our ;; low bits. - (with_flags_2 (test (OperandSize.Size64) - (gpr_mem_imm_new (RegMemImm.Imm 64)) - amt) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted) zero) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted_) lo_shifted)))) + (with_flags (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 64)) amt) + (consumes_flags_concat + (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted) zero) + (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted_) lo_shifted))))) (rule (lower (has_type $I128 (ishl src amt))) ;; NB: Only the low bits of `amt` matter since we logically mask the shift @@ -674,23 +673,17 @@ (gpr_new (imm $I64 64)) (gpr_to_gpr_mem_imm amt))))) ;; Nullify the carry if we are shifting by a multiple of 128. - (carry_ Gpr (gpr_new (with_flags_1 (test (OperandSize.Size64) - (gpr_mem_imm_new (RegMemImm.Imm 127)) - amt) - (cmove $I64 - (CC.Z) - (gpr_to_gpr_mem (gpr_new (imm $I64 0))) - carry)))) + (carry_ Gpr (gpr_new (with_flags_reg (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 127)) amt) + (cmove $I64 (CC.Z) (gpr_to_gpr_mem (gpr_new (imm $I64 0))) carry)))) ;; Add the carry bits into the lo. (lo_shifted_ Gpr (or $I64 carry_ (gpr_to_gpr_mem_imm lo_shifted)))) ;; Combine the two shifted halves. However, if we are shifting by >= 64 ;; (modulo 128), then the hi bits are zero and the lo bits are what ;; would otherwise be our hi bits. - (with_flags_2 (test (OperandSize.Size64) - (gpr_mem_imm_new (RegMemImm.Imm 64)) - amt) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted_) hi_shifted) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted) (gpr_new (imm $I64 0)))))) + (with_flags (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 64)) amt) + (consumes_flags_concat + (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted_) hi_shifted) + (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted) (gpr_new (imm $I64 0))))))) (rule (lower (has_type $I128 (ushr src amt))) ;; NB: Only the low bits of `amt` matter since we logically mask the shift @@ -787,13 +780,8 @@ (gpr_new (imm $I64 64)) (gpr_to_gpr_mem_imm amt))))) ;; Nullify the carry if we are shifting by a multiple of 128. - (carry_ Gpr (gpr_new (with_flags_1 (test (OperandSize.Size64) - (gpr_mem_imm_new (RegMemImm.Imm 127)) - amt) - (cmove $I64 - (CC.Z) - (gpr_to_gpr_mem (gpr_new (imm $I64 0))) - carry)))) + (carry_ Gpr (gpr_new (with_flags_reg (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 127)) amt) + (cmove $I64 (CC.Z) (gpr_to_gpr_mem (gpr_new (imm $I64 0))) carry)))) ;; Add the carry into the low half. (lo_shifted_ Gpr (or $I64 lo_shifted (gpr_to_gpr_mem_imm carry_))) ;; Get all sign bits. @@ -801,11 +789,10 @@ ;; Combine the two shifted halves. However, if we are shifting by >= 64 ;; (modulo 128), then the hi bits are all sign bits and the lo bits are ;; what would otherwise be our hi bits. - (with_flags_2 (test (OperandSize.Size64) - (gpr_mem_imm_new (RegMemImm.Imm 64)) - amt) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted_) hi_shifted) - (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted) sign_bits)))) + (with_flags (test (OperandSize.Size64) (gpr_mem_imm_new (RegMemImm.Imm 64)) amt) + (consumes_flags_concat + (cmove $I64 (CC.Z) (gpr_to_gpr_mem lo_shifted_) hi_shifted) + (cmove $I64 (CC.Z) (gpr_to_gpr_mem hi_shifted) sign_bits))))) (rule (lower (has_type $I128 (sshr src amt))) ;; NB: Only the low bits of `amt` matter since we logically mask the shift @@ -1468,7 +1455,7 @@ (let ((x_reg Gpr (put_in_gpr x)) (y_reg Gpr (put_in_gpr y)) (size OperandSize (raw_operand_size_of_type ty))) - (value_reg (with_flags_1 (cmp size (gpr_to_gpr_mem_imm x_reg) y_reg) + (value_reg (with_flags_reg (cmp size (gpr_to_gpr_mem_imm x_reg) y_reg) (cmove ty cc (gpr_to_gpr_mem y_reg) x_reg))))) (rule (lower (has_type (fits_in_64 ty) (umin x y))) @@ -1536,3 +1523,90 @@ (rule (lower (resumable_trap code)) (safepoint (ud2 code))) + +;;;; Rules for `select` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +;; CLIF `select` instructions receive a testable argument (i.e. boolean or +;; integer) that determines which of the other two arguments is selected as +;; output. Since Cranelift booleans are typically generated by a comparison, the +;; lowerings in this section "look upwards in the tree" to emit the proper +;; sequence of "selection" instructions. +;; +;; The following rules--for selecting on a floating-point comparison--emit a +;; `UCOMIS*` instruction and then a conditional move, `cmove`. Note that for +;; values contained in XMM registers, `cmove` and `cmove_or` may in fact emit a +;; jump sequence, not `CMOV`. The `cmove` instruction operates on the flags set +;; by `UCOMIS*`; the key to understanding these is the UCOMIS* documentation +;; (see Intel's Software Developer's Manual, volume 2, chapter 4): +;; - unordered assigns Z = 1, P = 1, C = 1 +;; - greater than assigns Z = 0, P = 0, C = 0 +;; - less than assigns Z = 0, P = 0, C = 1 +;; - equal assigns Z = 1, P = 0, C = 0 +;; +;; Note that prefixing the flag with `N` means "not," so that `CC.P -> P = 1` +;; and `CC.NP -> P = 0`. Also, x86 uses mnemonics for certain combinations of +;; flags; e.g.: +;; - `CC.B -> C = 1` (below) +;; - `CC.NB -> C = 0` (not below) +;; - `CC.BE -> C = 1 OR Z = 1` (below or equal) +;; - `CC.NBE -> C = 0 AND Z = 0` (not below or equal) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.Ordered) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.NP) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.Unordered) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.P) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.GreaterThan) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.NBE) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.GreaterThanOrEqual) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.NB) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.UnorderedOrLessThan) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.B) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.UnorderedOrLessThanOrEqual) a b)) x y))) + (with_flags (fpcmp b a) (cmove_from_values ty (CC.BE) x y))) + +;; Certain FloatCC variants are implemented by flipping the operands of the +;; comparison (e.g., "greater than" is lowered the same as "less than" but the +;; comparison is reversed). This allows us to use a single flag for the `cmove`, +;; which involves fewer instructions than `cmove_or`. +;; +;; But why flip at all, you may ask? Can't we just use `CC.B` (i.e., below) for +;; `FloatCC.LessThan`? Recall that in these floating-point lowerings, values may +;; be unordered and we must we want to express that `FloatCC.LessThan` is `LT`, +;; not `LT | UNO`. By flipping the operands AND inverting the comparison (e.g., +;; to `CC.NBE`), we also avoid these unordered cases. + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.LessThan) a b)) x y))) + (with_flags (fpcmp a b) (cmove_from_values ty (CC.NBE) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.LessThanOrEqual) a b)) x y))) + (with_flags (fpcmp a b) (cmove_from_values ty (CC.NB) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.UnorderedOrGreaterThan) a b)) x y))) + (with_flags (fpcmp a b) (cmove_from_values ty (CC.B) x y))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.UnorderedOrGreaterThanOrEqual) a b)) x y))) + (with_flags (fpcmp a b) (cmove_from_values ty (CC.BE) x y))) + +;; `FloatCC.Equal` and `FloatCC.NotEqual` can only be implemented with multiple +;; flag checks. Recall from the flag assignment chart above that equality, e.g., +;; will assign `Z = 1`. But so does an unordered comparison: `Z = 1, P = 1, C = +;; 1`. In order to avoid semantics like `EQ | UNO` for equality, we must ensure +;; that the values are actually ordered, checking that `P = 0` (note that the +;; `C` flag is irrelevant here). Since we cannot find a single instruction that +;; implements a `Z = 1 AND P = 0` check, we invert the flag checks (i.e., `Z = 1 +;; AND P = 0` becomes `Z = 0 OR P = 1`) and also flip the select operands, `x` +;; and `y`. The same argument applies to `FloatCC.NotEqual`. +;; +;; More details about the CLIF semantics for `fcmp` are available at +;; https://docs.rs/cranelift-codegen/latest/cranelift_codegen/ir/trait.InstBuilder.html#method.fcmp. + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.Equal) a b)) x y))) + (with_flags (fpcmp a b) (cmove_or_from_values ty (CC.NZ) (CC.P) y x))) + +(rule (lower (has_type ty (select (def_inst (fcmp (FloatCC.NotEqual) a b)) x y))) + (with_flags (fpcmp a b) (cmove_or_from_values ty (CC.NZ) (CC.P) x y))) diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs index 3e74dddda9..d5de080132 100644 --- a/cranelift/codegen/src/isa/x64/lower.rs +++ b/cranelift/codegen/src/isa/x64/lower.rs @@ -530,6 +530,7 @@ enum FcmpSpec { /// This is useful in contexts where it is hard/inefficient to produce a single instruction (or /// sequence of instructions) that check for an "AND" combination of condition codes; see for /// instance lowering of Select. + #[allow(dead_code)] InvertEqual, } @@ -4252,80 +4253,8 @@ fn lower_insn_to_regs>( Opcode::Select => { let flag_input = inputs[0]; - if let Some(fcmp) = matches_input(ctx, flag_input, Opcode::Fcmp) { - let cond_code = ctx.data(fcmp).fp_cond_code().unwrap(); - - // For equal, we flip the operands, because we can't test a conjunction of - // CPU flags with a single cmove; see InvertedEqualOrConditions doc comment. - let (lhs_input, rhs_input) = match cond_code { - FloatCC::Equal => (inputs[2], inputs[1]), - _ => (inputs[1], inputs[2]), - }; - - let ty = ctx.output_ty(insn, 0); - let rhs = put_input_in_regs(ctx, rhs_input); - let dst = get_output_reg(ctx, outputs[0]); - let lhs = put_input_in_regs(ctx, lhs_input); - - // We request inversion of Equal to NotEqual here: taking LHS if equal would mean - // take it if both CC::NP and CC::Z are set, the conjunction of which can't be - // modeled with a single cmov instruction. Instead, we'll swap LHS and RHS in the - // select operation, and invert the equal to a not-equal here. - let fcmp_results = emit_fcmp(ctx, fcmp, cond_code, FcmpSpec::InvertEqual); - - if let FcmpCondResult::InvertedEqualOrConditions(_, _) = &fcmp_results { - // Keep this sync'd with the lowering of the select inputs above. - assert_eq!(cond_code, FloatCC::Equal); - } - - emit_moves(ctx, dst, rhs, ty); - - let operand_size = if ty == types::F64 { - OperandSize::Size64 - } else { - OperandSize::Size32 - }; - match fcmp_results { - FcmpCondResult::Condition(cc) => { - if is_int_or_ref_ty(ty) || ty == types::I128 || ty == types::B128 { - let size = ty.bytes() as u8; - emit_cmoves(ctx, size, cc, lhs, dst); - } else { - ctx.emit(Inst::xmm_cmove( - operand_size, - cc, - RegMem::reg(lhs.only_reg().unwrap()), - dst.only_reg().unwrap(), - )); - } - } - FcmpCondResult::AndConditions(_, _) => { - unreachable!( - "can't AND with select; see above comment about inverting equal" - ); - } - FcmpCondResult::InvertedEqualOrConditions(cc1, cc2) - | FcmpCondResult::OrConditions(cc1, cc2) => { - if is_int_or_ref_ty(ty) || ty == types::I128 { - let size = ty.bytes() as u8; - emit_cmoves(ctx, size, cc1, lhs.clone(), dst); - emit_cmoves(ctx, size, cc2, lhs, dst); - } else { - ctx.emit(Inst::xmm_cmove( - operand_size, - cc1, - RegMem::reg(lhs.only_reg().unwrap()), - dst.only_reg().unwrap(), - )); - ctx.emit(Inst::xmm_cmove( - operand_size, - cc2, - RegMem::reg(lhs.only_reg().unwrap()), - dst.only_reg().unwrap(), - )); - } - } - } + if let Some(_) = matches_input(ctx, flag_input, Opcode::Fcmp) { + implemented_in_isle(ctx); } else { let ty = ty.unwrap(); diff --git a/cranelift/codegen/src/isa/x64/lower/isle.rs b/cranelift/codegen/src/isa/x64/lower/isle.rs index 1d31c79d29..a0ae8be657 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle.rs +++ b/cranelift/codegen/src/isa/x64/lower/isle.rs @@ -6,11 +6,11 @@ use generated_code::MInst; use regalloc::Writable; // Types that the generated ISLE code uses via `use super::*`. -use super::{is_mergeable_load, lower_to_amode, Reg}; +use super::{is_int_or_ref_ty, is_mergeable_load, lower_to_amode, Reg}; use crate::{ ir::{ - immediates::*, types::*, Inst, InstructionData, Opcode, TrapCode, Value, ValueLabel, - ValueList, + condcodes::FloatCC, immediates::*, types::*, Inst, InstructionData, Opcode, TrapCode, + Value, ValueLabel, ValueList, }, isa::{ settings::Flags, @@ -440,6 +440,32 @@ where fn imm8_to_imm8_gpr(&mut self, imm: u8) -> Imm8Gpr { Imm8Gpr::new(Imm8Reg::Imm8 { imm }).unwrap() } + + fn is_gpr_type(&mut self, ty: Type) -> Option { + if is_int_or_ref_ty(ty) || ty == I128 || ty == B128 { + Some(ty) + } else { + None + } + } + + #[inline] + fn is_xmm_type(&mut self, ty: Type) -> Option { + if ty == F32 || ty == F64 || (ty.is_vector() && ty.bits() == 128) { + Some(ty) + } else { + None + } + } + + #[inline] + fn is_single_register_type(&mut self, ty: Type) -> Option { + if ty != I128 { + Some(ty) + } else { + None + } + } } // Since x64 doesn't have 8x16 shifts and we must use a 16x8 shift instead, we diff --git a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest index 2ad2966635..09e64330c8 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest +++ b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest @@ -1,4 +1,4 @@ src/clif.isle 9ea75a6f790b5c03 -src/prelude.isle 73285cd431346d53 -src/isa/x64/inst.isle 301db31d5f1118ae -src/isa/x64/lower.isle cdc94aec26c0bc5b +src/prelude.isle 980b300b3ec3e338 +src/isa/x64/inst.isle ac88a0ae153ed210 +src/isa/x64/lower.isle 1ebdd4469355e2cf diff --git a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs index 0856e4405e..000e99dfa0 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs @@ -106,6 +106,9 @@ pub trait Context { fn gpr_to_imm8_gpr(&mut self, arg0: Gpr) -> Imm8Gpr; fn imm8_to_imm8_gpr(&mut self, arg0: u8) -> Imm8Gpr; fn xmm0(&mut self) -> WritableXmm; + fn is_xmm_type(&mut self, arg0: Type) -> Option; + fn is_gpr_type(&mut self, arg0: Type) -> Option; + fn is_single_register_type(&mut self, arg0: Type) -> Option; fn avx512vl_enabled(&mut self, arg0: Type) -> Option<()>; fn avx512dq_enabled(&mut self, arg0: Type) -> Option<()>; fn avx512f_enabled(&mut self, arg0: Type) -> Option<()>; @@ -130,16 +133,30 @@ pub enum SideEffectNoResult { Inst { inst: MInst }, } -/// Internal type ProducesFlags: defined at src/prelude.isle line 327. +/// Internal type ProducesFlags: defined at src/prelude.isle line 330. #[derive(Clone, Debug)] pub enum ProducesFlags { - ProducesFlags { inst: MInst, result: Reg }, + ProducesFlagsSideEffect { inst: MInst }, + ProducesFlagsReturnsReg { inst: MInst, result: Reg }, + ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, } -/// Internal type ConsumesFlags: defined at src/prelude.isle line 330. +/// Internal type ConsumesFlags: defined at src/prelude.isle line 341. #[derive(Clone, Debug)] pub enum ConsumesFlags { - ConsumesFlags { inst: MInst, result: Reg }, + ConsumesFlagsReturnsResultWithProducer { + inst: MInst, + result: Reg, + }, + ConsumesFlagsReturnsReg { + inst: MInst, + result: Reg, + }, + ConsumesFlagsTwiceReturnsValueRegs { + inst1: MInst, + inst2: MInst, + result: ValueRegs, + }, } /// Internal type MInst: defined at src/isa/x64/inst.isle line 8. @@ -264,6 +281,29 @@ pub enum MInst { alternative: Gpr, dst: WritableGpr, }, + CmoveOr { + size: OperandSize, + cc1: CC, + cc2: CC, + consequent: GprMem, + alternative: Gpr, + dst: WritableGpr, + }, + XmmCmove { + size: OperandSize, + cc: CC, + consequent: XmmMem, + alternative: Xmm, + dst: WritableXmm, + }, + XmmCmoveOr { + size: OperandSize, + cc1: CC, + cc2: CC, + consequent: XmmMem, + alternative: Xmm, + dst: WritableXmm, + }, Push64 { src: GprMemImm, }, @@ -345,12 +385,6 @@ pub enum MInst { lhs: Xmm, rhs_dst: WritableXmm, }, - XmmCmove { - size: OperandSize, - cc: CC, - src: XmmMem, - dst: WritableXmm, - }, XmmCmpRmR { op: SseOpcode, src: XmmMem, @@ -453,7 +487,7 @@ pub enum MInst { }, } -/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 1089. +/// Internal type ExtendKind: defined at src/isa/x64/inst.isle line 1118. #[derive(Copy, Clone, PartialEq, Eq, Debug)] pub enum ExtendKind { Sign, @@ -490,7 +524,7 @@ pub fn constructor_value_regs_none( } = pattern0_0 { // Rule at src/prelude.isle line 313. - let expr0_0 = C::emit(ctx, &pattern1_0); + let expr0_0 = C::emit(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } @@ -508,13 +542,44 @@ pub fn constructor_safepoint( } = pattern0_0 { // Rule at src/prelude.isle line 319. - let expr0_0 = C::emit_safepoint(ctx, &pattern1_0); + let expr0_0 = C::emit_safepoint(ctx, pattern1_0); let expr1_0 = C::value_regs_invalid(ctx); return Some(expr1_0); } return None; } +// Generated as internal constructor for term consumes_flags_concat. +pub fn constructor_consumes_flags_concat( + ctx: &mut C, + arg0: &ConsumesFlags, + arg1: &ConsumesFlags, +) -> Option { + let pattern0_0 = arg0; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern1_0, + result: pattern1_1, + } = pattern0_0 + { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 353. + let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: pattern1_0.clone(), + inst2: pattern3_0.clone(), + result: expr0_0, + }; + return Some(expr1_0); + } + } + return None; +} + // Generated as internal constructor for term with_flags. pub fn constructor_with_flags( ctx: &mut C, @@ -522,89 +587,71 @@ pub fn constructor_with_flags( arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 340. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); - return Some(expr2_0); + match pattern0_0 { + &ProducesFlags::ProducesFlagsSideEffect { + inst: ref pattern1_0, + } => { + let pattern2_0 = arg1; + match pattern2_0 { + &ConsumesFlags::ConsumesFlagsReturnsReg { + inst: ref pattern3_0, + result: pattern3_1, + } => { + // Rule at src/prelude.isle line 378. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_reg(ctx, pattern3_1); + return Some(expr2_0); + } + &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: ref pattern3_0, + inst2: ref pattern3_1, + result: pattern3_2, + } => { + // Rule at src/prelude.isle line 384. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_1); + let expr2_0 = C::emit(ctx, pattern3_0); + return Some(pattern3_2); + } + _ => {} + } } + &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { + inst: ref pattern1_0, + result: pattern1_1, + } => { + let pattern2_0 = arg1; + if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { + inst: ref pattern3_0, + result: pattern3_1, + } = pattern2_0 + { + // Rule at src/prelude.isle line 372. + let expr0_0 = C::emit(ctx, pattern1_0); + let expr1_0 = C::emit(ctx, pattern3_0); + let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); + return Some(expr2_0); + } + } + _ => {} } return None; } -// Generated as internal constructor for term with_flags_1. -pub fn constructor_with_flags_1( +// Generated as internal constructor for term with_flags_reg. +pub fn constructor_with_flags_reg( ctx: &mut C, arg0: &ProducesFlags, arg1: &ConsumesFlags, ) -> Option { let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - // Rule at src/prelude.isle line 348. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern3_0); - return Some(pattern3_1); - } - } - return None; -} - -// Generated as internal constructor for term with_flags_2. -pub fn constructor_with_flags_2( - ctx: &mut C, - arg0: &ProducesFlags, - arg1: &ConsumesFlags, - arg2: &ConsumesFlags, -) -> Option { - let pattern0_0 = arg0; - if let &ProducesFlags::ProducesFlags { - inst: ref pattern1_0, - result: pattern1_1, - } = pattern0_0 - { - let pattern2_0 = arg1; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern3_0, - result: pattern3_1, - } = pattern2_0 - { - let pattern4_0 = arg2; - if let &ConsumesFlags::ConsumesFlags { - inst: ref pattern5_0, - result: pattern5_1, - } = pattern4_0 - { - // Rule at src/prelude.isle line 358. - let expr0_0 = C::emit(ctx, &pattern1_0); - let expr1_0 = C::emit(ctx, &pattern5_0); - let expr2_0 = C::emit(ctx, &pattern3_0); - let expr3_0 = C::value_regs(ctx, pattern3_1, pattern5_1); - return Some(expr3_0); - } - } - } - return None; + let pattern1_0 = arg1; + // Rule at src/prelude.isle line 397. + let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; + let expr1_0: usize = 0; + let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); + return Some(expr2_0); } // Generated as internal constructor for term operand_size_bits. @@ -612,22 +659,22 @@ pub fn constructor_operand_size_bits(ctx: &mut C, arg0: &OperandSize let pattern0_0 = arg0; match pattern0_0 { &OperandSize::Size8 => { - // Rule at src/isa/x64/inst.isle line 509. + // Rule at src/isa/x64/inst.isle line 527. let expr0_0: u16 = 8; return Some(expr0_0); } &OperandSize::Size16 => { - // Rule at src/isa/x64/inst.isle line 510. + // Rule at src/isa/x64/inst.isle line 528. let expr0_0: u16 = 16; return Some(expr0_0); } &OperandSize::Size32 => { - // Rule at src/isa/x64/inst.isle line 511. + // Rule at src/isa/x64/inst.isle line 529. let expr0_0: u16 = 32; return Some(expr0_0); } &OperandSize::Size64 => { - // Rule at src/isa/x64/inst.isle line 512. + // Rule at src/isa/x64/inst.isle line 530. let expr0_0: u16 = 64; return Some(expr0_0); } @@ -639,7 +686,7 @@ pub fn constructor_operand_size_bits(ctx: &mut C, arg0: &OperandSize // Generated as internal constructor for term put_in_gpr. pub fn constructor_put_in_gpr(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 949. + // Rule at src/isa/x64/inst.isle line 967. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = C::gpr_new(ctx, expr0_0); return Some(expr1_0); @@ -648,7 +695,7 @@ pub fn constructor_put_in_gpr(ctx: &mut C, arg0: Value) -> Option(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 956. + // Rule at src/isa/x64/inst.isle line 974. let expr0_0 = C::put_in_reg_mem(ctx, pattern0_0); let expr1_0 = C::reg_mem_to_gpr_mem(ctx, &expr0_0); return Some(expr1_0); @@ -657,7 +704,7 @@ pub fn constructor_put_in_gpr_mem(ctx: &mut C, arg0: Value) -> Optio // Generated as internal constructor for term put_in_gpr_mem_imm. pub fn constructor_put_in_gpr_mem_imm(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 963. + // Rule at src/isa/x64/inst.isle line 981. let expr0_0 = C::put_in_reg_mem_imm(ctx, pattern0_0); let expr1_0 = C::gpr_mem_imm_new(ctx, &expr0_0); return Some(expr1_0); @@ -666,7 +713,7 @@ pub fn constructor_put_in_gpr_mem_imm(ctx: &mut C, arg0: Value) -> O // Generated as internal constructor for term put_in_xmm. pub fn constructor_put_in_xmm(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 970. + // Rule at src/isa/x64/inst.isle line 988. let expr0_0 = C::put_in_reg(ctx, pattern0_0); let expr1_0 = C::xmm_new(ctx, expr0_0); return Some(expr1_0); @@ -675,7 +722,7 @@ pub fn constructor_put_in_xmm(ctx: &mut C, arg0: Value) -> Option(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 977. + // Rule at src/isa/x64/inst.isle line 995. let expr0_0 = C::put_in_reg_mem(ctx, pattern0_0); let expr1_0 = C::reg_mem_to_xmm_mem(ctx, &expr0_0); return Some(expr1_0); @@ -684,7 +731,7 @@ pub fn constructor_put_in_xmm_mem(ctx: &mut C, arg0: Value) -> Optio // Generated as internal constructor for term put_in_xmm_mem_imm. pub fn constructor_put_in_xmm_mem_imm(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 984. + // Rule at src/isa/x64/inst.isle line 1002. let expr0_0 = C::put_in_reg_mem_imm(ctx, pattern0_0); let expr1_0 = C::xmm_mem_imm_new(ctx, &expr0_0); return Some(expr1_0); @@ -693,7 +740,7 @@ pub fn constructor_put_in_xmm_mem_imm(ctx: &mut C, arg0: Value) -> O // Generated as internal constructor for term value_gpr. pub fn constructor_value_gpr(ctx: &mut C, arg0: Gpr) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 989. + // Rule at src/isa/x64/inst.isle line 1007. let expr0_0 = C::gpr_to_reg(ctx, pattern0_0); let expr1_0 = C::value_reg(ctx, expr0_0); return Some(expr1_0); @@ -703,7 +750,7 @@ pub fn constructor_value_gpr(ctx: &mut C, arg0: Gpr) -> Option(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 994. + // Rule at src/isa/x64/inst.isle line 1012. let expr0_0 = C::gpr_to_reg(ctx, pattern0_0); let expr1_0 = C::gpr_to_reg(ctx, pattern1_0); let expr2_0 = C::value_regs(ctx, expr0_0, expr1_0); @@ -713,7 +760,7 @@ pub fn constructor_value_gprs(ctx: &mut C, arg0: Gpr, arg1: Gpr) -> // Generated as internal constructor for term value_xmm. pub fn constructor_value_xmm(ctx: &mut C, arg0: Xmm) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 999. + // Rule at src/isa/x64/inst.isle line 1017. let expr0_0 = C::xmm_to_reg(ctx, pattern0_0); let expr1_0 = C::value_reg(ctx, expr0_0); return Some(expr1_0); @@ -727,7 +774,7 @@ pub fn constructor_value_regs_get_gpr( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1006. + // Rule at src/isa/x64/inst.isle line 1024. let expr0_0 = C::value_regs_get(ctx, pattern0_0, pattern1_0); let expr1_0 = C::gpr_new(ctx, expr0_0); return Some(expr1_0); @@ -736,7 +783,7 @@ pub fn constructor_value_regs_get_gpr( // Generated as internal constructor for term lo_gpr. pub fn constructor_lo_gpr(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1019. + // Rule at src/isa/x64/inst.isle line 1037. let expr0_0 = constructor_lo_reg(ctx, pattern0_0)?; let expr1_0 = C::gpr_new(ctx, expr0_0); return Some(expr1_0); @@ -748,7 +795,7 @@ pub fn constructor_sink_load_to_gpr_mem_imm( arg0: &SinkableLoad, ) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1079. + // Rule at src/isa/x64/inst.isle line 1108. let expr0_0 = C::sink_load(ctx, pattern0_0); let expr1_0 = C::gpr_mem_imm_new(ctx, &expr0_0); return Some(expr1_0); @@ -766,12 +813,12 @@ pub fn constructor_extend_to_gpr( let pattern2_0 = arg1; if pattern2_0 == pattern1_0 { let pattern4_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1101. + // Rule at src/isa/x64/inst.isle line 1130. let expr0_0 = constructor_put_in_gpr(ctx, pattern0_0)?; return Some(expr0_0); } let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1104. + // Rule at src/isa/x64/inst.isle line 1133. let expr0_0 = C::ty_bits_u16(ctx, pattern1_0); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern2_0); let expr2_0 = constructor_operand_size_bits(ctx, &expr1_0)?; @@ -795,7 +842,7 @@ pub fn constructor_extend( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1124. + // Rule at src/isa/x64/inst.isle line 1153. let expr0_0 = constructor_movsx(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -803,7 +850,7 @@ pub fn constructor_extend( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1120. + // Rule at src/isa/x64/inst.isle line 1149. let expr0_0 = constructor_movzx(ctx, pattern2_0, pattern3_0, pattern4_0)?; return Some(expr0_0); } @@ -816,17 +863,17 @@ pub fn constructor_extend( pub fn constructor_sse_xor_op(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32X4 { - // Rule at src/isa/x64/inst.isle line 1131. + // Rule at src/isa/x64/inst.isle line 1160. let expr0_0 = SseOpcode::Xorps; return Some(expr0_0); } if pattern0_0 == F64X2 { - // Rule at src/isa/x64/inst.isle line 1132. + // Rule at src/isa/x64/inst.isle line 1161. let expr0_0 = SseOpcode::Xorpd; return Some(expr0_0); } if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { - // Rule at src/isa/x64/inst.isle line 1133. + // Rule at src/isa/x64/inst.isle line 1162. let expr0_0 = SseOpcode::Pxor; return Some(expr0_0); } @@ -843,7 +890,7 @@ pub fn constructor_sse_xor( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1137. + // Rule at src/isa/x64/inst.isle line 1166. let expr0_0 = constructor_sse_xor_op(ctx, pattern0_0)?; let expr1_0 = constructor_xmm_rm_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -853,40 +900,40 @@ pub fn constructor_sse_xor( pub fn constructor_sse_cmp_op(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32X4 { - // Rule at src/isa/x64/inst.isle line 1146. + // Rule at src/isa/x64/inst.isle line 1175. let expr0_0 = SseOpcode::Cmpps; return Some(expr0_0); } if pattern0_0 == F64X2 { - // Rule at src/isa/x64/inst.isle line 1147. + // Rule at src/isa/x64/inst.isle line 1176. let expr0_0 = SseOpcode::Cmppd; return Some(expr0_0); } if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { if pattern1_0 == 8 { if pattern1_1 == 16 { - // Rule at src/isa/x64/inst.isle line 1142. + // Rule at src/isa/x64/inst.isle line 1171. let expr0_0 = SseOpcode::Pcmpeqb; return Some(expr0_0); } } if pattern1_0 == 16 { if pattern1_1 == 8 { - // Rule at src/isa/x64/inst.isle line 1143. + // Rule at src/isa/x64/inst.isle line 1172. let expr0_0 = SseOpcode::Pcmpeqw; return Some(expr0_0); } } if pattern1_0 == 32 { if pattern1_1 == 4 { - // Rule at src/isa/x64/inst.isle line 1144. + // Rule at src/isa/x64/inst.isle line 1173. let expr0_0 = SseOpcode::Pcmpeqd; return Some(expr0_0); } } if pattern1_0 == 64 { if pattern1_1 == 2 { - // Rule at src/isa/x64/inst.isle line 1145. + // Rule at src/isa/x64/inst.isle line 1174. let expr0_0 = SseOpcode::Pcmpeqq; return Some(expr0_0); } @@ -898,7 +945,7 @@ pub fn constructor_sse_cmp_op(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1161. + // Rule at src/isa/x64/inst.isle line 1190. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_xmm(ctx, expr0_0); let expr2_0: Type = I32X4; @@ -922,7 +969,7 @@ pub fn constructor_make_i64x2_from_lanes( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1172. + // Rule at src/isa/x64/inst.isle line 1201. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_reg(ctx, expr0_0); let expr2_0 = C::writable_xmm_to_xmm(ctx, expr0_0); @@ -963,12 +1010,12 @@ pub fn constructor_mov_rmi_to_xmm(ctx: &mut C, arg0: &RegMemImm) -> let pattern0_0 = arg0; match pattern0_0 { &RegMemImm::Imm { simm32: pattern1_0 } => { - // Rule at src/isa/x64/inst.isle line 1195. + // Rule at src/isa/x64/inst.isle line 1224. let expr0_0 = C::xmm_mem_imm_new(ctx, pattern0_0); return Some(expr0_0); } &RegMemImm::Reg { reg: pattern1_0 } => { - // Rule at src/isa/x64/inst.isle line 1196. + // Rule at src/isa/x64/inst.isle line 1225. let expr0_0 = SseOpcode::Movd; let expr1_0 = C::reg_to_gpr_mem(ctx, pattern1_0); let expr2_0 = OperandSize::Size32; @@ -979,7 +1026,7 @@ pub fn constructor_mov_rmi_to_xmm(ctx: &mut C, arg0: &RegMemImm) -> &RegMemImm::Mem { addr: ref pattern1_0, } => { - // Rule at src/isa/x64/inst.isle line 1194. + // Rule at src/isa/x64/inst.isle line 1223. let expr0_0 = C::xmm_mem_imm_new(ctx, pattern0_0); return Some(expr0_0); } @@ -999,7 +1046,7 @@ pub fn constructor_x64_load( if pattern0_0 == I64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1211. + // Rule at src/isa/x64/inst.isle line 1240. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = MInst::Mov64MR { src: pattern2_0.clone(), @@ -1013,7 +1060,7 @@ pub fn constructor_x64_load( if pattern0_0 == F32 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1216. + // Rule at src/isa/x64/inst.isle line 1245. let expr0_0 = SseOpcode::Movss; let expr1_0 = C::synthetic_amode_to_reg_mem(ctx, pattern2_0); let expr2_0 = C::reg_mem_to_xmm_mem(ctx, &expr1_0); @@ -1024,7 +1071,7 @@ pub fn constructor_x64_load( if pattern0_0 == F64 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1220. + // Rule at src/isa/x64/inst.isle line 1249. let expr0_0 = SseOpcode::Movsd; let expr1_0 = C::synthetic_amode_to_reg_mem(ctx, pattern2_0); let expr2_0 = C::reg_mem_to_xmm_mem(ctx, &expr1_0); @@ -1035,7 +1082,7 @@ pub fn constructor_x64_load( if pattern0_0 == F32X4 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1224. + // Rule at src/isa/x64/inst.isle line 1253. let expr0_0 = SseOpcode::Movups; let expr1_0 = C::synthetic_amode_to_reg_mem(ctx, pattern2_0); let expr2_0 = C::reg_mem_to_xmm_mem(ctx, &expr1_0); @@ -1046,7 +1093,7 @@ pub fn constructor_x64_load( if pattern0_0 == F64X2 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1228. + // Rule at src/isa/x64/inst.isle line 1257. let expr0_0 = SseOpcode::Movupd; let expr1_0 = C::synthetic_amode_to_reg_mem(ctx, pattern2_0); let expr2_0 = C::reg_mem_to_xmm_mem(ctx, &expr1_0); @@ -1057,7 +1104,7 @@ pub fn constructor_x64_load( if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1232. + // Rule at src/isa/x64/inst.isle line 1261. let expr0_0 = SseOpcode::Movdqu; let expr1_0 = C::synthetic_amode_to_reg_mem(ctx, pattern2_0); let expr2_0 = C::reg_mem_to_xmm_mem(ctx, &expr1_0); @@ -1069,7 +1116,7 @@ pub fn constructor_x64_load( let pattern2_0 = arg1; let pattern3_0 = arg2; if let &ExtKind::SignExtend = pattern3_0 { - // Rule at src/isa/x64/inst.isle line 1206. + // Rule at src/isa/x64/inst.isle line 1235. let expr0_0 = C::ty_bytes(ctx, pattern1_0); let expr1_0: u16 = 8; let expr2_0 = C::ext_mode(ctx, expr0_0, expr1_0); @@ -1095,7 +1142,7 @@ pub fn constructor_alu_rmi_r( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1244. + // Rule at src/isa/x64/inst.isle line 1273. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = MInst::AluRmiR { @@ -1120,14 +1167,14 @@ pub fn constructor_add( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1252. + // Rule at src/isa/x64/inst.isle line 1281. let expr0_0 = AluRmiROpcode::Add; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); } -// Generated as internal constructor for term add_with_flags. -pub fn constructor_add_with_flags( +// Generated as internal constructor for term add_with_flags_paired. +pub fn constructor_add_with_flags_paired( ctx: &mut C, arg0: Type, arg1: Gpr, @@ -1136,7 +1183,7 @@ pub fn constructor_add_with_flags( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1260. + // Rule at src/isa/x64/inst.isle line 1289. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = AluRmiROpcode::Add; @@ -1149,15 +1196,15 @@ pub fn constructor_add_with_flags( }; let expr4_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr5_0 = C::gpr_to_reg(ctx, expr4_0); - let expr6_0 = ProducesFlags::ProducesFlags { + let expr6_0 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer { inst: expr3_0, result: expr5_0, }; return Some(expr6_0); } -// Generated as internal constructor for term adc. -pub fn constructor_adc( +// Generated as internal constructor for term adc_paired. +pub fn constructor_adc_paired( ctx: &mut C, arg0: Type, arg1: Gpr, @@ -1166,7 +1213,7 @@ pub fn constructor_adc( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1271. + // Rule at src/isa/x64/inst.isle line 1301. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = AluRmiROpcode::Adc; @@ -1179,7 +1226,7 @@ pub fn constructor_adc( }; let expr4_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr5_0 = C::gpr_to_reg(ctx, expr4_0); - let expr6_0 = ConsumesFlags::ConsumesFlags { + let expr6_0 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { inst: expr3_0, result: expr5_0, }; @@ -1196,14 +1243,14 @@ pub fn constructor_sub( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1282. + // Rule at src/isa/x64/inst.isle line 1313. let expr0_0 = AluRmiROpcode::Sub; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); } -// Generated as internal constructor for term sub_with_flags. -pub fn constructor_sub_with_flags( +// Generated as internal constructor for term sub_with_flags_paired. +pub fn constructor_sub_with_flags_paired( ctx: &mut C, arg0: Type, arg1: Gpr, @@ -1212,7 +1259,7 @@ pub fn constructor_sub_with_flags( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1290. + // Rule at src/isa/x64/inst.isle line 1321. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = AluRmiROpcode::Sub; @@ -1225,15 +1272,15 @@ pub fn constructor_sub_with_flags( }; let expr4_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr5_0 = C::gpr_to_reg(ctx, expr4_0); - let expr6_0 = ProducesFlags::ProducesFlags { + let expr6_0 = ProducesFlags::ProducesFlagsReturnsResultWithConsumer { inst: expr3_0, result: expr5_0, }; return Some(expr6_0); } -// Generated as internal constructor for term sbb. -pub fn constructor_sbb( +// Generated as internal constructor for term sbb_paired. +pub fn constructor_sbb_paired( ctx: &mut C, arg0: Type, arg1: Gpr, @@ -1242,7 +1289,7 @@ pub fn constructor_sbb( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1301. + // Rule at src/isa/x64/inst.isle line 1333. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = AluRmiROpcode::Sbb; @@ -1255,7 +1302,7 @@ pub fn constructor_sbb( }; let expr4_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr5_0 = C::gpr_to_reg(ctx, expr4_0); - let expr6_0 = ConsumesFlags::ConsumesFlags { + let expr6_0 = ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { inst: expr3_0, result: expr5_0, }; @@ -1272,7 +1319,7 @@ pub fn constructor_mul( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1312. + // Rule at src/isa/x64/inst.isle line 1345. let expr0_0 = AluRmiROpcode::Mul; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1288,7 +1335,7 @@ pub fn constructor_x64_and( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1320. + // Rule at src/isa/x64/inst.isle line 1353. let expr0_0 = AluRmiROpcode::And; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1304,7 +1351,7 @@ pub fn constructor_or( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1328. + // Rule at src/isa/x64/inst.isle line 1361. let expr0_0 = AluRmiROpcode::Or; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1320,7 +1367,7 @@ pub fn constructor_xor( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1336. + // Rule at src/isa/x64/inst.isle line 1369. let expr0_0 = AluRmiROpcode::Xor; let expr1_0 = constructor_alu_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1332,7 +1379,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option if pattern0_0 == I64 { let pattern2_0 = arg1; if let Some(pattern3_0) = C::nonzero_u64_fits_in_u32(ctx, pattern2_0) { - // Rule at src/isa/x64/inst.isle line 1369. + // Rule at src/isa/x64/inst.isle line 1402. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = OperandSize::Size32; let expr2_0 = MInst::Imm { @@ -1349,7 +1396,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option if pattern0_0 == F32 { let pattern2_0 = arg1; if pattern2_0 == 0 { - // Rule at src/isa/x64/inst.isle line 1398. + // Rule at src/isa/x64/inst.isle line 1431. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_xmm(ctx, expr0_0); let expr2_0 = SseOpcode::Xorps; @@ -1364,7 +1411,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option let expr6_0 = C::xmm_to_reg(ctx, expr1_0); return Some(expr6_0); } - // Rule at src/isa/x64/inst.isle line 1353. + // Rule at src/isa/x64/inst.isle line 1386. let expr0_0 = SseOpcode::Movd; let expr1_0: Type = I32; let expr2_0 = constructor_imm(ctx, expr1_0, pattern2_0)?; @@ -1378,7 +1425,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option if pattern0_0 == F64 { let pattern2_0 = arg1; if pattern2_0 == 0 { - // Rule at src/isa/x64/inst.isle line 1410. + // Rule at src/isa/x64/inst.isle line 1443. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_xmm(ctx, expr0_0); let expr2_0 = SseOpcode::Xorpd; @@ -1393,7 +1440,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option let expr6_0 = C::xmm_to_reg(ctx, expr1_0); return Some(expr6_0); } - // Rule at src/isa/x64/inst.isle line 1359. + // Rule at src/isa/x64/inst.isle line 1392. let expr0_0 = SseOpcode::Movq; let expr1_0: Type = I64; let expr2_0 = constructor_imm(ctx, expr1_0, pattern2_0)?; @@ -1407,7 +1454,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { let pattern2_0 = arg1; if pattern2_0 == 0 { - // Rule at src/isa/x64/inst.isle line 1388. + // Rule at src/isa/x64/inst.isle line 1421. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_xmm(ctx, expr0_0); let expr2_0 = constructor_sse_xor_op(ctx, pattern0_0)?; @@ -1426,7 +1473,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { let pattern2_0 = arg1; if pattern2_0 == 0 { - // Rule at src/isa/x64/inst.isle line 1375. + // Rule at src/isa/x64/inst.isle line 1408. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr2_0 = C::operand_size_of_type_32_64(ctx, pattern1_0); @@ -1443,7 +1490,7 @@ pub fn constructor_imm(ctx: &mut C, arg0: Type, arg1: u64) -> Option let expr7_0 = C::gpr_to_reg(ctx, expr1_0); return Some(expr7_0); } - // Rule at src/isa/x64/inst.isle line 1346. + // Rule at src/isa/x64/inst.isle line 1379. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern1_0); let expr2_0 = MInst::Imm { @@ -1471,7 +1518,7 @@ pub fn constructor_shift_r( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1423. + // Rule at src/isa/x64/inst.isle line 1456. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::raw_operand_size_of_type(ctx, pattern0_0); let expr2_0 = MInst::ShiftR { @@ -1496,7 +1543,7 @@ pub fn constructor_x64_rotl( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1433. + // Rule at src/isa/x64/inst.isle line 1466. let expr0_0 = ShiftKind::RotateLeft; let expr1_0 = constructor_shift_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1512,7 +1559,7 @@ pub fn constructor_x64_rotr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1438. + // Rule at src/isa/x64/inst.isle line 1471. let expr0_0 = ShiftKind::RotateRight; let expr1_0 = constructor_shift_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1528,7 +1575,7 @@ pub fn constructor_shl( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1443. + // Rule at src/isa/x64/inst.isle line 1476. let expr0_0 = ShiftKind::ShiftLeft; let expr1_0 = constructor_shift_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1544,7 +1591,7 @@ pub fn constructor_shr( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1448. + // Rule at src/isa/x64/inst.isle line 1481. let expr0_0 = ShiftKind::ShiftRightLogical; let expr1_0 = constructor_shift_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1560,7 +1607,7 @@ pub fn constructor_sar( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1453. + // Rule at src/isa/x64/inst.isle line 1486. let expr0_0 = ShiftKind::ShiftRightArithmetic; let expr1_0 = constructor_shift_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1578,19 +1625,15 @@ pub fn constructor_cmp_rmi_r( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1458. + // Rule at src/isa/x64/inst.isle line 1491. let expr0_0 = MInst::CmpRmiR { size: pattern0_0.clone(), opcode: pattern1_0.clone(), src: pattern2_0.clone(), dst: pattern3_0, }; - let expr1_0 = C::invalid_reg(ctx); - let expr2_0 = ProducesFlags::ProducesFlags { - inst: expr0_0, - result: expr1_0, - }; - return Some(expr2_0); + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); } // Generated as internal constructor for term cmp. @@ -1603,12 +1646,61 @@ pub fn constructor_cmp( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1467. + // Rule at src/isa/x64/inst.isle line 1500. let expr0_0 = CmpOpcode::Cmp; let expr1_0 = constructor_cmp_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); } +// Generated as internal constructor for term xmm_cmp_rm_r. +pub fn constructor_xmm_cmp_rm_r( + ctx: &mut C, + arg0: &SseOpcode, + arg1: &XmmMem, + arg2: Xmm, +) -> Option { + let pattern0_0 = arg0; + let pattern1_0 = arg1; + let pattern2_0 = arg2; + // Rule at src/isa/x64/inst.isle line 1505. + let expr0_0 = MInst::XmmCmpRmR { + op: pattern0_0.clone(), + src: pattern1_0.clone(), + dst: pattern2_0, + }; + let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; + return Some(expr1_0); +} + +// Generated as internal constructor for term fpcmp. +pub fn constructor_fpcmp( + ctx: &mut C, + arg0: Value, + arg1: Value, +) -> Option { + let pattern0_0 = arg0; + let pattern1_0 = C::value_type(ctx, pattern0_0); + if pattern1_0 == F32 { + let pattern3_0 = arg1; + // Rule at src/isa/x64/inst.isle line 1512. + let expr0_0 = SseOpcode::Ucomiss; + let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern0_0)?; + let expr2_0 = constructor_put_in_xmm(ctx, pattern3_0)?; + let expr3_0 = constructor_xmm_cmp_rm_r(ctx, &expr0_0, &expr1_0, expr2_0)?; + return Some(expr3_0); + } + if pattern1_0 == F64 { + let pattern3_0 = arg1; + // Rule at src/isa/x64/inst.isle line 1514. + let expr0_0 = SseOpcode::Ucomisd; + let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern0_0)?; + let expr2_0 = constructor_put_in_xmm(ctx, pattern3_0)?; + let expr3_0 = constructor_xmm_cmp_rm_r(ctx, &expr0_0, &expr1_0, expr2_0)?; + return Some(expr3_0); + } + return None; +} + // Generated as internal constructor for term test. pub fn constructor_test( ctx: &mut C, @@ -1619,7 +1711,7 @@ pub fn constructor_test( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1472. + // Rule at src/isa/x64/inst.isle line 1519. let expr0_0 = CmpOpcode::Test; let expr1_0 = constructor_cmp_rmi_r(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -1637,7 +1729,7 @@ pub fn constructor_cmove( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1477. + // Rule at src/isa/x64/inst.isle line 1526. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = MInst::Cmove { @@ -1649,13 +1741,285 @@ pub fn constructor_cmove( }; let expr3_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr4_0 = C::gpr_to_reg(ctx, expr3_0); - let expr5_0 = ConsumesFlags::ConsumesFlags { + let expr5_0 = ConsumesFlags::ConsumesFlagsReturnsReg { inst: expr2_0, result: expr4_0, }; return Some(expr5_0); } +// Generated as internal constructor for term cmove_xmm. +pub fn constructor_cmove_xmm( + ctx: &mut C, + arg0: Type, + arg1: &CC, + arg2: &XmmMem, + arg3: Xmm, +) -> Option { + let pattern0_0 = arg0; + let pattern1_0 = arg1; + let pattern2_0 = arg2; + let pattern3_0 = arg3; + // Rule at src/isa/x64/inst.isle line 1534. + let expr0_0 = C::temp_writable_xmm(ctx); + let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); + let expr2_0 = MInst::XmmCmove { + size: expr1_0, + cc: pattern1_0.clone(), + consequent: pattern2_0.clone(), + alternative: pattern3_0, + dst: expr0_0, + }; + let expr3_0 = C::writable_xmm_to_xmm(ctx, expr0_0); + let expr4_0 = C::xmm_to_reg(ctx, expr3_0); + let expr5_0 = ConsumesFlags::ConsumesFlagsReturnsReg { + inst: expr2_0, + result: expr4_0, + }; + return Some(expr5_0); +} + +// Generated as internal constructor for term cmove_from_values. +pub fn constructor_cmove_from_values( + ctx: &mut C, + arg0: Type, + arg1: &CC, + arg2: Value, + arg3: Value, +) -> Option { + let pattern0_0 = arg0; + if pattern0_0 == I128 { + let pattern2_0 = arg1; + let pattern3_0 = arg2; + let pattern4_0 = arg3; + // Rule at src/isa/x64/inst.isle line 1545. + let expr0_0 = C::put_in_regs(ctx, pattern3_0); + let expr1_0 = C::put_in_regs(ctx, pattern4_0); + let expr2_0 = C::temp_writable_gpr(ctx); + let expr3_0 = C::temp_writable_gpr(ctx); + let expr4_0 = OperandSize::Size64; + let expr5_0: usize = 0; + let expr6_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr5_0)?; + let expr7_0 = C::gpr_to_gpr_mem(ctx, expr6_0); + let expr8_0: usize = 0; + let expr9_0 = constructor_value_regs_get_gpr(ctx, expr1_0, expr8_0)?; + let expr10_0 = MInst::Cmove { + size: expr4_0, + cc: pattern2_0.clone(), + consequent: expr7_0, + alternative: expr9_0, + dst: expr2_0, + }; + let expr11_0: usize = 1; + let expr12_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr11_0)?; + let expr13_0 = C::gpr_to_gpr_mem(ctx, expr12_0); + let expr14_0: usize = 1; + let expr15_0 = constructor_value_regs_get_gpr(ctx, expr1_0, expr14_0)?; + let expr16_0 = MInst::Cmove { + size: expr4_0, + cc: pattern2_0.clone(), + consequent: expr13_0, + alternative: expr15_0, + dst: expr3_0, + }; + let expr17_0 = C::writable_gpr_to_gpr(ctx, expr2_0); + let expr18_0 = C::gpr_to_reg(ctx, expr17_0); + let expr19_0 = C::writable_gpr_to_gpr(ctx, expr3_0); + let expr20_0 = C::gpr_to_reg(ctx, expr19_0); + let expr21_0 = C::value_regs(ctx, expr18_0, expr20_0); + let expr22_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: expr10_0, + inst2: expr16_0, + result: expr21_0, + }; + return Some(expr22_0); + } + if let Some(pattern1_0) = C::is_xmm_type(ctx, pattern0_0) { + if let Some(pattern2_0) = C::is_single_register_type(ctx, pattern1_0) { + let pattern3_0 = arg1; + let pattern4_0 = arg2; + let pattern5_0 = arg3; + // Rule at src/isa/x64/inst.isle line 1569. + let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern4_0)?; + let expr1_0 = constructor_put_in_xmm(ctx, pattern5_0)?; + let expr2_0 = constructor_cmove_xmm(ctx, pattern2_0, pattern3_0, &expr0_0, expr1_0)?; + return Some(expr2_0); + } + } + if let Some(pattern1_0) = C::is_gpr_type(ctx, pattern0_0) { + if let Some(pattern2_0) = C::is_single_register_type(ctx, pattern1_0) { + let pattern3_0 = arg1; + let pattern4_0 = arg2; + let pattern5_0 = arg3; + // Rule at src/isa/x64/inst.isle line 1566. + let expr0_0 = constructor_put_in_gpr_mem(ctx, pattern4_0)?; + let expr1_0 = constructor_put_in_gpr(ctx, pattern5_0)?; + let expr2_0 = constructor_cmove(ctx, pattern2_0, pattern3_0, &expr0_0, expr1_0)?; + return Some(expr2_0); + } + } + return None; +} + +// Generated as internal constructor for term cmove_or. +pub fn constructor_cmove_or( + ctx: &mut C, + arg0: Type, + arg1: &CC, + arg2: &CC, + arg3: &GprMem, + arg4: Gpr, +) -> Option { + let pattern0_0 = arg0; + let pattern1_0 = arg1; + let pattern2_0 = arg2; + let pattern3_0 = arg3; + let pattern4_0 = arg4; + // Rule at src/isa/x64/inst.isle line 1576. + let expr0_0 = C::temp_writable_gpr(ctx); + let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); + let expr2_0 = MInst::CmoveOr { + size: expr1_0, + cc1: pattern1_0.clone(), + cc2: pattern2_0.clone(), + consequent: pattern3_0.clone(), + alternative: pattern4_0, + dst: expr0_0, + }; + let expr3_0 = C::writable_gpr_to_gpr(ctx, expr0_0); + let expr4_0 = C::gpr_to_reg(ctx, expr3_0); + let expr5_0 = ConsumesFlags::ConsumesFlagsReturnsReg { + inst: expr2_0, + result: expr4_0, + }; + return Some(expr5_0); +} + +// Generated as internal constructor for term cmove_or_xmm. +pub fn constructor_cmove_or_xmm( + ctx: &mut C, + arg0: Type, + arg1: &CC, + arg2: &CC, + arg3: &XmmMem, + arg4: Xmm, +) -> Option { + let pattern0_0 = arg0; + let pattern1_0 = arg1; + let pattern2_0 = arg2; + let pattern3_0 = arg3; + let pattern4_0 = arg4; + // Rule at src/isa/x64/inst.isle line 1584. + let expr0_0 = C::temp_writable_xmm(ctx); + let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); + let expr2_0 = MInst::XmmCmoveOr { + size: expr1_0, + cc1: pattern1_0.clone(), + cc2: pattern2_0.clone(), + consequent: pattern3_0.clone(), + alternative: pattern4_0, + dst: expr0_0, + }; + let expr3_0 = C::writable_xmm_to_xmm(ctx, expr0_0); + let expr4_0 = C::xmm_to_reg(ctx, expr3_0); + let expr5_0 = ConsumesFlags::ConsumesFlagsReturnsReg { + inst: expr2_0, + result: expr4_0, + }; + return Some(expr5_0); +} + +// Generated as internal constructor for term cmove_or_from_values. +pub fn constructor_cmove_or_from_values( + ctx: &mut C, + arg0: Type, + arg1: &CC, + arg2: &CC, + arg3: Value, + arg4: Value, +) -> Option { + let pattern0_0 = arg0; + if pattern0_0 == I128 { + let pattern2_0 = arg1; + let pattern3_0 = arg2; + let pattern4_0 = arg3; + let pattern5_0 = arg4; + // Rule at src/isa/x64/inst.isle line 1595. + let expr0_0 = C::put_in_regs(ctx, pattern4_0); + let expr1_0 = C::put_in_regs(ctx, pattern5_0); + let expr2_0 = C::temp_writable_gpr(ctx); + let expr3_0 = C::temp_writable_gpr(ctx); + let expr4_0 = OperandSize::Size64; + let expr5_0: usize = 0; + let expr6_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr5_0)?; + let expr7_0 = C::gpr_to_gpr_mem(ctx, expr6_0); + let expr8_0: usize = 0; + let expr9_0 = constructor_value_regs_get_gpr(ctx, expr1_0, expr8_0)?; + let expr10_0 = MInst::CmoveOr { + size: expr4_0, + cc1: pattern2_0.clone(), + cc2: pattern3_0.clone(), + consequent: expr7_0, + alternative: expr9_0, + dst: expr2_0, + }; + let expr11_0: usize = 1; + let expr12_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr11_0)?; + let expr13_0 = C::gpr_to_gpr_mem(ctx, expr12_0); + let expr14_0: usize = 1; + let expr15_0 = constructor_value_regs_get_gpr(ctx, expr1_0, expr14_0)?; + let expr16_0 = MInst::CmoveOr { + size: expr4_0, + cc1: pattern2_0.clone(), + cc2: pattern3_0.clone(), + consequent: expr13_0, + alternative: expr15_0, + dst: expr3_0, + }; + let expr17_0 = C::writable_gpr_to_gpr(ctx, expr2_0); + let expr18_0 = C::gpr_to_reg(ctx, expr17_0); + let expr19_0 = C::writable_gpr_to_gpr(ctx, expr3_0); + let expr20_0 = C::gpr_to_reg(ctx, expr19_0); + let expr21_0 = C::value_regs(ctx, expr18_0, expr20_0); + let expr22_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { + inst1: expr10_0, + inst2: expr16_0, + result: expr21_0, + }; + return Some(expr22_0); + } + if let Some(pattern1_0) = C::is_xmm_type(ctx, pattern0_0) { + if let Some(pattern2_0) = C::is_single_register_type(ctx, pattern1_0) { + let pattern3_0 = arg1; + let pattern4_0 = arg2; + let pattern5_0 = arg3; + let pattern6_0 = arg4; + // Rule at src/isa/x64/inst.isle line 1612. + let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern5_0)?; + let expr1_0 = constructor_put_in_xmm(ctx, pattern6_0)?; + let expr2_0 = constructor_cmove_or_xmm( + ctx, pattern2_0, pattern3_0, pattern4_0, &expr0_0, expr1_0, + )?; + return Some(expr2_0); + } + } + if let Some(pattern1_0) = C::is_gpr_type(ctx, pattern0_0) { + if let Some(pattern2_0) = C::is_single_register_type(ctx, pattern1_0) { + let pattern3_0 = arg1; + let pattern4_0 = arg2; + let pattern5_0 = arg3; + let pattern6_0 = arg4; + // Rule at src/isa/x64/inst.isle line 1609. + let expr0_0 = constructor_put_in_gpr_mem(ctx, pattern5_0)?; + let expr1_0 = constructor_put_in_gpr(ctx, pattern6_0)?; + let expr2_0 = + constructor_cmove_or(ctx, pattern2_0, pattern3_0, pattern4_0, &expr0_0, expr1_0)?; + return Some(expr2_0); + } + } + return None; +} + // Generated as internal constructor for term movzx. pub fn constructor_movzx( ctx: &mut C, @@ -1666,7 +2030,7 @@ pub fn constructor_movzx( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1485. + // Rule at src/isa/x64/inst.isle line 1617. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = MInst::MovzxRmR { ext_mode: pattern1_0.clone(), @@ -1688,7 +2052,7 @@ pub fn constructor_movsx( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1492. + // Rule at src/isa/x64/inst.isle line 1624. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = MInst::MovsxRmR { ext_mode: pattern1_0.clone(), @@ -1712,7 +2076,7 @@ pub fn constructor_xmm_rm_r( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1499. + // Rule at src/isa/x64/inst.isle line 1631. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::XmmRmR { op: pattern1_0.clone(), @@ -1729,7 +2093,7 @@ pub fn constructor_xmm_rm_r( pub fn constructor_paddb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1506. + // Rule at src/isa/x64/inst.isle line 1638. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Paddb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1740,7 +2104,7 @@ pub fn constructor_paddb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_paddw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1511. + // Rule at src/isa/x64/inst.isle line 1643. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Paddw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1751,7 +2115,7 @@ pub fn constructor_paddw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_paddd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1516. + // Rule at src/isa/x64/inst.isle line 1648. let expr0_0: Type = I32X4; let expr1_0 = SseOpcode::Paddd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1762,7 +2126,7 @@ pub fn constructor_paddd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_paddq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1521. + // Rule at src/isa/x64/inst.isle line 1653. let expr0_0: Type = I64X2; let expr1_0 = SseOpcode::Paddq; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1773,7 +2137,7 @@ pub fn constructor_paddq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_paddsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1526. + // Rule at src/isa/x64/inst.isle line 1658. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Paddsb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1784,7 +2148,7 @@ pub fn constructor_paddsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_paddsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1531. + // Rule at src/isa/x64/inst.isle line 1663. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Paddsw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1795,7 +2159,7 @@ pub fn constructor_paddsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_paddusb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1536. + // Rule at src/isa/x64/inst.isle line 1668. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Paddusb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1806,7 +2170,7 @@ pub fn constructor_paddusb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_paddusw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1541. + // Rule at src/isa/x64/inst.isle line 1673. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Paddusw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1817,7 +2181,7 @@ pub fn constructor_paddusw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_psubb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1546. + // Rule at src/isa/x64/inst.isle line 1678. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Psubb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1828,7 +2192,7 @@ pub fn constructor_psubb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_psubw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1551. + // Rule at src/isa/x64/inst.isle line 1683. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Psubw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1839,7 +2203,7 @@ pub fn constructor_psubw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_psubd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1556. + // Rule at src/isa/x64/inst.isle line 1688. let expr0_0: Type = I32X4; let expr1_0 = SseOpcode::Psubd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1850,7 +2214,7 @@ pub fn constructor_psubd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_psubq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1561. + // Rule at src/isa/x64/inst.isle line 1693. let expr0_0: Type = I64X2; let expr1_0 = SseOpcode::Psubq; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1861,7 +2225,7 @@ pub fn constructor_psubq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_psubsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1566. + // Rule at src/isa/x64/inst.isle line 1698. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Psubsb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1872,7 +2236,7 @@ pub fn constructor_psubsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_psubsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1571. + // Rule at src/isa/x64/inst.isle line 1703. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Psubsw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1883,7 +2247,7 @@ pub fn constructor_psubsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_psubusb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1576. + // Rule at src/isa/x64/inst.isle line 1708. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Psubusb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1894,7 +2258,7 @@ pub fn constructor_psubusb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_psubusw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1581. + // Rule at src/isa/x64/inst.isle line 1713. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Psubusw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1905,7 +2269,7 @@ pub fn constructor_psubusw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pavgb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1586. + // Rule at src/isa/x64/inst.isle line 1718. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pavgb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1916,7 +2280,7 @@ pub fn constructor_pavgb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_pavgw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1591. + // Rule at src/isa/x64/inst.isle line 1723. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pavgw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1927,7 +2291,7 @@ pub fn constructor_pavgw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_pand(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1596. + // Rule at src/isa/x64/inst.isle line 1728. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Pand; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1938,7 +2302,7 @@ pub fn constructor_pand(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Op pub fn constructor_andps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1601. + // Rule at src/isa/x64/inst.isle line 1733. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Andps; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1949,7 +2313,7 @@ pub fn constructor_andps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_andpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1606. + // Rule at src/isa/x64/inst.isle line 1738. let expr0_0: Type = F64X2; let expr1_0 = SseOpcode::Andpd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1960,7 +2324,7 @@ pub fn constructor_andpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_por(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1611. + // Rule at src/isa/x64/inst.isle line 1743. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Por; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1971,7 +2335,7 @@ pub fn constructor_por(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Opt pub fn constructor_orps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1616. + // Rule at src/isa/x64/inst.isle line 1748. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Orps; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1982,7 +2346,7 @@ pub fn constructor_orps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Op pub fn constructor_orpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1621. + // Rule at src/isa/x64/inst.isle line 1753. let expr0_0: Type = F64X2; let expr1_0 = SseOpcode::Orpd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -1993,7 +2357,7 @@ pub fn constructor_orpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Op pub fn constructor_pxor(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1626. + // Rule at src/isa/x64/inst.isle line 1758. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pxor; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2004,7 +2368,7 @@ pub fn constructor_pxor(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Op pub fn constructor_xorps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1631. + // Rule at src/isa/x64/inst.isle line 1763. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Xorps; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2015,7 +2379,7 @@ pub fn constructor_xorps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_xorpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1636. + // Rule at src/isa/x64/inst.isle line 1768. let expr0_0: Type = F64X2; let expr1_0 = SseOpcode::Xorpd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2026,7 +2390,7 @@ pub fn constructor_xorpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_pmullw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1641. + // Rule at src/isa/x64/inst.isle line 1773. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pmullw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2037,7 +2401,7 @@ pub fn constructor_pmullw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmulld(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1646. + // Rule at src/isa/x64/inst.isle line 1778. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pmulld; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2048,7 +2412,7 @@ pub fn constructor_pmulld(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmulhw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1651. + // Rule at src/isa/x64/inst.isle line 1783. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pmulhw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2059,7 +2423,7 @@ pub fn constructor_pmulhw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmulhuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1656. + // Rule at src/isa/x64/inst.isle line 1788. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pmulhuw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2070,7 +2434,7 @@ pub fn constructor_pmulhuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmuldq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1661. + // Rule at src/isa/x64/inst.isle line 1793. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Pmuldq; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2081,7 +2445,7 @@ pub fn constructor_pmuldq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmuludq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1666. + // Rule at src/isa/x64/inst.isle line 1798. let expr0_0: Type = I64X2; let expr1_0 = SseOpcode::Pmuludq; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2092,7 +2456,7 @@ pub fn constructor_pmuludq(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_punpckhwd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1671. + // Rule at src/isa/x64/inst.isle line 1803. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Punpckhwd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2103,7 +2467,7 @@ pub fn constructor_punpckhwd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) pub fn constructor_punpcklwd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1676. + // Rule at src/isa/x64/inst.isle line 1808. let expr0_0: Type = I16X8; let expr1_0 = SseOpcode::Punpcklwd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2114,7 +2478,7 @@ pub fn constructor_punpcklwd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) pub fn constructor_andnps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1681. + // Rule at src/isa/x64/inst.isle line 1813. let expr0_0: Type = F32X4; let expr1_0 = SseOpcode::Andnps; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2125,7 +2489,7 @@ pub fn constructor_andnps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_andnpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1686. + // Rule at src/isa/x64/inst.isle line 1818. let expr0_0: Type = F64X2; let expr1_0 = SseOpcode::Andnpd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2136,7 +2500,7 @@ pub fn constructor_andnpd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pandn(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1691. + // Rule at src/isa/x64/inst.isle line 1823. let expr0_0: Type = F64X2; let expr1_0 = SseOpcode::Pandn; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2147,17 +2511,17 @@ pub fn constructor_pandn(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_sse_blend_op(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32X4 { - // Rule at src/isa/x64/inst.isle line 1695. + // Rule at src/isa/x64/inst.isle line 1827. let expr0_0 = SseOpcode::Blendvps; return Some(expr0_0); } if pattern0_0 == F64X2 { - // Rule at src/isa/x64/inst.isle line 1696. + // Rule at src/isa/x64/inst.isle line 1828. let expr0_0 = SseOpcode::Blendvpd; return Some(expr0_0); } if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { - // Rule at src/isa/x64/inst.isle line 1697. + // Rule at src/isa/x64/inst.isle line 1829. let expr0_0 = SseOpcode::Pblendvb; return Some(expr0_0); } @@ -2168,17 +2532,17 @@ pub fn constructor_sse_blend_op(ctx: &mut C, arg0: Type) -> Option(ctx: &mut C, arg0: Type) -> Option { let pattern0_0 = arg0; if pattern0_0 == F32X4 { - // Rule at src/isa/x64/inst.isle line 1700. + // Rule at src/isa/x64/inst.isle line 1832. let expr0_0 = SseOpcode::Movaps; return Some(expr0_0); } if pattern0_0 == F64X2 { - // Rule at src/isa/x64/inst.isle line 1701. + // Rule at src/isa/x64/inst.isle line 1833. let expr0_0 = SseOpcode::Movapd; return Some(expr0_0); } if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { - // Rule at src/isa/x64/inst.isle line 1702. + // Rule at src/isa/x64/inst.isle line 1834. let expr0_0 = SseOpcode::Movdqa; return Some(expr0_0); } @@ -2197,7 +2561,7 @@ pub fn constructor_sse_blend( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1706. + // Rule at src/isa/x64/inst.isle line 1838. let expr0_0 = C::xmm0(ctx); let expr1_0 = constructor_sse_mov_op(ctx, pattern0_0)?; let expr2_0 = MInst::XmmUnaryRmR { @@ -2221,7 +2585,7 @@ pub fn constructor_blendvpd( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1720. + // Rule at src/isa/x64/inst.isle line 1852. let expr0_0 = C::xmm0(ctx); let expr1_0 = SseOpcode::Movapd; let expr2_0 = C::xmm_to_xmm_mem(ctx, pattern2_0); @@ -2241,7 +2605,7 @@ pub fn constructor_blendvpd( pub fn constructor_movsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1734. + // Rule at src/isa/x64/inst.isle line 1866. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Movsd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2252,7 +2616,7 @@ pub fn constructor_movsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> O pub fn constructor_movlhps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1739. + // Rule at src/isa/x64/inst.isle line 1871. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Movlhps; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2263,7 +2627,7 @@ pub fn constructor_movlhps(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1744. + // Rule at src/isa/x64/inst.isle line 1876. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxsb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2274,7 +2638,7 @@ pub fn constructor_pmaxsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1749. + // Rule at src/isa/x64/inst.isle line 1881. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxsw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2285,7 +2649,7 @@ pub fn constructor_pmaxsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1754. + // Rule at src/isa/x64/inst.isle line 1886. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxsd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2296,7 +2660,7 @@ pub fn constructor_pmaxsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1759. + // Rule at src/isa/x64/inst.isle line 1891. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminsb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2307,7 +2671,7 @@ pub fn constructor_pminsb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1764. + // Rule at src/isa/x64/inst.isle line 1896. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminsw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2318,7 +2682,7 @@ pub fn constructor_pminsw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1769. + // Rule at src/isa/x64/inst.isle line 1901. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminsd; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2329,7 +2693,7 @@ pub fn constructor_pminsd(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxub(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1774. + // Rule at src/isa/x64/inst.isle line 1906. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxub; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2340,7 +2704,7 @@ pub fn constructor_pmaxub(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1779. + // Rule at src/isa/x64/inst.isle line 1911. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxuw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2351,7 +2715,7 @@ pub fn constructor_pmaxuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pmaxud(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1784. + // Rule at src/isa/x64/inst.isle line 1916. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pmaxud; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2362,7 +2726,7 @@ pub fn constructor_pmaxud(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminub(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1789. + // Rule at src/isa/x64/inst.isle line 1921. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminub; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2373,7 +2737,7 @@ pub fn constructor_pminub(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1794. + // Rule at src/isa/x64/inst.isle line 1926. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminuw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2384,7 +2748,7 @@ pub fn constructor_pminuw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_pminud(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1799. + // Rule at src/isa/x64/inst.isle line 1931. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Pminud; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2395,7 +2759,7 @@ pub fn constructor_pminud(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> pub fn constructor_punpcklbw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1804. + // Rule at src/isa/x64/inst.isle line 1936. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Punpcklbw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2406,7 +2770,7 @@ pub fn constructor_punpcklbw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) pub fn constructor_punpckhbw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1809. + // Rule at src/isa/x64/inst.isle line 1941. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Punpckhbw; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2417,7 +2781,7 @@ pub fn constructor_punpckhbw(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) pub fn constructor_packsswb(ctx: &mut C, arg0: Xmm, arg1: &XmmMem) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1814. + // Rule at src/isa/x64/inst.isle line 1946. let expr0_0: Type = I8X16; let expr1_0 = SseOpcode::Packsswb; let expr2_0 = constructor_xmm_rm_r(ctx, expr0_0, &expr1_0, pattern0_0, pattern1_0)?; @@ -2438,7 +2802,7 @@ pub fn constructor_xmm_rm_r_imm( let pattern2_0 = arg2; let pattern3_0 = arg3; let pattern4_0 = arg4; - // Rule at src/isa/x64/inst.isle line 1819. + // Rule at src/isa/x64/inst.isle line 1951. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_reg(ctx, expr0_0); let expr2_0 = MInst::XmmRmRImm { @@ -2466,7 +2830,7 @@ pub fn constructor_palignr( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1831. + // Rule at src/isa/x64/inst.isle line 1963. let expr0_0 = SseOpcode::Palignr; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::xmm_mem_to_reg_mem(ctx, pattern1_0); @@ -2485,7 +2849,7 @@ pub fn constructor_cmpps( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1840. + // Rule at src/isa/x64/inst.isle line 1972. let expr0_0 = SseOpcode::Cmpps; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::xmm_mem_to_reg_mem(ctx, pattern1_0); @@ -2505,7 +2869,7 @@ pub fn constructor_pinsrb( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1849. + // Rule at src/isa/x64/inst.isle line 1981. let expr0_0 = SseOpcode::Pinsrb; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::gpr_mem_to_reg_mem(ctx, pattern1_0); @@ -2524,7 +2888,7 @@ pub fn constructor_pinsrw( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1858. + // Rule at src/isa/x64/inst.isle line 1990. let expr0_0 = SseOpcode::Pinsrw; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::gpr_mem_to_reg_mem(ctx, pattern1_0); @@ -2545,7 +2909,7 @@ pub fn constructor_pinsrd( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1867. + // Rule at src/isa/x64/inst.isle line 1999. let expr0_0 = SseOpcode::Pinsrd; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::gpr_mem_to_reg_mem(ctx, pattern1_0); @@ -2564,7 +2928,7 @@ pub fn constructor_insertps( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1876. + // Rule at src/isa/x64/inst.isle line 2008. let expr0_0 = SseOpcode::Insertps; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::xmm_mem_to_reg_mem(ctx, pattern1_0); @@ -2583,7 +2947,7 @@ pub fn constructor_pshufd( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1885. + // Rule at src/isa/x64/inst.isle line 2017. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = C::writable_xmm_to_xmm(ctx, expr0_0); let expr2_0 = SseOpcode::Pshufd; @@ -2610,7 +2974,7 @@ pub fn constructor_xmm_unary_rm_r( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1898. + // Rule at src/isa/x64/inst.isle line 2030. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::XmmUnaryRmR { op: pattern0_0.clone(), @@ -2625,7 +2989,7 @@ pub fn constructor_xmm_unary_rm_r( // Generated as internal constructor for term pmovsxbw. pub fn constructor_pmovsxbw(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1905. + // Rule at src/isa/x64/inst.isle line 2037. let expr0_0 = SseOpcode::Pmovsxbw; let expr1_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2634,7 +2998,7 @@ pub fn constructor_pmovsxbw(ctx: &mut C, arg0: &XmmMem) -> Option(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1910. + // Rule at src/isa/x64/inst.isle line 2042. let expr0_0 = SseOpcode::Pmovzxbw; let expr1_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2643,7 +3007,7 @@ pub fn constructor_pmovzxbw(ctx: &mut C, arg0: &XmmMem) -> Option(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1915. + // Rule at src/isa/x64/inst.isle line 2047. let expr0_0 = SseOpcode::Pabsb; let expr1_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2652,7 +3016,7 @@ pub fn constructor_pabsb(ctx: &mut C, arg0: &XmmMem) -> Option // Generated as internal constructor for term pabsw. pub fn constructor_pabsw(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1920. + // Rule at src/isa/x64/inst.isle line 2052. let expr0_0 = SseOpcode::Pabsw; let expr1_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2661,7 +3025,7 @@ pub fn constructor_pabsw(ctx: &mut C, arg0: &XmmMem) -> Option // Generated as internal constructor for term pabsd. pub fn constructor_pabsd(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1925. + // Rule at src/isa/x64/inst.isle line 2057. let expr0_0 = SseOpcode::Pabsd; let expr1_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2675,7 +3039,7 @@ pub fn constructor_xmm_unary_rm_r_evex( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1930. + // Rule at src/isa/x64/inst.isle line 2062. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::XmmUnaryRmREvex { op: pattern0_0.clone(), @@ -2690,7 +3054,7 @@ pub fn constructor_xmm_unary_rm_r_evex( // Generated as internal constructor for term vpabsq. pub fn constructor_vpabsq(ctx: &mut C, arg0: &XmmMem) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 1937. + // Rule at src/isa/x64/inst.isle line 2069. let expr0_0 = Avx512Opcode::Vpabsq; let expr1_0 = constructor_xmm_unary_rm_r_evex(ctx, &expr0_0, pattern0_0)?; return Some(expr1_0); @@ -2706,7 +3070,7 @@ pub fn constructor_xmm_rm_r_evex( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1942. + // Rule at src/isa/x64/inst.isle line 2074. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::XmmRmREvex { op: pattern0_0.clone(), @@ -2723,7 +3087,7 @@ pub fn constructor_xmm_rm_r_evex( pub fn constructor_vpmullq(ctx: &mut C, arg0: &XmmMem, arg1: Xmm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1954. + // Rule at src/isa/x64/inst.isle line 2086. let expr0_0 = Avx512Opcode::Vpmullq; let expr1_0 = constructor_xmm_rm_r_evex(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2741,7 +3105,7 @@ pub fn constructor_mul_hi( let pattern1_0 = arg1; let pattern2_0 = arg2; let pattern3_0 = arg3; - // Rule at src/isa/x64/inst.isle line 1963. + // Rule at src/isa/x64/inst.isle line 2095. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::temp_writable_gpr(ctx); let expr2_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); @@ -2770,7 +3134,7 @@ pub fn constructor_mulhi_u( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1979. + // Rule at src/isa/x64/inst.isle line 2111. let expr0_0: bool = false; let expr1_0 = constructor_mul_hi(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; return Some(expr1_0); @@ -2786,7 +3150,7 @@ pub fn constructor_xmm_rmi_xmm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 1984. + // Rule at src/isa/x64/inst.isle line 2116. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::XmmRmiReg { opcode: pattern0_0.clone(), @@ -2803,7 +3167,7 @@ pub fn constructor_xmm_rmi_xmm( pub fn constructor_psllw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1994. + // Rule at src/isa/x64/inst.isle line 2126. let expr0_0 = SseOpcode::Psllw; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2813,7 +3177,7 @@ pub fn constructor_psllw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_pslld(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 1999. + // Rule at src/isa/x64/inst.isle line 2131. let expr0_0 = SseOpcode::Pslld; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2823,7 +3187,7 @@ pub fn constructor_pslld(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psllq(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2004. + // Rule at src/isa/x64/inst.isle line 2136. let expr0_0 = SseOpcode::Psllq; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2833,7 +3197,7 @@ pub fn constructor_psllq(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psrlw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2009. + // Rule at src/isa/x64/inst.isle line 2141. let expr0_0 = SseOpcode::Psrlw; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2843,7 +3207,7 @@ pub fn constructor_psrlw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psrld(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2014. + // Rule at src/isa/x64/inst.isle line 2146. let expr0_0 = SseOpcode::Psrld; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2853,7 +3217,7 @@ pub fn constructor_psrld(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psrlq(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2019. + // Rule at src/isa/x64/inst.isle line 2151. let expr0_0 = SseOpcode::Psrlq; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2863,7 +3227,7 @@ pub fn constructor_psrlq(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psraw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2024. + // Rule at src/isa/x64/inst.isle line 2156. let expr0_0 = SseOpcode::Psraw; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2873,7 +3237,7 @@ pub fn constructor_psraw(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) - pub fn constructor_psrad(ctx: &mut C, arg0: Xmm, arg1: &XmmMemImm) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2029. + // Rule at src/isa/x64/inst.isle line 2161. let expr0_0 = SseOpcode::Psrad; let expr1_0 = constructor_xmm_rmi_xmm(ctx, &expr0_0, pattern0_0, pattern1_0)?; return Some(expr1_0); @@ -2884,7 +3248,7 @@ pub fn constructor_pextrd(ctx: &mut C, arg0: Type, arg1: Xmm, arg2: let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 2034. + // Rule at src/isa/x64/inst.isle line 2166. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::writable_gpr_to_gpr(ctx, expr0_0); let expr2_0 = SseOpcode::Pextrd; @@ -2916,7 +3280,7 @@ pub fn constructor_cmppd( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 2051. + // Rule at src/isa/x64/inst.isle line 2183. let expr0_0 = SseOpcode::Cmppd; let expr1_0 = C::xmm_to_reg(ctx, pattern0_0); let expr2_0 = C::xmm_mem_to_reg_mem(ctx, pattern1_0); @@ -2936,7 +3300,7 @@ pub fn constructor_gpr_to_xmm( let pattern0_0 = arg0; let pattern1_0 = arg1; let pattern2_0 = arg2; - // Rule at src/isa/x64/inst.isle line 2060. + // Rule at src/isa/x64/inst.isle line 2192. let expr0_0 = C::temp_writable_xmm(ctx); let expr1_0 = MInst::GprToXmm { op: pattern0_0.clone(), @@ -2953,7 +3317,7 @@ pub fn constructor_gpr_to_xmm( pub fn constructor_not(ctx: &mut C, arg0: Type, arg1: Gpr) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2067. + // Rule at src/isa/x64/inst.isle line 2199. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = MInst::Not { @@ -2970,7 +3334,7 @@ pub fn constructor_not(ctx: &mut C, arg0: Type, arg1: Gpr) -> Option pub fn constructor_neg(ctx: &mut C, arg0: Type, arg1: Gpr) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/inst.isle line 2075. + // Rule at src/isa/x64/inst.isle line 2207. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = C::operand_size_of_type_32_64(ctx, pattern0_0); let expr2_0 = MInst::Neg { @@ -2986,7 +3350,7 @@ pub fn constructor_neg(ctx: &mut C, arg0: Type, arg1: Gpr) -> Option // Generated as internal constructor for term lea. pub fn constructor_lea(ctx: &mut C, arg0: &SyntheticAmode) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 2082. + // Rule at src/isa/x64/inst.isle line 2214. let expr0_0 = C::temp_writable_gpr(ctx); let expr1_0 = MInst::LoadEffectiveAddress { addr: pattern0_0.clone(), @@ -3000,7 +3364,7 @@ pub fn constructor_lea(ctx: &mut C, arg0: &SyntheticAmode) -> Option // Generated as internal constructor for term ud2. pub fn constructor_ud2(ctx: &mut C, arg0: &TrapCode) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/inst.isle line 2089. + // Rule at src/isa/x64/inst.isle line 2221. let expr0_0 = MInst::Ud2 { trap_code: pattern0_0.clone(), }; @@ -3017,7 +3381,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::F32const = &pattern2_0 { + if let &Opcode::F32const = pattern2_0 { let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); // Rule at src/isa/x64/lower.isle line 46. let expr0_0: Type = F32; @@ -3030,7 +3394,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::F64const = &pattern2_0 { + if let &Opcode::F64const = pattern2_0 { let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); // Rule at src/isa/x64/lower.isle line 51. let expr0_0: Type = F64; @@ -3043,16 +3407,16 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern2_0 { + match pattern2_0 { &Opcode::Trap => { - // Rule at src/isa/x64/lower.isle line 1532. - let expr0_0 = constructor_ud2(ctx, &pattern2_1)?; + // Rule at src/isa/x64/lower.isle line 1519. + let expr0_0 = constructor_ud2(ctx, pattern2_1)?; let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; return Some(expr1_0); } &Opcode::ResumableTrap => { - // Rule at src/isa/x64/lower.isle line 1537. - let expr0_0 = constructor_ud2(ctx, &pattern2_1)?; + // Rule at src/isa/x64/lower.isle line 1524. + let expr0_0 = constructor_ud2(ctx, pattern2_1)?; let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; return Some(expr1_0); } @@ -3064,11 +3428,11 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Insertlane = &pattern2_0 { - let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); + if let &Opcode::Insertlane = pattern2_0 { + let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); let pattern5_0 = C::value_type(ctx, pattern4_0); let pattern6_0 = C::u8_from_uimm8(ctx, pattern2_2); - // Rule at src/isa/x64/lower.isle line 1399. + // Rule at src/isa/x64/lower.isle line 1386. let expr0_0 = constructor_put_in_xmm(ctx, pattern4_0)?; let expr1_0 = C::put_in_reg_mem(ctx, pattern4_1); let expr2_0 = @@ -3088,7 +3452,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bconst = &pattern5_0 { + if let &Opcode::Bconst = pattern5_0 { if pattern5_1 == true { // Rule at src/isa/x64/lower.isle line 39. let expr0_0: Type = B64; @@ -3117,10 +3481,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Band => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 386. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3135,8 +3498,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 462. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3151,8 +3513,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 528. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3173,8 +3534,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bnot = &pattern5_0 { - // Rule at src/isa/x64/lower.isle line 1366. + if let &Opcode::Bnot = pattern5_0 { + // Rule at src/isa/x64/lower.isle line 1353. let expr0_0 = constructor_i128_not(ctx, pattern5_1)?; return Some(expr0_0); } @@ -3189,7 +3550,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern5_0 { + if let &Opcode::Iconst = pattern5_0 { let pattern7_0 = C::u64_from_imm64(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 15. let expr0_0: Type = I64; @@ -3205,10 +3566,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Iadd => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 117. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3222,17 +3582,18 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 286. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3246,18 +3607,19 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1052. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1039. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; let expr2_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr1_0)?; @@ -3291,8 +3653,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 376. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3314,8 +3675,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 459. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = C::put_in_regs(ctx, pattern7_1); @@ -3323,8 +3683,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 518. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0: usize = 0; @@ -3346,9 +3705,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 916. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 903. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = constructor_lo_gpr(ctx, pattern7_1)?; let expr2_0 = constructor_shl_i128(ctx, expr0_0, expr1_0)?; @@ -3364,9 +3722,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 958. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 945. let expr0_0 = C::put_in_regs(ctx, pattern7_0); let expr1_0 = constructor_lo_gpr(ctx, pattern7_1)?; let expr2_0 = constructor_shr_i128(ctx, expr0_0, expr1_0)?; @@ -3382,27 +3739,24 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 583. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 582. let expr0_0 = constructor_lo_gpr(ctx, pattern7_1)?; let expr1_0 = C::put_in_regs(ctx, pattern7_0); let expr2_0 = constructor_shl_i128(ctx, expr1_0, expr0_0)?; return Some(expr2_0); } &Opcode::Ushr => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 695. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 688. let expr0_0 = constructor_lo_gpr(ctx, pattern7_1)?; let expr1_0 = C::put_in_regs(ctx, pattern7_0); let expr2_0 = constructor_shr_i128(ctx, expr1_0, expr0_0)?; return Some(expr2_0); } &Opcode::Sshr => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 810. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 797. let expr0_0 = constructor_lo_gpr(ctx, pattern7_1)?; let expr1_0 = C::put_in_regs(ctx, pattern7_0); let expr2_0 = constructor_sar_i128(ctx, expr1_0, expr0_0)?; @@ -3415,8 +3769,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bnot = &pattern5_0 { - // Rule at src/isa/x64/lower.isle line 1363. + if let &Opcode::Bnot = pattern5_0 { + // Rule at src/isa/x64/lower.isle line 1350. let expr0_0 = constructor_i128_not(ctx, pattern5_1)?; return Some(expr0_0); } @@ -3426,7 +3780,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::IaddImm = &pattern5_0 { + if let &Opcode::IaddImm = pattern5_0 { let pattern7_0 = C::u64_from_imm64(ctx, pattern5_2); // Rule at src/isa/x64/lower.isle line 232. let expr0_0 = C::put_in_regs(ctx, pattern5_1); @@ -3439,12 +3793,13 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Imin => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1499. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1486. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminsb(ctx, expr0_0, &expr1_0)?; @@ -3471,9 +3825,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1521. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1508. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminub(ctx, expr0_0, &expr1_0)?; @@ -3481,9 +3834,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1488. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1475. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxsb(ctx, expr0_0, &expr1_0)?; @@ -3491,9 +3843,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1510. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1497. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxub(ctx, expr0_0, &expr1_0)?; @@ -3501,9 +3852,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 595. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 594. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3520,9 +3870,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 705. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 698. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3539,10 +3888,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); let pattern8_0 = C::value_type(ctx, pattern7_1); - // Rule at src/isa/x64/lower.isle line 831. + // Rule at src/isa/x64/lower.isle line 818. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::xmm_to_xmm_mem(ctx, expr0_0); let expr2_0 = constructor_punpcklbw(ctx, expr0_0, &expr1_0)?; @@ -3565,9 +3913,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { - // Rule at src/isa/x64/lower.isle line 977. + // Rule at src/isa/x64/lower.isle line 964. let expr0_0: Type = I8X16; let expr1_0: u64 = 0; let expr2_0 = constructor_imm(ctx, expr0_0, expr1_0)?; @@ -3578,7 +3926,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/x64/lower.isle line 1307. + // Rule at src/isa/x64/lower.isle line 1294. let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern5_1)?; let expr1_0 = constructor_pabsb(ctx, &expr0_0)?; let expr2_0 = constructor_value_xmm(ctx, expr1_0)?; @@ -3597,11 +3945,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Imin => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1502. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1489. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminsw(ctx, expr0_0, &expr1_0)?; @@ -3609,9 +3956,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1524. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1511. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminuw(ctx, expr0_0, &expr1_0)?; @@ -3619,9 +3965,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1491. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1478. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxsw(ctx, expr0_0, &expr1_0)?; @@ -3629,9 +3974,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1513. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1500. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxuw(ctx, expr0_0, &expr1_0)?; @@ -3639,9 +3983,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 639. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 638. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3650,9 +3993,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 751. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 744. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3661,9 +4003,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 858. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 845. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3678,9 +4019,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { - // Rule at src/isa/x64/lower.isle line 981. + // Rule at src/isa/x64/lower.isle line 968. let expr0_0: Type = I16X8; let expr1_0: u64 = 0; let expr2_0 = constructor_imm(ctx, expr0_0, expr1_0)?; @@ -3691,7 +4032,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/x64/lower.isle line 1310. + // Rule at src/isa/x64/lower.isle line 1297. let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern5_1)?; let expr1_0 = constructor_pabsw(ctx, &expr0_0)?; let expr2_0 = constructor_value_xmm(ctx, expr1_0)?; @@ -3710,11 +4051,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Imin => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1505. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1492. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminsd(ctx, expr0_0, &expr1_0)?; @@ -3722,9 +4062,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1527. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1514. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pminud(ctx, expr0_0, &expr1_0)?; @@ -3732,9 +4071,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1494. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1481. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxsd(ctx, expr0_0, &expr1_0)?; @@ -3742,9 +4080,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1516. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1503. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_pmaxud(ctx, expr0_0, &expr1_0)?; @@ -3752,9 +4089,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 643. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 642. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3763,9 +4099,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 755. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 748. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3774,9 +4109,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 862. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 849. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3791,9 +4125,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { - // Rule at src/isa/x64/lower.isle line 985. + // Rule at src/isa/x64/lower.isle line 972. let expr0_0: Type = I32X4; let expr1_0: u64 = 0; let expr2_0 = constructor_imm(ctx, expr0_0, expr1_0)?; @@ -3804,7 +4138,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/x64/lower.isle line 1313. + // Rule at src/isa/x64/lower.isle line 1300. let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern5_1)?; let expr1_0 = constructor_pabsd(ctx, &expr0_0)?; let expr2_0 = constructor_value_xmm(ctx, expr1_0)?; @@ -3823,11 +4157,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ishl => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 647. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 646. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3836,9 +4169,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 759. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 752. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = C::put_in_reg_mem_imm(ctx, pattern7_1); let expr2_0 = constructor_mov_rmi_to_xmm(ctx, &expr1_0)?; @@ -3847,9 +4179,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 874. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 861. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0: Type = I64; let expr2_0: u8 = 0; @@ -3877,9 +4208,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { - // Rule at src/isa/x64/lower.isle line 989. + // Rule at src/isa/x64/lower.isle line 976. let expr0_0: Type = I64X2; let expr1_0: u64 = 0; let expr2_0 = constructor_imm(ctx, expr0_0, expr1_0)?; @@ -3890,7 +4221,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - // Rule at src/isa/x64/lower.isle line 1327. + // Rule at src/isa/x64/lower.isle line 1314. let expr0_0 = constructor_put_in_xmm(ctx, pattern5_1)?; let expr1_0: Type = I64X2; let expr2_0: u64 = 0; @@ -3916,8 +4247,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Null = &pattern4_0 { + if let &Opcode::Null = pattern4_0 { // Rule at src/isa/x64/lower.isle line 56. let expr0_0: u64 = 0; let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; @@ -3972,9 +4303,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::BandNot = &pattern4_0 { - let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); - // Rule at src/isa/x64/lower.isle line 1300. + if let &Opcode::BandNot = pattern4_0 { + let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); + // Rule at src/isa/x64/lower.isle line 1287. let expr0_0 = constructor_put_in_xmm(ctx, pattern6_1)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern6_0)?; let expr2_0 = constructor_sse_and_not(ctx, pattern2_0, expr0_0, &expr1_0)?; @@ -3982,6 +4313,180 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { + if let &Opcode::Select = pattern4_0 { + let (pattern6_0, pattern6_1, pattern6_2) = + C::unpack_value_array_3(ctx, pattern4_1); + if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { + let pattern8_0 = C::inst_data(ctx, pattern7_0); + if let &InstructionData::FloatCompare { + opcode: ref pattern9_0, + args: ref pattern9_1, + cond: ref pattern9_2, + } = &pattern8_0 + { + if let &Opcode::Fcmp = pattern9_0 { + let (pattern11_0, pattern11_1) = + C::unpack_value_array_2(ctx, pattern9_1); + match pattern9_2 { + &FloatCC::Equal => { + // Rule at src/isa/x64/lower.isle line 1608. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::NZ; + let expr2_0 = CC::P; + let expr3_0 = constructor_cmove_or_from_values( + ctx, pattern2_0, &expr1_0, &expr2_0, pattern6_2, + pattern6_1, + )?; + let expr4_0 = + constructor_with_flags(ctx, &expr0_0, &expr3_0)?; + return Some(expr4_0); + } + &FloatCC::GreaterThan => { + // Rule at src/isa/x64/lower.isle line 1560. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::NBE; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::GreaterThanOrEqual => { + // Rule at src/isa/x64/lower.isle line 1563. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::NB; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::LessThan => { + // Rule at src/isa/x64/lower.isle line 1583. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::NBE; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::LessThanOrEqual => { + // Rule at src/isa/x64/lower.isle line 1586. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::NB; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::NotEqual => { + // Rule at src/isa/x64/lower.isle line 1611. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::NZ; + let expr2_0 = CC::P; + let expr3_0 = constructor_cmove_or_from_values( + ctx, pattern2_0, &expr1_0, &expr2_0, pattern6_1, + pattern6_2, + )?; + let expr4_0 = + constructor_with_flags(ctx, &expr0_0, &expr3_0)?; + return Some(expr4_0); + } + &FloatCC::Ordered => { + // Rule at src/isa/x64/lower.isle line 1554. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::NP; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::Unordered => { + // Rule at src/isa/x64/lower.isle line 1557. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::P; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::UnorderedOrGreaterThan => { + // Rule at src/isa/x64/lower.isle line 1589. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::B; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::UnorderedOrGreaterThanOrEqual => { + // Rule at src/isa/x64/lower.isle line 1592. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_0, pattern11_1)?; + let expr1_0 = CC::BE; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::UnorderedOrLessThan => { + // Rule at src/isa/x64/lower.isle line 1566. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::B; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + &FloatCC::UnorderedOrLessThanOrEqual => { + // Rule at src/isa/x64/lower.isle line 1569. + let expr0_0 = + constructor_fpcmp(ctx, pattern11_1, pattern11_0)?; + let expr1_0 = CC::BE; + let expr2_0 = constructor_cmove_from_values( + ctx, pattern2_0, &expr1_0, pattern6_1, pattern6_2, + )?; + let expr3_0 = + constructor_with_flags(ctx, &expr0_0, &expr2_0)?; + return Some(expr3_0); + } + _ => {} + } + } + } + } + } + } _ => {} } if let Some(()) = C::avx512vl_enabled(ctx, pattern2_0) { @@ -3995,10 +4500,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); - // Rule at src/isa/x64/lower.isle line 995. + C::unpack_value_array_2(ctx, pattern7_1); + // Rule at src/isa/x64/lower.isle line 982. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; let expr2_0 = constructor_pavgb(ctx, expr0_0, &expr1_0)?; @@ -4051,7 +4556,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 144. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4061,7 +4566,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 132. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4071,7 +4576,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 313. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4081,7 +4586,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 301. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4091,7 +4596,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 96. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4101,7 +4606,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 265. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4122,11 +4627,11 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); - // Rule at src/isa/x64/lower.isle line 999. + C::unpack_value_array_2(ctx, pattern7_1); + // Rule at src/isa/x64/lower.isle line 986. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; let expr2_0 = constructor_pavgw(ctx, expr0_0, &expr1_0)?; @@ -4135,7 +4640,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 149. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4145,7 +4650,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 137. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4155,7 +4660,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 318. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4165,7 +4670,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 306. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4175,7 +4680,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 101. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4185,7 +4690,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 270. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4195,7 +4700,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); if let Some(pattern10_0) = C::def_inst(ctx, pattern9_0) { let pattern11_0 = C::inst_data(ctx, pattern10_0); if let &InstructionData::Unary { @@ -4203,7 +4708,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let pattern14_0 = C::value_type(ctx, pattern12_1); if let Some((pattern15_0, pattern15_1)) = @@ -4222,7 +4727,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 106. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4485,7 +4990,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 275. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4495,7 +5000,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); if let Some(pattern10_0) = C::def_inst(ctx, pattern9_0) { let pattern11_0 = C::inst_data(ctx, pattern10_0); if let &InstructionData::Unary { @@ -4503,7 +5008,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let pattern14_0 = C::value_type(ctx, pattern12_1); if let Some((pattern15_0, pattern15_1)) = @@ -4522,7 +5027,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 111. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4773,7 +5278,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); // Rule at src/isa/x64/lower.isle line 280. let expr0_0 = constructor_put_in_xmm(ctx, pattern9_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern9_1)?; @@ -4783,7 +5288,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern9_0, pattern9_1) = - C::unpack_value_array_2(ctx, &pattern7_1); + C::unpack_value_array_2(ctx, pattern7_1); if let Some(pattern10_0) = C::def_inst(ctx, pattern9_0) { let pattern11_0 = C::inst_data(ctx, pattern10_0); if let &InstructionData::Unary { @@ -4791,7 +5296,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let pattern14_0 = C::value_type(ctx, pattern12_1); if let Some((pattern15_0, pattern15_1)) = @@ -4810,7 +5315,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Band => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 368. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; @@ -5087,8 +5591,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 442. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; @@ -5097,8 +5600,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 513. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; @@ -5113,11 +5615,11 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Bitselect => { let (pattern7_0, pattern7_1, pattern7_2) = - C::unpack_value_array_3(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1376. + C::unpack_value_array_3(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1363. let expr0_0 = constructor_put_in_xmm(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm(ctx, pattern7_1)?; let expr2_0 = C::xmm_to_xmm_mem(ctx, expr0_0); @@ -5132,8 +5634,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { let (pattern7_0, pattern7_1, pattern7_2) = - C::unpack_value_array_3(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1390. + C::unpack_value_array_3(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1377. let expr0_0 = constructor_put_in_xmm_mem(ctx, pattern7_0)?; let expr1_0 = constructor_put_in_xmm_mem(ctx, pattern7_1)?; let expr2_0 = constructor_put_in_xmm(ctx, pattern7_2)?; @@ -5150,8 +5652,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bnot = &pattern5_0 { - // Rule at src/isa/x64/lower.isle line 1371. + if let &Opcode::Bnot = pattern5_0 { + // Rule at src/isa/x64/lower.isle line 1358. let expr0_0 = constructor_put_in_xmm(ctx, pattern5_1)?; let expr1_0 = constructor_vector_all_ones(ctx, pattern2_0)?; let expr2_0 = C::xmm_to_xmm_mem(ctx, expr1_0); @@ -5170,7 +5672,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Iconst = &pattern5_0 { + if let &Opcode::Iconst = pattern5_0 { let pattern7_0 = C::u64_from_imm64(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 10. let expr0_0 = constructor_imm(ctx, pattern3_0, pattern7_0)?; @@ -5182,7 +5684,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::Bconst = &pattern5_0 { + if let &Opcode::Bconst = pattern5_0 { if pattern5_1 == true { // Rule at src/isa/x64/lower.isle line 28. let expr0_0: u64 = 1; @@ -5203,11 +5705,10 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Imin => { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1480. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1467. let expr0_0 = CC::L; let expr1_0 = constructor_cmp_and_choose( ctx, pattern3_0, &expr0_0, pattern7_0, pattern7_1, @@ -5215,9 +5716,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1474. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1461. let expr0_0 = CC::B; let expr1_0 = constructor_cmp_and_choose( ctx, pattern3_0, &expr0_0, pattern7_0, pattern7_1, @@ -5225,9 +5725,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1483. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1470. let expr0_0 = CC::NL; let expr1_0 = constructor_cmp_and_choose( ctx, pattern3_0, &expr0_0, pattern7_0, pattern7_1, @@ -5235,9 +5734,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 1477. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 1464. let expr0_0 = CC::NB; let expr1_0 = constructor_cmp_and_choose( ctx, pattern3_0, &expr0_0, pattern7_0, pattern7_1, @@ -5245,8 +5743,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { // Rule at src/isa/x64/lower.isle line 76. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_1)?; @@ -5290,8 +5787,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_1) { // Rule at src/isa/x64/lower.isle line 252. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_0)?; @@ -5317,10 +5813,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { - // Rule at src/isa/x64/lower.isle line 1019. + // Rule at src/isa/x64/lower.isle line 1006. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_1)?; let expr1_0 = constructor_mul(ctx, pattern3_0, expr0_0, &pattern8_0)?; @@ -5328,7 +5823,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { // Rule at src/isa/x64/lower.isle line 183. let expr0_0 = C::temp_writable_gpr(ctx); @@ -5415,8 +5909,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { // Rule at src/isa/x64/lower.isle line 355. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_1)?; @@ -5461,8 +5954,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { // Rule at src/isa/x64/lower.isle line 429. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_1)?; @@ -5505,8 +5997,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::simm32_from_value(ctx, pattern7_0) { // Rule at src/isa/x64/lower.isle line 505. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_1)?; @@ -5549,8 +6040,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); // Rule at src/isa/x64/lower.isle line 543. let expr0_0 = constructor_put_in_gpr(ctx, pattern7_0)?; let expr1_0 = C::put_masked_in_imm8_gpr(ctx, pattern7_1, pattern3_0); @@ -5559,9 +6049,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 655. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 654. let expr0_0 = ExtendKind::Zero; let expr1_0 = constructor_extend_to_gpr(ctx, pattern7_0, pattern3_0, &expr0_0)?; @@ -5571,9 +6060,8 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = - C::unpack_value_array_2(ctx, &pattern5_1); - // Rule at src/isa/x64/lower.isle line 767. + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); + // Rule at src/isa/x64/lower.isle line 760. let expr0_0 = ExtendKind::Sign; let expr1_0 = constructor_extend_to_gpr(ctx, pattern7_0, pattern3_0, &expr0_0)?; @@ -5589,16 +6077,16 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - match &pattern5_0 { + match pattern5_0 { &Opcode::Ineg => { - // Rule at src/isa/x64/lower.isle line 972. + // Rule at src/isa/x64/lower.isle line 959. let expr0_0 = constructor_put_in_gpr(ctx, pattern5_1)?; let expr1_0 = constructor_neg(ctx, pattern3_0, expr0_0)?; let expr2_0 = constructor_value_gpr(ctx, expr1_0)?; return Some(expr2_0); } &Opcode::Bnot => { - // Rule at src/isa/x64/lower.isle line 1350. + // Rule at src/isa/x64/lower.isle line 1337. let expr0_0 = constructor_put_in_gpr(ctx, pattern5_1)?; let expr1_0 = constructor_not(ctx, pattern3_0, expr0_0)?; let expr2_0 = constructor_value_gpr(ctx, expr1_0)?; @@ -5612,7 +6100,7 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - if let &Opcode::IaddImm = &pattern5_0 { + if let &Opcode::IaddImm = pattern5_0 { let pattern7_0 = C::u64_from_imm64(ctx, pattern5_2); // Rule at src/isa/x64/lower.isle line 218. let expr0_0 = constructor_put_in_gpr(ctx, pattern5_1)?; @@ -5634,9 +6122,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5644,9 +6132,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5674,9 +6162,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5716,9 +6204,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option { - let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); + let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { let pattern9_0 = C::inst_data(ctx, pattern8_0); if let &InstructionData::UnaryImm { @@ -5749,9 +6237,9 @@ pub fn constructor_lower(ctx: &mut C, arg0: Inst) -> Option(ctx: &mut C, arg0: Inst) -> Option( let expr30_0 = CC::Z; let expr31_0 = C::gpr_to_gpr_mem(ctx, expr23_0); let expr32_0 = constructor_cmove(ctx, expr29_0, &expr30_0, &expr31_0, expr19_0)?; - let expr33_0 = constructor_with_flags_1(ctx, &expr28_0, &expr32_0)?; + let expr33_0 = constructor_with_flags_reg(ctx, &expr28_0, &expr32_0)?; let expr34_0 = C::gpr_new(ctx, expr33_0); let expr35_0: Type = I64; let expr36_0 = C::gpr_to_gpr_mem_imm(ctx, expr9_0); @@ -5932,8 +6420,9 @@ pub fn constructor_shl_i128( let expr48_0 = CC::Z; let expr49_0 = C::gpr_to_gpr_mem(ctx, expr37_0); let expr50_0 = constructor_cmove(ctx, expr47_0, &expr48_0, &expr49_0, expr6_0)?; - let expr51_0 = constructor_with_flags_2(ctx, &expr42_0, &expr46_0, &expr50_0)?; - return Some(expr51_0); + let expr51_0 = constructor_consumes_flags_concat(ctx, &expr46_0, &expr50_0)?; + let expr52_0 = constructor_with_flags(ctx, &expr42_0, &expr51_0)?; + return Some(expr52_0); } // Generated as internal constructor for term ishl_i8x16_mask. @@ -5944,12 +6433,12 @@ pub fn constructor_ishl_i8x16_mask( let pattern0_0 = arg0; match pattern0_0 { &RegMemImm::Imm { simm32: pattern1_0 } => { - // Rule at src/isa/x64/lower.isle line 615. + // Rule at src/isa/x64/lower.isle line 614. let expr0_0 = C::ishl_i8x16_mask_for_const(ctx, pattern1_0); return Some(expr0_0); } &RegMemImm::Reg { reg: pattern1_0 } => { - // Rule at src/isa/x64/lower.isle line 624. + // Rule at src/isa/x64/lower.isle line 623. let expr0_0 = C::ishl_i8x16_mask_table(ctx); let expr1_0 = constructor_lea(ctx, &expr0_0)?; let expr2_0: Type = I64; @@ -5966,10 +6455,10 @@ pub fn constructor_ishl_i8x16_mask( &RegMemImm::Mem { addr: ref pattern1_0, } => { - // Rule at src/isa/x64/lower.isle line 634. + // Rule at src/isa/x64/lower.isle line 633. let expr0_0: Type = I64; let expr1_0 = ExtKind::None; - let expr2_0 = constructor_x64_load(ctx, expr0_0, &pattern1_0, &expr1_0)?; + let expr2_0 = constructor_x64_load(ctx, expr0_0, pattern1_0, &expr1_0)?; let expr3_0 = RegMemImm::Reg { reg: expr2_0 }; let expr4_0 = constructor_ishl_i8x16_mask(ctx, &expr3_0)?; return Some(expr4_0); @@ -5987,7 +6476,7 @@ pub fn constructor_shr_i128( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/lower.isle line 662. + // Rule at src/isa/x64/lower.isle line 661. let expr0_0: usize = 0; let expr1_0 = constructor_value_regs_get_gpr(ctx, pattern0_0, expr0_0)?; let expr2_0: usize = 1; @@ -6021,7 +6510,7 @@ pub fn constructor_shr_i128( let expr30_0 = C::gpr_new(ctx, expr29_0); let expr31_0 = C::gpr_to_gpr_mem(ctx, expr30_0); let expr32_0 = constructor_cmove(ctx, expr25_0, &expr26_0, &expr31_0, expr19_0)?; - let expr33_0 = constructor_with_flags_1(ctx, &expr24_0, &expr32_0)?; + let expr33_0 = constructor_with_flags_reg(ctx, &expr24_0, &expr32_0)?; let expr34_0 = C::gpr_new(ctx, expr33_0); let expr35_0: Type = I64; let expr36_0 = C::gpr_to_gpr_mem_imm(ctx, expr6_0); @@ -6043,8 +6532,9 @@ pub fn constructor_shr_i128( let expr52_0 = constructor_imm(ctx, expr50_0, expr51_0)?; let expr53_0 = C::gpr_new(ctx, expr52_0); let expr54_0 = constructor_cmove(ctx, expr47_0, &expr48_0, &expr49_0, expr53_0)?; - let expr55_0 = constructor_with_flags_2(ctx, &expr42_0, &expr46_0, &expr54_0)?; - return Some(expr55_0); + let expr55_0 = constructor_consumes_flags_concat(ctx, &expr46_0, &expr54_0)?; + let expr56_0 = constructor_with_flags(ctx, &expr42_0, &expr55_0)?; + return Some(expr56_0); } // Generated as internal constructor for term ushr_i8x16_mask. @@ -6055,12 +6545,12 @@ pub fn constructor_ushr_i8x16_mask( let pattern0_0 = arg0; match pattern0_0 { &RegMemImm::Imm { simm32: pattern1_0 } => { - // Rule at src/isa/x64/lower.isle line 727. + // Rule at src/isa/x64/lower.isle line 720. let expr0_0 = C::ushr_i8x16_mask_for_const(ctx, pattern1_0); return Some(expr0_0); } &RegMemImm::Reg { reg: pattern1_0 } => { - // Rule at src/isa/x64/lower.isle line 736. + // Rule at src/isa/x64/lower.isle line 729. let expr0_0 = C::ushr_i8x16_mask_table(ctx); let expr1_0 = constructor_lea(ctx, &expr0_0)?; let expr2_0: Type = I64; @@ -6077,10 +6567,10 @@ pub fn constructor_ushr_i8x16_mask( &RegMemImm::Mem { addr: ref pattern1_0, } => { - // Rule at src/isa/x64/lower.isle line 746. + // Rule at src/isa/x64/lower.isle line 739. let expr0_0: Type = I64; let expr1_0 = ExtKind::None; - let expr2_0 = constructor_x64_load(ctx, expr0_0, &pattern1_0, &expr1_0)?; + let expr2_0 = constructor_x64_load(ctx, expr0_0, pattern1_0, &expr1_0)?; let expr3_0 = RegMemImm::Reg { reg: expr2_0 }; let expr4_0 = constructor_ushr_i8x16_mask(ctx, &expr3_0)?; return Some(expr4_0); @@ -6098,7 +6588,7 @@ pub fn constructor_sar_i128( ) -> Option { let pattern0_0 = arg0; let pattern1_0 = arg1; - // Rule at src/isa/x64/lower.isle line 774. + // Rule at src/isa/x64/lower.isle line 767. let expr0_0: usize = 0; let expr1_0 = constructor_value_regs_get_gpr(ctx, pattern0_0, expr0_0)?; let expr2_0: usize = 1; @@ -6132,7 +6622,7 @@ pub fn constructor_sar_i128( let expr30_0 = C::gpr_new(ctx, expr29_0); let expr31_0 = C::gpr_to_gpr_mem(ctx, expr30_0); let expr32_0 = constructor_cmove(ctx, expr25_0, &expr26_0, &expr31_0, expr19_0)?; - let expr33_0 = constructor_with_flags_1(ctx, &expr24_0, &expr32_0)?; + let expr33_0 = constructor_with_flags_reg(ctx, &expr24_0, &expr32_0)?; let expr34_0 = C::gpr_new(ctx, expr33_0); let expr35_0: Type = I64; let expr36_0 = C::gpr_to_gpr_mem_imm(ctx, expr34_0); @@ -6154,8 +6644,9 @@ pub fn constructor_sar_i128( let expr52_0 = CC::Z; let expr53_0 = C::gpr_to_gpr_mem(ctx, expr9_0); let expr54_0 = constructor_cmove(ctx, expr51_0, &expr52_0, &expr53_0, expr41_0)?; - let expr55_0 = constructor_with_flags_2(ctx, &expr46_0, &expr50_0, &expr54_0)?; - return Some(expr55_0); + let expr55_0 = constructor_consumes_flags_concat(ctx, &expr50_0, &expr54_0)?; + let expr56_0 = constructor_with_flags(ctx, &expr46_0, &expr55_0)?; + return Some(expr56_0); } // Generated as internal constructor for term sshr_i8x16_bigger_shift. @@ -6168,7 +6659,7 @@ pub fn constructor_sshr_i8x16_bigger_shift( let pattern1_0 = arg1; match pattern1_0 { &RegMemImm::Imm { simm32: pattern2_0 } => { - // Rule at src/isa/x64/lower.isle line 844. + // Rule at src/isa/x64/lower.isle line 831. let expr0_0: u32 = 8; let expr1_0 = C::u32_add(ctx, pattern2_0, expr0_0); let expr2_0 = RegMemImm::Imm { simm32: expr1_0 }; @@ -6176,7 +6667,7 @@ pub fn constructor_sshr_i8x16_bigger_shift( return Some(expr3_0); } &RegMemImm::Reg { reg: pattern2_0 } => { - // Rule at src/isa/x64/lower.isle line 846. + // Rule at src/isa/x64/lower.isle line 833. let expr0_0 = C::gpr_new(ctx, pattern2_0); let expr1_0: u32 = 8; let expr2_0 = RegMemImm::Imm { simm32: expr1_0 }; @@ -6190,7 +6681,7 @@ pub fn constructor_sshr_i8x16_bigger_shift( &RegMemImm::Mem { addr: ref pattern2_0, } => { - // Rule at src/isa/x64/lower.isle line 850. + // Rule at src/isa/x64/lower.isle line 837. let expr0_0: u64 = 8; let expr1_0 = constructor_imm(ctx, pattern0_0, expr0_0)?; let expr2_0 = C::gpr_new(ctx, expr1_0); @@ -6217,21 +6708,21 @@ pub fn constructor_sse_and_not( if pattern0_0 == F32X4 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/lower.isle line 1289. + // Rule at src/isa/x64/lower.isle line 1276. let expr0_0 = constructor_andnps(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } if pattern0_0 == F64X2 { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/lower.isle line 1290. + // Rule at src/isa/x64/lower.isle line 1277. let expr0_0 = constructor_andnpd(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } if let Some((pattern1_0, pattern1_1)) = C::multi_lane(ctx, pattern0_0) { let pattern2_0 = arg1; let pattern3_0 = arg2; - // Rule at src/isa/x64/lower.isle line 1291. + // Rule at src/isa/x64/lower.isle line 1278. let expr0_0 = constructor_pandn(ctx, pattern2_0, pattern3_0)?; return Some(expr0_0); } @@ -6241,7 +6732,7 @@ pub fn constructor_sse_and_not( // Generated as internal constructor for term i128_not. pub fn constructor_i128_not(ctx: &mut C, arg0: Value) -> Option { let pattern0_0 = arg0; - // Rule at src/isa/x64/lower.isle line 1356. + // Rule at src/isa/x64/lower.isle line 1343. let expr0_0 = C::put_in_regs(ctx, pattern0_0); let expr1_0: usize = 0; let expr2_0 = constructor_value_regs_get_gpr(ctx, expr0_0, expr1_0)?; @@ -6268,7 +6759,7 @@ pub fn constructor_vec_insert_lane( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1410. + // Rule at src/isa/x64/lower.isle line 1397. let expr0_0 = C::reg_mem_to_gpr_mem(ctx, pattern3_0); let expr1_0 = constructor_pinsrb(ctx, pattern2_0, &expr0_0, pattern4_0)?; return Some(expr1_0); @@ -6277,7 +6768,7 @@ pub fn constructor_vec_insert_lane( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1414. + // Rule at src/isa/x64/lower.isle line 1401. let expr0_0 = C::reg_mem_to_gpr_mem(ctx, pattern3_0); let expr1_0 = constructor_pinsrw(ctx, pattern2_0, &expr0_0, pattern4_0)?; return Some(expr1_0); @@ -6286,7 +6777,7 @@ pub fn constructor_vec_insert_lane( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1418. + // Rule at src/isa/x64/lower.isle line 1405. let expr0_0 = C::reg_mem_to_gpr_mem(ctx, pattern3_0); let expr1_0 = OperandSize::Size32; let expr2_0 = constructor_pinsrd(ctx, pattern2_0, &expr0_0, pattern4_0, &expr1_0)?; @@ -6296,7 +6787,7 @@ pub fn constructor_vec_insert_lane( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1422. + // Rule at src/isa/x64/lower.isle line 1409. let expr0_0 = C::reg_mem_to_gpr_mem(ctx, pattern3_0); let expr1_0 = OperandSize::Size64; let expr2_0 = constructor_pinsrd(ctx, pattern2_0, &expr0_0, pattern4_0, &expr1_0)?; @@ -6306,7 +6797,7 @@ pub fn constructor_vec_insert_lane( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1426. + // Rule at src/isa/x64/lower.isle line 1413. let expr0_0 = C::reg_mem_to_xmm_mem(ctx, pattern3_0); let expr1_0 = C::sse_insertps_lane_imm(ctx, pattern4_0); let expr2_0 = constructor_insertps(ctx, pattern2_0, &expr0_0, expr1_0)?; @@ -6318,7 +6809,7 @@ pub fn constructor_vec_insert_lane( if let &RegMem::Reg { reg: pattern4_0 } = pattern3_0 { let pattern5_0 = arg3; if pattern5_0 == 0 { - // Rule at src/isa/x64/lower.isle line 1448. + // Rule at src/isa/x64/lower.isle line 1435. let expr0_0 = RegMem::Reg { reg: pattern4_0 }; let expr1_0 = C::reg_mem_to_xmm_mem(ctx, &expr0_0); let expr2_0 = constructor_movsd(ctx, pattern2_0, &expr1_0)?; @@ -6327,7 +6818,7 @@ pub fn constructor_vec_insert_lane( } let pattern4_0 = arg3; if pattern4_0 == 0 { - // Rule at src/isa/x64/lower.isle line 1450. + // Rule at src/isa/x64/lower.isle line 1437. let expr0_0 = SseOpcode::Movsd; let expr1_0 = C::reg_mem_to_xmm_mem(ctx, pattern3_0); let expr2_0 = constructor_xmm_unary_rm_r(ctx, &expr0_0, &expr1_0)?; @@ -6336,7 +6827,7 @@ pub fn constructor_vec_insert_lane( return Some(expr4_0); } if pattern4_0 == 1 { - // Rule at src/isa/x64/lower.isle line 1459. + // Rule at src/isa/x64/lower.isle line 1446. let expr0_0 = C::reg_mem_to_xmm_mem(ctx, pattern3_0); let expr1_0 = constructor_movlhps(ctx, pattern2_0, &expr0_0)?; return Some(expr1_0); @@ -6358,7 +6849,7 @@ pub fn constructor_cmp_and_choose( let pattern2_0 = arg1; let pattern3_0 = arg2; let pattern4_0 = arg3; - // Rule at src/isa/x64/lower.isle line 1467. + // Rule at src/isa/x64/lower.isle line 1454. let expr0_0 = constructor_put_in_gpr(ctx, pattern3_0)?; let expr1_0 = constructor_put_in_gpr(ctx, pattern4_0)?; let expr2_0 = C::raw_operand_size_of_type(ctx, pattern1_0); @@ -6366,7 +6857,7 @@ pub fn constructor_cmp_and_choose( let expr4_0 = constructor_cmp(ctx, &expr2_0, &expr3_0, expr1_0)?; let expr5_0 = C::gpr_to_gpr_mem(ctx, expr1_0); let expr6_0 = constructor_cmove(ctx, pattern1_0, pattern2_0, &expr5_0, expr0_0)?; - let expr7_0 = constructor_with_flags_1(ctx, &expr4_0, &expr6_0)?; + let expr7_0 = constructor_with_flags_reg(ctx, &expr4_0, &expr6_0)?; let expr8_0 = C::value_reg(ctx, expr7_0); return Some(expr8_0); } diff --git a/cranelift/codegen/src/prelude.isle b/cranelift/codegen/src/prelude.isle index bc3d5fd300..174738aaa0 100644 --- a/cranelift/codegen/src/prelude.isle +++ b/cranelift/codegen/src/prelude.isle @@ -324,47 +324,79 @@ ;; Newtype wrapper around `MInst` for instructions that are used for their ;; effect on flags. -(type ProducesFlags (enum (ProducesFlags (inst MInst) (result Reg)))) +;; +;; Variant determines how result is given when combined with a +;; ConsumesFlags. See `with_flags` below for more. +(type ProducesFlags (enum + (ProducesFlagsSideEffect (inst MInst)) + ;; Not directly combinable with a ConsumesFlags; + ;; used in s390x and unwrapped directly by `trapif`. + (ProducesFlagsReturnsReg (inst MInst) (result Reg)) + (ProducesFlagsReturnsResultWithConsumer (inst MInst) (result Reg)))) ;; Newtype wrapper around `MInst` for instructions that consume flags. -(type ConsumesFlags (enum (ConsumesFlags (inst MInst) (result Reg)))) +;; +;; Variant determines how result is given when combined with a +;; ProducesFlags. See `with_flags` below for more. +(type ConsumesFlags (enum + (ConsumesFlagsReturnsResultWithProducer (inst MInst) (result Reg)) + (ConsumesFlagsReturnsReg (inst MInst) (result Reg)) + (ConsumesFlagsTwiceReturnsValueRegs (inst1 MInst) + (inst2 MInst) + (result ValueRegs)))) + + +;; Helper for combining two flags-consumer instructions that return a +;; single Reg, giving a ConsumesFlags that returns both values in a +;; ValueRegs. +(decl consumes_flags_concat (ConsumesFlags ConsumesFlags) ConsumesFlags) +(rule (consumes_flags_concat (ConsumesFlags.ConsumesFlagsReturnsReg inst1 reg1) + (ConsumesFlags.ConsumesFlagsReturnsReg inst2 reg2)) + (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs + inst1 + inst2 + (value_regs reg1 reg2))) ;; Combine flags-producing and -consuming instructions together, ensuring that ;; they are emitted back-to-back and no other instructions can be emitted ;; between them and potentially clobber the flags. ;; -;; Returns a `ValueRegs` where the first register is the result of the -;; `ProducesFlags` instruction and the second is the result of the -;; `ConsumesFlags` instruction. +;; Returns a `ValueRegs` according to the specific combination of ProducesFlags and ConsumesFlags modes: +;; - SideEffect + ReturnsReg --> ValueReg with one Reg from consumer +;; - SideEffect + ReturnsValueRegs --> ValueReg as given from consumer +;; - ReturnsResultWithProducer + ReturnsResultWithConsumer --> ValueReg with low part from producer, high part from consumer +;; +;; See `with_flags_reg` below for a variant that extracts out just the lower Reg. (decl with_flags (ProducesFlags ConsumesFlags) ValueRegs) -(rule (with_flags (ProducesFlags.ProducesFlags producer_inst producer_result) - (ConsumesFlags.ConsumesFlags consumer_inst consumer_result)) + +(rule (with_flags (ProducesFlags.ProducesFlagsReturnsResultWithConsumer producer_inst producer_result) + (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer consumer_inst consumer_result)) (let ((_x Unit (emit producer_inst)) (_y Unit (emit consumer_inst))) (value_regs producer_result consumer_result))) -;; Like `with_flags` but returns only the result of the consumer operation. -(decl with_flags_1 (ProducesFlags ConsumesFlags) Reg) -(rule (with_flags_1 (ProducesFlags.ProducesFlags producer_inst _producer_result) - (ConsumesFlags.ConsumesFlags consumer_inst consumer_result)) +(rule (with_flags (ProducesFlags.ProducesFlagsSideEffect producer_inst) + (ConsumesFlags.ConsumesFlagsReturnsReg consumer_inst consumer_result)) (let ((_x Unit (emit producer_inst)) (_y Unit (emit consumer_inst))) - consumer_result)) + (value_reg consumer_result))) -;; Like `with_flags` but allows two consumers of the same flags. The result is a -;; `ValueRegs` containing the first consumer's result and then the second -;; consumer's result. -(decl with_flags_2 (ProducesFlags ConsumesFlags ConsumesFlags) ValueRegs) -(rule (with_flags_2 (ProducesFlags.ProducesFlags producer_inst _producer_result) - (ConsumesFlags.ConsumesFlags consumer_inst_1 consumer_result_1) - (ConsumesFlags.ConsumesFlags consumer_inst_2 consumer_result_2)) +(rule (with_flags (ProducesFlags.ProducesFlagsSideEffect producer_inst) + (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs consumer_inst_1 + consumer_inst_2 + consumer_result)) (let ((_x Unit (emit producer_inst)) ;; Note that the order of emission here is swapped, as this seems ;; to generate better register allocation for now with fewer ;; `mov` instructions. (_y Unit (emit consumer_inst_2)) (_z Unit (emit consumer_inst_1))) - (value_regs consumer_result_1 consumer_result_2))) + consumer_result)) + +(decl with_flags_reg (ProducesFlags ConsumesFlags) Reg) +(rule (with_flags_reg p c) + (let ((v ValueRegs (with_flags p c))) + (value_regs_get v 0))) ;;;; Helpers for Working with TrapCode ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; diff --git a/cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif b/cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif index af59e9d179..801f00a2f5 100644 --- a/cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif +++ b/cranelift/filetests/filetests/isa/x64/cmp-mem-bug.clif @@ -43,7 +43,7 @@ block0(v0: f64, v1: i64): ; Entry block: 0 ; Block 0: ; (original IR block: block0) -; (instruction range: 0 .. 17) +; (instruction range: 0 .. 16) ; Inst 0: pushq %rbp ; Inst 1: movq %rsp, %rbp ; Inst 2: movsd 0(%rdi), %xmm1 @@ -52,14 +52,12 @@ block0(v0: f64, v1: i64): ; Inst 5: setz %sil ; Inst 6: andl %edi, %esi ; Inst 7: andq $1, %rsi -; Inst 8: ucomisd %xmm1, %xmm0 +; Inst 8: ucomisd %xmm0, %xmm1 ; Inst 9: movaps %xmm0, %xmm1 -; Inst 10: jnp $next; movsd %xmm0, %xmm1; $next: -; Inst 11: jz $next; movsd %xmm0, %xmm1; $next: -; Inst 12: movq %rsi, %rax -; Inst 13: movaps %xmm1, %xmm0 -; Inst 14: movq %rbp, %rsp -; Inst 15: popq %rbp -; Inst 16: ret +; Inst 10: jz $check; movsd %xmm0, %xmm1; $check: jnp $next; movsd %xmm0, %xmm1; $next +; Inst 11: movq %rsi, %rax +; Inst 12: movaps %xmm1, %xmm0 +; Inst 13: movq %rbp, %rsp +; Inst 14: popq %rbp +; Inst 15: ret ; }} - diff --git a/cranelift/filetests/filetests/runtests/select.clif b/cranelift/filetests/filetests/runtests/select.clif new file mode 100644 index 0000000000..6356b5226c --- /dev/null +++ b/cranelift/filetests/filetests/runtests/select.clif @@ -0,0 +1,80 @@ +test interpret +test run +target x86_64 + +function %select_eq_f32(f32, f32) -> i32 { +block0(v0: f32, v1: f32): + v2 = fcmp eq v0, v1 + v3 = iconst.i32 1 + v4 = iconst.i32 0 + v5 = select v2, v3, v4 + return v5 +} +; run: %select_eq_f32(0x42.42, 0x42.42) == 1 +; run: %select_eq_f32(0x42.42, 0.0) == 0 +; run: %select_eq_f32(0x42.42, NaN) == 0 + +function %select_ne_f64(f64, f64) -> i32 { +block0(v0: f64, v1: f64): + v2 = fcmp ne v0, v1 + v3 = iconst.i32 1 + v4 = iconst.i32 0 + v5 = select v2, v3, v4 + return v5 +} +; run: %select_ne_f64(0x42.42, 0x42.42) == 0 +; run: %select_ne_f64(0x42.42, 0.0) == 1 +; run: %select_ne_f64(NaN, NaN) == 1 + +function %select_gt_f64(f64, f64) -> b1 { +block0(v0: f64, v1: f64): + v2 = fcmp gt v0, v1 + v3 = bconst.b1 true + v4 = bconst.b1 false + v5 = select v2, v3, v4 + return v5 +} +; run: %select_gt_f64(0x42.42, 0.0) == true +; run: %select_gt_f64(0.0, 0.0) == false +; run: %select_gt_f64(0x0.0, 0x42.42) == false +; run: %select_gt_f64(NaN, 0x42.42) == false + +function %select_ge_f64(f64, f64) -> i64 { +block0(v0: f64, v1: f64): + v2 = fcmp ge v0, v1 + v3 = iconst.i64 1 + v4 = iconst.i64 0 + v5 = select v2, v3, v4 + return v5 +} +; run: %select_ge_f64(0x42.42, 0.0) == 1 +; run: %select_ge_f64(0.0, 0.0) == 1 +; run: %select_ge_f64(0x0.0, 0x42.42) == 0 +; run: %select_ge_f64(0x0.0, NaN) == 0 + +function %select_le_f32(f32, f32) -> f32 { +block0(v0: f32, v1: f32): + v2 = fcmp le v0, v1 + v3 = f32const 0x1.0 + v4 = f32const 0x0.0 + v5 = select v2, v3, v4 + return v5 +} +; runx: %select_le_f32(0x42.42, 0.0) == 0x0.0 +; run: %select_le_f32(0.0, 0.0) == 0x1.0 +; run: %select_le_f32(0x0.0, 0x42.42) == 0x1.0 +; run: %select_le_f32(0x0.0, NaN) == 0x0.0 + +function %select_uno_f32(f32, f32) -> i8 { +block0(v0: f32, v1: f32): + v2 = fcmp uno v0, v1 + v3 = iconst.i8 1 + v4 = iconst.i8 0 + v5 = select v2, v3, v4 + return v5 +} +; run: %select_uno_f32(0x42.42, 0.0) == 0 +; run: %select_uno_f32(0.0, 0.0) == 0 +; run: %select_uno_f32(0x0.0, 0x42.42) == 0 +; run: %select_uno_f32(0x0.0, NaN) == 1 +; run: %select_uno_f32(-NaN, 0x42.42) == 1 diff --git a/cranelift/isle/isle/src/codegen.rs b/cranelift/isle/isle/src/codegen.rs index c5de4deb66..69e4ca9e20 100644 --- a/cranelift/isle/isle/src/codegen.rs +++ b/cranelift/isle/isle/src/codegen.rs @@ -460,7 +460,7 @@ impl<'a> Codegen<'a> { }; let valuename = self.value_binder(&value, /* is_ref = */ true, ty); let fieldname = &self.typeenv.syms[field.name.index()]; - self.define_val(&value, ctx, /* is_ref = */ false, field.ty); + self.define_val(&value, ctx, /* is_ref = */ true, field.ty); format!("{}: {}", fieldname, valuename) }) .collect::>()