remove iadd_cout and isub_bout (#6198)
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@@ -60,7 +60,7 @@ pub fn is_pure_for_egraph(func: &Function, inst: Inst) -> bool {
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};
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// Multi-value results do not play nicely with much of the egraph
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// infrastructure. They are in practice used only for multi-return
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// calls and some other odd instructions (e.g. iadd_cout) which,
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// calls and some other odd instructions (e.g. uadd_overflow) which,
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// for now, we can afford to leave in place as opaque
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// side-effecting ops. So if more than one result, then the inst
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// is "not pure". Similarly, ops with zero results can be used
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@@ -1644,7 +1644,7 @@ mod tests {
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assert_eq!(pos.func.dfg.resolve_aliases(v1), v1);
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let arg0 = pos.func.dfg.append_block_param(block0, types::I32);
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let (s, c) = pos.ins().iadd_cout(v1, arg0);
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let (s, c) = pos.ins().uadd_overflow(v1, arg0);
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let iadd = match pos.func.dfg.value_def(s) {
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ValueDef::Result(i, 0) => i,
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_ => panic!(),
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@@ -1654,7 +1654,7 @@ mod tests {
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pos.func.dfg.clear_results(iadd);
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pos.func.dfg.attach_result(iadd, s);
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// Replace `iadd_cout` with a normal `iadd` and an `icmp`.
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// Replace `uadd_overflow` with a normal `iadd` and an `icmp`.
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pos.func.dfg.replace(iadd).iadd(v1, arg0);
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let c2 = pos.ins().icmp(IntCC::Equal, s, v1);
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pos.func.dfg.change_to_alias(c, c2);
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@@ -2575,43 +2575,6 @@
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(lower_msb Reg (lsr_imm $I64 lower_msb (imm_shift_from_u8 63))))
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(add_shift $I64 lower_msb upper_msb (lshl_from_u64 $I64 1))))
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;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; For values smaller than a register, we do a normal `add` with both arguments
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;; sign extended. We then check if the output sign bit has flipped.
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(rule 0 (lower (has_type (fits_in_16 ty) (iadd_cout a b)))
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(let ((extend ExtendOp (lower_extend_op ty (ArgumentExtension.Sext)))
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;; Instead of emitting two `sxt{b,h}` we do one as an instruction and
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;; the other as an extend operation in the `add` instruction.
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;;
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;; sxtb a_sext, a
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;; add out, a_sext, b, sxtb
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;; cmp out, out, sxtb
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;; cset out_carry, ne
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(a_sext Reg (put_in_reg_sext32 a))
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(out Reg (add_extend_op ty a_sext b extend))
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(out_carry Reg (with_flags_reg
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(cmp_extend (OperandSize.Size32) out out extend)
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(cset (Cond.Ne)))))
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(output_pair
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(value_reg out)
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(value_reg out_carry))))
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;; For register sized add's we just emit a adds+cset, without further masking.
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;;
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;; adds out, a, b
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;; cset carry, vs
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(rule 1 (lower (has_type (ty_32_or_64 ty) (iadd_cout a b)))
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(let ((out ValueRegs
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(with_flags
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(add_with_flags_paired ty a b)
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(cset_paired (Cond.Vs)))))
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(output_pair
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(value_regs_get out 0)
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(value_regs_get out 1))))
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;;; Rules for `uadd_overflow_trap` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(rule (lower (has_type (fits_in_64 ty) (uadd_overflow_trap a b tc)))
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@@ -98,19 +98,6 @@
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(with_flags (x64_add_with_flags_paired $I64 x_lo y_lo)
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(x64_adc_paired $I64 x_hi y_hi)))))
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;;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; TODO: i8 and i16 support. Requires either learning how to encode ALU
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;; operations on values narrower than 32-bits (better code; big change) or doing
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;; the same extend-to-32-bits trick that aarch64 does (worse code; small
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;; change).
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(rule (lower (iadd_cout x y @ (value_type (ty_32_or_64 ty))))
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(let ((results ValueRegs (with_flags (x64_add_with_flags_paired ty x y)
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(x64_setcc_paired (CC.O)))))
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(output_pair (value_regs_get results 0)
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(value_regs_get results 1))))
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;;;; Helpers for `*_overflow` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(decl construct_overflow_op (CC ProducesFlags) InstOutput)
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@@ -129,7 +129,6 @@ fn harvest_candidate_lhs(
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| ir::Opcode::Clz
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| ir::Opcode::Ctz
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// TODO: ir::Opcode::IaddCarry
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// TODO: ir::Opcode::IaddCout
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| ir::Opcode::SaddSat
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| ir::Opcode::SsubSat
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| ir::Opcode::UsubSat => true,
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@@ -470,7 +469,6 @@ fn harvest_candidate_lhs(
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ast::Instruction::Cttz { a }.into()
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}
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// TODO: ir::Opcode::IaddCarry
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// TODO: ir::Opcode::IaddCout
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(ir::Opcode::SaddSat, _) => {
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let a = arg(allocs, 0);
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let b = arg(allocs, 1);
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