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remove iadd_cout and isub_bout (#6198)

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This commit is contained in:
T0b1-iOS
2023-04-12 01:39:32 +02:00
committed by GitHub
parent c0166f78f9
commit f684a5fbee
16 changed files with 7 additions and 390 deletions
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50
cranelift/codegen/meta/src/shared/instructions.rs
View File

@@ -2003,31 +2003,6 @@ pub(crate) fn define(
.operands_out(vec![Operand::new("a", iB)]),
);
ig.push(
Inst::new(
"iadd_cout",
r#"
Add integers with carry out.
Same as `iadd` with an additional carry output.
```text
a &= x + y \pmod 2^B \\
c_{out} &= x+y >= 2^B
```
Polymorphic over all scalar integer types, but does not support vector
types.
"#,
&formats.binary,
)
.operands_in(vec![Operand::new("x", iB), Operand::new("y", iB)])
.operands_out(vec![
Operand::new("a", iB),
Operand::new("c_out", i8).with_doc("Output carry flag"),
]),
);
ig.push(
Inst::new(
"iadd_carry",
@@ -2227,31 +2202,6 @@ pub(crate) fn define(
.operands_out(vec![Operand::new("a", iB)]),
);
ig.push(
Inst::new(
"isub_bout",
r#"
Subtract integers with borrow out.
Same as `isub` with an additional borrow flag output.
```text
a &= x - y \pmod 2^B \\
b_{out} &= x < y
```
Polymorphic over all scalar integer types, but does not support vector
types.
"#,
&formats.binary,
)
.operands_in(vec![Operand::new("x", iB), Operand::new("y", iB)])
.operands_out(vec![
Operand::new("a", iB),
Operand::new("b_out", i8).with_doc("Output borrow flag"),
]),
);
ig.push(
Inst::new(
"isub_borrow",

2
cranelift/codegen/src/inst_predicates.rs
View File

@@ -60,7 +60,7 @@ pub fn is_pure_for_egraph(func: &Function, inst: Inst) -> bool {
};
// Multi-value results do not play nicely with much of the egraph
// infrastructure. They are in practice used only for multi-return
// calls and some other odd instructions (e.g. iadd_cout) which,
// calls and some other odd instructions (e.g. uadd_overflow) which,
// for now, we can afford to leave in place as opaque
// side-effecting ops. So if more than one result, then the inst
// is "not pure". Similarly, ops with zero results can be used

4
cranelift/codegen/src/ir/dfg.rs
View File

@@ -1644,7 +1644,7 @@ mod tests {
assert_eq!(pos.func.dfg.resolve_aliases(v1), v1);
let arg0 = pos.func.dfg.append_block_param(block0, types::I32);
let (s, c) = pos.ins().iadd_cout(v1, arg0);
let (s, c) = pos.ins().uadd_overflow(v1, arg0);
let iadd = match pos.func.dfg.value_def(s) {
ValueDef::Result(i, 0) => i,
_ => panic!(),
@@ -1654,7 +1654,7 @@ mod tests {
pos.func.dfg.clear_results(iadd);
pos.func.dfg.attach_result(iadd, s);
// Replace `iadd_cout` with a normal `iadd` and an `icmp`.
// Replace `uadd_overflow` with a normal `iadd` and an `icmp`.
pos.func.dfg.replace(iadd).iadd(v1, arg0);
let c2 = pos.ins().icmp(IntCC::Equal, s, v1);
pos.func.dfg.change_to_alias(c, c2);

37
cranelift/codegen/src/isa/aarch64/lower.isle
View File

@@ -2575,43 +2575,6 @@
(lower_msb Reg (lsr_imm $I64 lower_msb (imm_shift_from_u8 63))))
(add_shift $I64 lower_msb upper_msb (lshl_from_u64 $I64 1))))
;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; For values smaller than a register, we do a normal `add` with both arguments
;; sign extended. We then check if the output sign bit has flipped.
(rule 0 (lower (has_type (fits_in_16 ty) (iadd_cout a b)))
(let ((extend ExtendOp (lower_extend_op ty (ArgumentExtension.Sext)))
;; Instead of emitting two `sxt{b,h}` we do one as an instruction and
;; the other as an extend operation in the `add` instruction.
;;
;; sxtb a_sext, a
;; add out, a_sext, b, sxtb
;; cmp out, out, sxtb
;; cset out_carry, ne
(a_sext Reg (put_in_reg_sext32 a))
(out Reg (add_extend_op ty a_sext b extend))
(out_carry Reg (with_flags_reg
(cmp_extend (OperandSize.Size32) out out extend)
(cset (Cond.Ne)))))
(output_pair
(value_reg out)
(value_reg out_carry))))
;; For register sized add's we just emit a adds+cset, without further masking.
;;
;; adds out, a, b
;; cset carry, vs
(rule 1 (lower (has_type (ty_32_or_64 ty) (iadd_cout a b)))
(let ((out ValueRegs
(with_flags
(add_with_flags_paired ty a b)
(cset_paired (Cond.Vs)))))
(output_pair
(value_regs_get out 0)
(value_regs_get out 1))))
;;; Rules for `uadd_overflow_trap` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(rule (lower (has_type (fits_in_64 ty) (uadd_overflow_trap a b tc)))

13
cranelift/codegen/src/isa/x64/lower.isle
View File

@@ -98,19 +98,6 @@
(with_flags (x64_add_with_flags_paired $I64 x_lo y_lo)
(x64_adc_paired $I64 x_hi y_hi)))))
;;;; Rules for `iadd_cout` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; TODO: i8 and i16 support. Requires either learning how to encode ALU
;; operations on values narrower than 32-bits (better code; big change) or doing
;; the same extend-to-32-bits trick that aarch64 does (worse code; small
;; change).
(rule (lower (iadd_cout x y @ (value_type (ty_32_or_64 ty))))
(let ((results ValueRegs (with_flags (x64_add_with_flags_paired ty x y)
(x64_setcc_paired (CC.O)))))
(output_pair (value_regs_get results 0)
(value_regs_get results 1))))
;;;; Helpers for `*_overflow` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(decl construct_overflow_op (CC ProducesFlags) InstOutput)

2
cranelift/codegen/src/souper_harvest.rs
View File

@@ -129,7 +129,6 @@ fn harvest_candidate_lhs(
| ir::Opcode::Clz
| ir::Opcode::Ctz
// TODO: ir::Opcode::IaddCarry
// TODO: ir::Opcode::IaddCout
| ir::Opcode::SaddSat
| ir::Opcode::SsubSat
| ir::Opcode::UsubSat => true,
@@ -470,7 +469,6 @@ fn harvest_candidate_lhs(
ast::Instruction::Cttz { a }.into()
}
// TODO: ir::Opcode::IaddCarry
// TODO: ir::Opcode::IaddCout
(ir::Opcode::SaddSat, _) => {
let a = arg(allocs, 0);
let b = arg(allocs, 1);

8
cranelift/filetests/filetests/parser/ternary.clif
View File

@@ -10,8 +10,8 @@ block1(v1: i32, v2: i32, v3: i32):
function %add_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
v10, v11 = iadd_cout v1, v4
;check: v10, v11 = iadd_cout v1, v4
v10, v11 = uadd_overflow v1, v4
;check: v10, v11 = uadd_overflow v1, v4
v20, v21 = iadd_carry v2, v5, v11
; check: v20, v21 = iadd_carry v2, v5, v11
v30 = iadd_cin v3, v6, v21
@@ -21,8 +21,8 @@ block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
function %sub_i96(i32, i32, i32, i32, i32, i32) -> i32, i32, i32 {
block1(v1: i32, v2: i32, v3: i32, v4: i32, v5: i32, v6: i32):
v10, v11 = isub_bout v1, v4
;check: v10, v11 = isub_bout v1, v4
v10, v11 = usub_overflow v1, v4
;check: v10, v11 = usub_overflow v1, v4
v20, v21 = isub_borrow v2, v5, v11
; check: v20, v21 = isub_borrow v2, v5, v11
v30 = isub_bin v3, v6, v21

29
cranelift/filetests/filetests/runtests/i128-iaddcout.clif
View File

@@ -1,29 +0,0 @@
test interpret
; test run
; set enable_llvm_abi_extensions=true
; target aarch64
; target s390x
; target x86_64
; target riscv64
function %iaddcout_i128_v(i128, i128) -> i128 {
block0(v0: i128, v1: i128):
v2, v3 = iadd_cout v0, v1
return v2
}
; run: %iaddcout_i128_v(0, 1) == 1
; run: %iaddcout_i128_v(100, 27) == 127
; run: %iaddcout_i128_v(100, 28) == 128
; run: %iaddcout_i128_v(0x7FFFFFFF_FFFFFFFF_FFFFFFFF_FFFF0000, 0xFFFF) == 0x7FFFFFFF_FFFFFFFF_FFFFFFFF_FFFFFFFF
; run: %iaddcout_i128_v(0x7FFFFFFF_FFFFFFFF_FFFFFFFF_FFFF0000, 0x10000) == 0x80000000_00000000_00000000_00000000
function %iaddcout_i128_c(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2, v3 = iadd_cout v0, v1
return v3
}
; run: %iaddcout_i128_c(0, 1) == 0
; run: %iaddcout_i128_c(100, 27) == 0
; run: %iaddcout_i128_c(100, 28) == 0
; run: %iaddcout_i128_c(0x7FFFFFFF_FFFFFFFF_FFFFFFFF_FFFF0000, 0xFFFF) == 0
; run: %iaddcout_i128_c(0x7FFFFFFF_FFFFFFFF_FFFFFFFF_FFFF0000, 0x10000) == 1

30
cranelift/filetests/filetests/runtests/i128-isubbout.clif
View File

@@ -1,30 +0,0 @@
test interpret
; test run
; set enable_llvm_abi_extensions=true
; target aarch64
; target s390x
; target x86_64
; target riscv64
function %isubbout_i128_v(i128, i128) -> i128 {
block0(v0: i128, v1: i128):
v2, v3 = isub_bout v0, v1
return v2
}
; run: %isubbout_i128_v(0, 1) == -1
; run: %isubbout_i128_v(100, 20) == 80
; run: %isubbout_i128_v(100, -28) == 128
; run: %isubbout_i128_v(-2147483640, 8) == -2147483648
; run: %isubbout_i128_v(-2147483640, 9) == -2147483649
function %isubbout_i128_c(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2, v3 = isub_bout v0, v1
return v3
}
; run: %isubbout_i128_c(0, 1) == 1
; run: %isubbout_i128_c(100, 20) == 0
; run: %isubbout_i128_c(100, -28) == 0
; run: %isubbout_i128_c(-2147483640, 8) == 1
; run: %isubbout_i128_c(-2147483640, 9) == 1

29
cranelift/filetests/filetests/runtests/iaddcout-i16.clif
View File

@@ -1,29 +0,0 @@
test interpret
test run
target aarch64
; target s390x
; target x86_64
; target riscv64
function %iaddcout_i16_v(i16, i16) -> i16 {
block0(v0: i16, v1: i16):
v2, v3 = iadd_cout v0, v1
return v2
}
; run: %iaddcout_i16_v(0, 1) == 1
; run: %iaddcout_i16_v(100, 27) == 127
; run: %iaddcout_i16_v(100, 28) == 128
; run: %iaddcout_i16_v(32000, 767) == 32767
; run: %iaddcout_i16_v(32000, 768) == -32768
function %iaddcout_i16_c(i16, i16) -> i8 {
block0(v0: i16, v1: i16):
v2, v3 = iadd_cout v0, v1
return v3
}
; run: %iaddcout_i16_c(0, 1) == 0
; run: %iaddcout_i16_c(100, 27) == 0
; run: %iaddcout_i16_c(100, 28) == 0
; run: %iaddcout_i16_c(32000, 767) == 0
; run: %iaddcout_i16_c(32000, 768) == 1

29
cranelift/filetests/filetests/runtests/iaddcout-i32.clif
View File

@@ -1,29 +0,0 @@
test interpret
test run
target aarch64
; target s390x
target x86_64
; target riscv64
function %iaddcout_i32_v(i32, i32) -> i32 {
block0(v0: i32, v1: i32):
v2, v3 = iadd_cout v0, v1
return v2
}
; run: %iaddcout_i32_v(0, 1) == 1
; run: %iaddcout_i32_v(100, 27) == 127
; run: %iaddcout_i32_v(100, 28) == 128
; run: %iaddcout_i32_v(2000000000, 147483647) == 2147483647
; run: %iaddcout_i32_v(2000000000, 147483648) == -2147483648
function %iaddcout_i32_c(i32, i32) -> i8 {
block0(v0: i32, v1: i32):
v2, v3 = iadd_cout v0, v1
return v3
}
; run: %iaddcout_i32_c(0, 1) == 0
; run: %iaddcout_i32_c(100, 27) == 0
; run: %iaddcout_i32_c(100, 28) == 0
; run: %iaddcout_i32_c(2000000000, 147483647) == 0
; run: %iaddcout_i32_c(2000000000, 147483648) == 1

28
cranelift/filetests/filetests/runtests/iaddcout-i64.clif
View File

@@ -1,28 +0,0 @@
test interpret
test run
target aarch64
; target s390x
target x86_64
; target riscv64
function %iaddcout_i64_v(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
v2, v3 = iadd_cout v0, v1
return v2
}
; run: %iaddcout_i64_v(0, 1) == 1
; run: %iaddcout_i64_v(100, 27) == 127
; run: %iaddcout_i64_v(100, 28) == 128
; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0x7FFFFFFF_FFFFFFFF
; run: %iaddcout_i64_v(0x7FFFFFFF_FFFF0000, 0x10000) == 0x80000000_00000000
function %iaddcout_i64_c(i64, i64) -> i8 {
block0(v0: i64, v1: i64):
v2, v3 = iadd_cout v0, v1
return v3
}
; run: %iaddcout_i64_c(0, 1) == 0
; run: %iaddcout_i64_c(100, 27) == 0
; run: %iaddcout_i64_c(100, 28) == 0
; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0xFFFF) == 0
; run: %iaddcout_i64_c(0x7FFFFFFF_FFFF0000, 0x10000) == 1

29
cranelift/filetests/filetests/runtests/iaddcout-i8.clif
View File

@@ -1,29 +0,0 @@
test interpret
test run
target aarch64
; target s390x
; target x86_64
; target riscv64
function %iaddcout_i8_v(i8, i8) -> i8 {
block0(v0: i8, v1: i8):
v2, v3 = iadd_cout v0, v1
return v2
}
; run: %iaddcout_i8_v(0, 1) == 1
; run: %iaddcout_i8_v(100, 27) == 127
; run: %iaddcout_i8_v(100, -20) == 80
; run: %iaddcout_i8_v(100, 28) == -128
; run: %iaddcout_i8_v(-128, -128) == 0
function %iaddcout_i8_c(i8, i8) -> i8 {
block0(v0: i8, v1: i8):
v2, v3 = iadd_cout v0, v1
return v3
}
; run: %iaddcout_i8_c(0, 1) == 0
; run: %iaddcout_i8_c(100, 27) == 0
; run: %iaddcout_i8_c(100, -20) == 0
; run: %iaddcout_i8_c(100, 28) == 1
; run: %iaddcout_i8_c(-128, -128) == 1

92
cranelift/filetests/filetests/runtests/isubbout.clif
View File

@@ -1,92 +0,0 @@
test interpret
; test run
; target aarch64
; target s390x
; target x86_64
; target riscv64
function %isubbout_i8_v(i8, i8) -> i8 {
block0(v0: i8, v1: i8):
v2, v3 = isub_bout v0, v1
return v2
}
; run: %isubbout_i8_v(0, 1) == -1
; run: %isubbout_i8_v(100, 20) == 80
; run: %isubbout_i8_v(100, -20) == 120
; run: %isubbout_i8_v(-128, 1) == 127
function %isubbout_i8_c(i8, i8) -> i8 {
block0(v0: i8, v1: i8):
v2, v3 = isub_bout v0, v1
return v3
}
; run: %isubbout_i8_c(0, 1) == 1
; run: %isubbout_i8_c(100, 20) == 0
; run: %isubbout_i8_c(100, -20) == 0
; run: %isubbout_i8_c(-128, 1) == 1
function %isubbout_i16_v(i16, i16) -> i16 {
block0(v0: i16, v1: i16):
v2, v3 = isub_bout v0, v1
return v2
}
; run: %isubbout_i16_v(0, 1) == -1
; run: %isubbout_i16_v(100, 20) == 80
; run: %isubbout_i16_v(100, -28) == 128
; run: %isubbout_i16_v(-32000, 768) == -32768
; run: %isubbout_i16_v(-32000, 769) == 32767
function %isubbout_i16_c(i16, i16) -> i8 {
block0(v0: i16, v1: i16):
v2, v3 = isub_bout v0, v1
return v3
}
; run: %isubbout_i16_c(0, 1) == 1
; run: %isubbout_i16_c(100, 20) == 0
; run: %isubbout_i16_c(100, -28) == 0
; run: %isubbout_i16_c(-32000, 768) == 1
; run: %isubbout_i16_c(-32000, 769) == 1
function %isubbout_i32_v(i32, i32) -> i32 {
block0(v0: i32, v1: i32):
v2, v3 = isub_bout v0, v1
return v2
}
; run: %isubbout_i32_v(0, 1) == -1
; run: %isubbout_i32_v(100, 20) == 80
; run: %isubbout_i32_v(100, -28) == 128
; run: %isubbout_i32_v(-2147483640, 8) == -2147483648
; run: %isubbout_i32_v(-2147483640, 9) == 2147483647
function %isubbout_i32_c(i32, i32) -> i8 {
block0(v0: i32, v1: i32):
v2, v3 = isub_bout v0, v1
return v3
}
; run: %isubbout_i32_c(0, 1) == 1
; run: %isubbout_i32_c(100, 20) == 0
; run: %isubbout_i32_c(100, -28) == 0
; run: %isubbout_i32_c(-2147483640, 8) == 1
; run: %isubbout_i32_c(-2147483640, 9) == 1
function %isubbout_i64_v(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
v2, v3 = isub_bout v0, v1
return v2
}
; run: %isubbout_i64_v(0, 1) == -1
; run: %isubbout_i64_v(100, 20) == 80
; run: %isubbout_i64_v(100, -28) == 128
; run: %isubbout_i64_v(-2147483640, 8) == -2147483648
; run: %isubbout_i64_v(-2147483640, 9) == -2147483649
function %isubbout_i64_c(i64, i64) -> i8 {
block0(v0: i64, v1: i64):
v2, v3 = isub_bout v0, v1
return v3
}
; run: %isubbout_i64_c(0, 1) == 1
; run: %isubbout_i64_c(100, 20) == 0
; run: %isubbout_i64_c(100, -28) == 0
; run: %isubbout_i64_c(-2147483640, 8) == 1
; run: %isubbout_i64_c(-2147483640, 9) == 1

5
cranelift/fuzzgen/src/function_generator.rs
View File

@@ -465,7 +465,6 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
op,
args,
rets,
(Opcode::IaddCout, &([I8, I8] | [I16, I16] | [I128, I128])),
(Opcode::UmulOverflow | Opcode::SmulOverflow, &[I128, I128]),
(Opcode::Imul, &[I8X16, I8X16]),
// https://github.com/bytecodealliance/wasmtime/issues/5468
@@ -583,7 +582,6 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
op,
args,
rets,
(Opcode::IaddCout, &[I128, I128]),
(Opcode::UmulOverflow | Opcode::SmulOverflow, &[I128, I128]),
// https://github.com/bytecodealliance/wasmtime/issues/4864
(Opcode::Udiv | Opcode::Sdiv, &[I128, I128]),
@@ -639,7 +637,6 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
op,
args,
rets,
(Opcode::IaddCout),
(Opcode::UaddOverflow | Opcode::SaddOverflow),
(Opcode::UsubOverflow | Opcode::SsubOverflow),
(Opcode::UmulOverflow | Opcode::SmulOverflow),
@@ -686,7 +683,6 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
args,
rets,
// TODO
(Opcode::IaddCout),
(Opcode::UaddOverflow | Opcode::SaddOverflow),
(Opcode::UsubOverflow | Opcode::SsubOverflow),
(Opcode::UmulOverflow | Opcode::SmulOverflow),
@@ -863,7 +859,6 @@ static OPCODE_SIGNATURES: Lazy<Vec<OpcodeSignature>> = Lazy::new(|| {
(Opcode::IaddCarry),
(Opcode::UaddOverflowTrap),
(Opcode::IsubBin),
(Opcode::IsubBout),
(Opcode::IsubBorrow),
(Opcode::BandImm),
(Opcode::BorImm),

10
cranelift/interpreter/src/step.rs
View File

@@ -802,11 +802,6 @@ where
)?,
DataValueExt::add(arg(0), arg(1))?,
),
Opcode::IaddCout => {
let carry = arg(0).checked_add(arg(1))?.is_none();
let sum = arg(0).add(arg(1))?;
assign_multiple(&[sum, DataValueExt::bool(carry, false, types::I8)?])
}
Opcode::IaddCarry => {
let mut sum = DataValueExt::add(arg(0), arg(1))?;
let mut carry = arg(0).checked_add(arg(1))?.is_none();
@@ -838,11 +833,6 @@ where
)?,
DataValueExt::sub(arg(0), arg(1))?,
),
Opcode::IsubBout => {
let sum = DataValueExt::sub(arg(0), arg(1))?;
let borrow = arg(0) < arg(1);
assign_multiple(&[sum, DataValueExt::bool(borrow, false, types::I8)?])
}
Opcode::IsubBorrow => {
let rhs = if DataValueExt::into_bool(arg(2))? {
DataValueExt::add(arg(1), DataValueExt::int(1, ctrl_ty)?)?