T0b1/wasmtime
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

fuzzgen: Disable unaligned atomics for RISCV (#5883)

Browse Source 
* fuzzgen: Disable unaligned atomics for RISCV

* riscv64: Cleanup atomic alignment logic

Co-authored-by: Jamey Sharp <jamey@minilop.net>

---------

Co-authored-by: Jamey Sharp <jamey@minilop.net>
This commit is contained in:
Afonso Bordado
2023-02-28 10:48:14 +00:00
committed by GitHub
parent ddbaf6afba
commit ef8a1340df
1 changed files with 10 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
cranelift/fuzzgen/src/function_generator.rs
View File

@@ -647,6 +647,8 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
// TODO // TODO
(Opcode::BxorNot, &[F32, F32]), (Opcode::BxorNot, &[F32, F32]),
(Opcode::BxorNot, &[F64, F64]), (Opcode::BxorNot, &[F64, F64]),
// https://github.com/bytecodealliance/wasmtime/issues/5884
(Opcode::AtomicRmw),
) )
} }
@@ -1493,10 +1495,14 @@ where
is_atomic: bool, is_atomic: bool,
) -> Result<(Value, MemFlags, Offset32)> { ) -> Result<(Value, MemFlags, Offset32)> {
// Should we generate an aligned address // Should we generate an aligned address
let is_aarch64 = matches!(self.target_triple.architecture, Architecture::Aarch64(_)); // Some backends have issues with unaligned atomics.
let aligned = if is_atomic && is_aarch64 { // AArch64: https://github.com/bytecodealliance/wasmtime/issues/5483
// AArch64 has issues with unaligned atomics. // RISCV: https://github.com/bytecodealliance/wasmtime/issues/5882
// https://github.com/bytecodealliance/wasmtime/issues/5483 let requires_aligned_atomics = matches!(
self.target_triple.architecture,
Architecture::Aarch64(_) | Architecture::Riscv64(_)
);
let aligned = if is_atomic && requires_aligned_atomics {
true true
} else { } else {
bool::arbitrary(self.u)? bool::arbitrary(self.u)?