ISLE lowering rules: make use of implicit conversions. (#3847)

This PR makes use of the new implicit-conversion feature of the ISLE DSL
that was introduced in #3807 in order to make the lowering rules
significantly simpler and more concise.

The basic idea is to eliminate the repetitive and mechanical use of
terms that convert from one type to another when there is only one real
way to do the conversion -- for example, to go from a `WritableReg` to a
`Reg`, the only sensible way is to use `writable_reg_to_reg`.

This PR generally takes any term of the form "A_to_B" and makes it an
automatic conversion, as well as some others that are similar in spirit.

The notable exception to the pure-value-convsion category is the
`put_in_reg` family of operations, which actually do have side-effects.
However, as noted in the doc additions in #3807, this is fine as long as
the side-effects are idempotent. And on balance, making `put_in_reg`
automatic is a significant clarity win -- together with other operand
converters, it enables rules like:

```
;; Add two registers.
(rule (lower (has_type (fits_in_64 ty)
                       (iadd x y)))
      (add ty x y))
```

There may be other converters that we could define to make the rules
even simpler; we can make such improvements as we think of them, but
this should be a good start!

cranelift/codegen/src/isa/aarch64/inst.isle

@@ -1363,77 +1363,77 @@
 (rule (movz imm size)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.MovZ dst imm size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovN` instructions.
 (decl movn (MoveWideConst OperandSize) Reg)
 (rule (movn imm size)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.MovN dst imm size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRImmLogic` instructions.
 (decl alu_rr_imm_logic (ALUOp Type Reg ImmLogic) Reg)
 (rule (alu_rr_imm_logic op ty src imm)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRImmLogic op (operand_size ty) dst src imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRImmShift` instructions.
 (decl alu_rr_imm_shift (ALUOp Type Reg ImmShift) Reg)
 (rule (alu_rr_imm_shift op ty src imm)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRImmShift op (operand_size ty) dst src imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRR` instructions.
 (decl alu_rrr (ALUOp Type Reg Reg) Reg)
 (rule (alu_rrr op ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRR op (operand_size ty) dst src1 src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecRRR` instructions.
 (decl vec_rrr (VecALUOp Reg Reg VectorSize) Reg)
 (rule (vec_rrr op src1 src2 size)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecRRR op dst src1 src2 size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecLanes` instructions.
 (decl vec_lanes (VecLanesOp Reg VectorSize) Reg)
 (rule (vec_lanes op src size)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecLanes op dst src size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecDup` instructions.
 (decl vec_dup (Reg VectorSize) Reg)
 (rule (vec_dup src size)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecDup dst src size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRImm12` instructions.
 (decl alu_rr_imm12 (ALUOp Type Reg Imm12) Reg)
 (rule (alu_rr_imm12 op ty src imm)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRImm12 op (operand_size ty) dst src imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRRShift` instructions.
 (decl alu_rrr_shift (ALUOp Type Reg Reg ShiftOpAndAmt) Reg)
 (rule (alu_rrr_shift op ty src1 src2 shift)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRRShift op (operand_size ty) dst src1 src2 shift))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRRExtend` instructions.
 (decl alu_rrr_extend (ALUOp Type Reg Reg ExtendOp) Reg)
 (rule (alu_rrr_extend op ty src1 src2 extend)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRRExtend op (operand_size ty) dst src1 src2 extend))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Same as `alu_rrr_extend`, but takes an `ExtendedValue` packed "pair" instead
 ;; of a `Reg` and an `ExtendOp`.
@@ -1448,14 +1448,14 @@
 (rule (alu_rrrr op src1 src2 src3)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.AluRRRR op dst src1 src2 src3))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.BitRR` instructions.
 (decl bit_rr (BitOp Type Reg) Reg)
 (rule (bit_rr op ty src)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.BitRR op (operand_size ty) dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `adds` instructions.
 (decl add_with_flags_paired (Type Reg Reg) ProducesFlags)
@@ -1463,7 +1463,7 @@
       (let ((dst WritableReg (temp_writable_reg $I64)))
         (ProducesFlags.ProducesFlagsReturnsResultWithConsumer
          (MInst.AluRRR (ALUOp.AddS) (operand_size ty) dst src1 src2)
-         (writable_reg_to_reg dst))))
+         dst)))
 
 ;; Helper for emitting `adc` instructions.
 (decl adc_paired (Type Reg Reg) ConsumesFlags)
@@ -1471,7 +1471,7 @@
       (let ((dst WritableReg (temp_writable_reg $I64)))
         (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer
          (MInst.AluRRR (ALUOp.Adc) (operand_size ty) dst src1 src2)
-         (writable_reg_to_reg dst))))
+         dst)))
 
 ;; Helper for emitting `subs` instructions.
 (decl sub_with_flags_paired (Type Reg Reg) ProducesFlags)
@@ -1479,7 +1479,7 @@
       (let ((dst WritableReg (temp_writable_reg $I64)))
         (ProducesFlags.ProducesFlagsReturnsResultWithConsumer
          (MInst.AluRRR (ALUOp.SubS) (operand_size ty) dst src1 src2)
-         (writable_reg_to_reg dst))))
+         dst)))
 
 (decl cmp64_imm (Reg Imm12) ProducesFlags)
 (rule (cmp64_imm src1 src2)
@@ -1493,21 +1493,21 @@
       (let ((dst WritableReg (temp_writable_reg $I64)))
         (ConsumesFlags.ConsumesFlagsReturnsResultWithProducer
          (MInst.AluRRR (ALUOp.Sbc) (operand_size ty) dst src1 src2)
-         (writable_reg_to_reg dst))))
+         dst)))
 
 ;; Helper for emitting `MInst.VecMisc` instructions.
 (decl vec_misc (VecMisc2 Reg VectorSize) Reg)
 (rule (vec_misc op src size)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecMisc op dst src size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecRRRLong` instructions.
 (decl vec_rrr_long (VecRRRLongOp Reg Reg bool) Reg)
 (rule (vec_rrr_long op src1 src2 high_half)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecRRRLong op dst src1 src2 high_half))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecRRRLong` instructions, but for variants
 ;; where the operation both reads and modifies the destination register.
@@ -1518,28 +1518,28 @@
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_1 Unit (emit (MInst.FpuMove128 dst src1)))
             (_2 Unit (emit (MInst.VecRRRLong op dst src2 src3 high_half))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecRRNarrow` instructions.
 (decl vec_rr_narrow (VecRRNarrowOp Reg bool) Reg)
 (rule (vec_rr_narrow op src high_half)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecRRNarrow op dst src high_half))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.VecRRLong` instructions.
 (decl vec_rr_long (VecRRLongOp Reg bool) Reg)
 (rule (vec_rr_long op src high_half)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.VecRRLong op dst src high_half))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovToFpu` instructions.
 (decl mov_to_fpu (Reg ScalarSize) Reg)
 (rule (mov_to_fpu x size)
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_ Unit (emit (MInst.MovToFpu dst x size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovToVec` instructions.
 (decl mov_to_vec (Reg Reg u8 VectorSize) Reg)
@@ -1547,35 +1547,35 @@
       (let ((dst WritableReg (temp_writable_reg $I8X16))
             (_1 Unit (emit (MInst.FpuMove128 dst src1)))
             (_2 Unit (emit (MInst.MovToVec dst src2 lane size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovFromVec` instructions.
 (decl mov_from_vec (Reg u8 VectorSize) Reg)
 (rule (mov_from_vec rn idx size)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.MovFromVec dst rn idx size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovFromVecSigned` instructions.
 (decl mov_from_vec_signed (Reg u8 VectorSize OperandSize) Reg)
 (rule (mov_from_vec_signed rn idx size scalar_size)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.MovFromVecSigned dst rn idx size scalar_size))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.Extend` instructions.
 (decl extend (Reg bool u8 u8) Reg)
 (rule (extend rn signed from_bits to_bits)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.Extend dst rn signed from_bits to_bits))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.LoadAcquire` instructions.
 (decl load_acquire (Type Reg) Reg)
 (rule (load_acquire ty addr)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.LoadAcquire ty dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for generating a `tst` instruction.
 ;;
@@ -1600,7 +1600,7 @@
       (let ((dst WritableReg (temp_writable_reg $I64)))
         (ConsumesFlags.ConsumesFlagsReturnsReg
          (MInst.CSel dst cond if_true if_false)
-         (writable_reg_to_reg dst))))
+         dst)))
 
 ;; Helpers for generating `add` instructions.
 
@@ -1870,36 +1870,36 @@
 ;; Place a `Value` into a register, sign extending it to 32-bits
 (decl put_in_reg_sext32 (Value) Reg)
 (rule (put_in_reg_sext32 val @ (value_type (fits_in_32 ty)))
-      (extend (put_in_reg val) $true (ty_bits ty) 32))
+      (extend val $true (ty_bits ty) 32))
 
 ;; 32/64-bit passthrough.
-(rule (put_in_reg_sext32 val @ (value_type $I32)) (put_in_reg val))
+(rule (put_in_reg_sext32 val @ (value_type $I32)) val)
-(rule (put_in_reg_sext32 val @ (value_type $I64)) (put_in_reg val))
+(rule (put_in_reg_sext32 val @ (value_type $I64)) val)
 
 ;; Place a `Value` into a register, zero extending it to 32-bits
 (decl put_in_reg_zext32 (Value) Reg)
 (rule (put_in_reg_zext32 val @ (value_type (fits_in_32 ty)))
-      (extend (put_in_reg val) $false (ty_bits ty) 32))
+      (extend val $false (ty_bits ty) 32))
 
 ;; 32/64-bit passthrough.
-(rule (put_in_reg_zext32 val @ (value_type $I32)) (put_in_reg val))
+(rule (put_in_reg_zext32 val @ (value_type $I32)) val)
-(rule (put_in_reg_zext32 val @ (value_type $I64)) (put_in_reg val))
+(rule (put_in_reg_zext32 val @ (value_type $I64)) val)
 
 ;; Place a `Value` into a register, sign extending it to 64-bits
 (decl put_in_reg_sext64 (Value) Reg)
 (rule (put_in_reg_sext64 val @ (value_type (fits_in_32 ty)))
-      (extend (put_in_reg val) $true (ty_bits ty) 64))
+      (extend val $true (ty_bits ty) 64))
 
 ;; 64-bit passthrough.
-(rule (put_in_reg_sext64 val @ (value_type $I64)) (put_in_reg val))
+(rule (put_in_reg_sext64 val @ (value_type $I64)) val)
 
 ;; Place a `Value` into a register, zero extending it to 64-bits
 (decl put_in_reg_zext64 (Value) Reg)
 (rule (put_in_reg_zext64 val @ (value_type (fits_in_32 ty)))
-      (extend (put_in_reg val) $false (ty_bits ty) 64))
+      (extend val $false (ty_bits ty) 64))
 
 ;; 64-bit passthrough.
-(rule (put_in_reg_zext64 val @ (value_type $I64)) (put_in_reg val))
+(rule (put_in_reg_zext64 val @ (value_type $I64)) val)
 
 ;; Misc instruction helpers ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 

cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle 9ea75a6f790b5c03
-src/prelude.isle 980b300b3ec3e338
+src/prelude.isle 8bf92e18323e7041
-src/isa/aarch64/inst.isle 62ab4218b01cc799
+src/isa/aarch64/inst.isle 3678d0a37bdb4cff
-src/isa/aarch64/lower.isle 4496f1be20d545
+src/isa/aarch64/lower.isle 1bc1f817a4721801

cranelift/codegen/src/isa/s390x/inst.isle

@@ -1128,10 +1128,10 @@
 (decl lower_address (MemFlags Value Offset32) MemArg)
 
 (rule (lower_address flags addr (i64_from_offset offset))
-      (memarg_reg_plus_off (put_in_reg addr) offset flags))
+      (memarg_reg_plus_off addr offset flags))
 
 (rule (lower_address flags (def_inst (iadd x y)) (i64_from_offset 0))
-      (memarg_reg_plus_reg (put_in_reg x) (put_in_reg y) flags))
+      (memarg_reg_plus_reg x y flags))
 
 (rule (lower_address flags
         (def_inst (symbol_value (symbol_value_data name (reloc_distance_near) offset)))
@@ -1163,7 +1163,7 @@
 (rule (stack_addr_impl ty stack_slot offset)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (abi_stackslot_addr dst stack_slot offset))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 
 ;; Helpers for extracting extensions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1293,12 +1293,12 @@
 ;; Construct a register pair from a writable register pair.
 (decl writable_regpair_to_regpair (WritableRegPair) RegPair)
 (rule (writable_regpair_to_regpair (WritableRegPair.WritableRegPair hi lo))
-      (RegPair.RegPair (writable_reg_to_reg hi) (writable_reg_to_reg lo)))
+      (RegPair.RegPair hi lo))
 
 ;; Uninitalized register pair that can be used for piecewise initialization.
 (decl uninitialized_regpair () RegPair)
 (rule (uninitialized_regpair)
-      (writable_regpair_to_regpair (temp_writable_regpair)))
+      (temp_writable_regpair))
 
 ;; Retrieve the high word of the register pair.
 (decl regpair_hi (RegPair) Reg)
@@ -1316,70 +1316,70 @@
 (rule (alu_rrr ty op src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.AluRRR op dst src1 src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRRSImm16` instructions.
 (decl alu_rrsimm16 (Type ALUOp Reg i16) Reg)
 (rule (alu_rrsimm16 ty op src imm)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.AluRRSImm16 op dst src imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRR` instructions.
 (decl alu_rr (Type ALUOp Reg Reg) Reg)
 (rule (alu_rr ty op src1 src2)
       (let ((dst WritableReg (copy_writable_reg ty src1))
             (_ Unit (emit (MInst.AluRR op dst src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRX` instructions.
 (decl alu_rx (Type ALUOp Reg MemArg) Reg)
 (rule (alu_rx ty op src mem)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRX op dst mem))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRSImm16` instructions.
 (decl alu_rsimm16 (Type ALUOp Reg i16) Reg)
 (rule (alu_rsimm16 ty op src imm)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRSImm16 op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRSImm32` instructions.
 (decl alu_rsimm32 (Type ALUOp Reg i32) Reg)
 (rule (alu_rsimm32 ty op src imm)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRSImm32 op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRUImm32` instructions.
 (decl alu_ruimm32 (Type ALUOp Reg u32) Reg)
 (rule (alu_ruimm32 ty op src imm)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRUImm32 op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRUImm16Shifted` instructions.
 (decl alu_ruimm16shifted (Type ALUOp Reg UImm16Shifted) Reg)
 (rule (alu_ruimm16shifted ty op src imm)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRUImm16Shifted op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AluRUImm32Shifted` instructions.
 (decl alu_ruimm32shifted (Type ALUOp Reg UImm32Shifted) Reg)
 (rule (alu_ruimm32shifted ty op src imm)
       (let ((dst WritableReg (copy_writable_reg ty src))
             (_ Unit (emit (MInst.AluRUImm32Shifted op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.SMulWide` instructions.
 (decl smul_wide (Reg Reg) RegPair)
 (rule (smul_wide src1 src2)
       (let ((dst WritableRegPair (temp_writable_regpair))
             (_ Unit (emit (MInst.SMulWide src1 src2))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.UMulWide` instructions.
 (decl umul_wide (Reg Reg) RegPair)
@@ -1387,42 +1387,42 @@
       (let ((dst WritableRegPair (temp_writable_regpair))
             (_1 Unit (emit (MInst.Mov64 (writable_regpair_lo dst) src2)))
             (_2 Unit (emit (MInst.UMulWide src1))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.SDivMod32` instructions.
 (decl sdivmod32 (RegPair Reg) RegPair)
 (rule (sdivmod32 src1 src2)
       (let ((dst WritableRegPair (copy_writable_regpair src1))
             (_ Unit (emit (MInst.SDivMod32 src2))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.SDivMod64` instructions.
 (decl sdivmod64 (RegPair Reg) RegPair)
 (rule (sdivmod64 src1 src2)
       (let ((dst WritableRegPair (copy_writable_regpair src1))
             (_ Unit (emit (MInst.SDivMod64 src2))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.UDivMod32` instructions.
 (decl udivmod32 (RegPair Reg) RegPair)
 (rule (udivmod32 src1 src2)
       (let ((dst WritableRegPair (copy_writable_regpair src1))
             (_ Unit (emit (MInst.UDivMod32 src2))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.UDivMod64` instructions.
 (decl udivmod64 (RegPair Reg) RegPair)
 (rule (udivmod64 src1 src2)
       (let ((dst WritableRegPair (copy_writable_regpair src1))
             (_ Unit (emit (MInst.UDivMod64 src2))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Helper for emitting `MInst.ShiftRR` instructions.
 (decl shift_rr (Type ShiftOp Reg u8 Reg) Reg)
 (rule (shift_rr ty op src shift_imm shift_reg)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.ShiftRR op dst src shift_imm shift_reg))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.RxSBGTest` instructions.
 (decl rxsbg_test (RxSBGOp Reg Reg u8 u8 i8) ProducesFlags)
@@ -1435,7 +1435,7 @@
 (rule (unary_rr ty op src)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.UnaryRR op dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.CmpRR` instructions.
 (decl cmp_rr (CmpOp Reg Reg) ProducesFlags)
@@ -1467,21 +1467,21 @@
 (rule (atomic_rmw_impl ty op src mem)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.AtomicRmw op dst src mem))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AtomicCas32` instructions.
 (decl atomic_cas32 (Reg Reg MemArg) Reg)
 (rule (atomic_cas32 src1 src2 mem)
       (let ((dst WritableReg (copy_writable_reg $I32 src1))
             (_ Unit (emit (MInst.AtomicCas32 dst src2 mem))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.AtomicCas64` instructions.
 (decl atomic_cas64 (Reg Reg MemArg) Reg)
 (rule (atomic_cas64 src1 src2 mem)
       (let ((dst WritableReg (copy_writable_reg $I64 src1))
             (_ Unit (emit (MInst.AtomicCas64 dst src2 mem))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.Fence` instructions.
 (decl fence_impl () SideEffectNoResult)
@@ -1493,35 +1493,35 @@
 (rule (load32 addr)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit (MInst.Load32 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.Load64` instructions.
 (decl load64 (MemArg) Reg)
 (rule (load64 addr)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.Load64 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.LoadRev16` instructions.
 (decl loadrev16 (MemArg) Reg)
 (rule (loadrev16 addr)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit (MInst.LoadRev16 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.LoadRev32` instructions.
 (decl loadrev32 (MemArg) Reg)
 (rule (loadrev32 addr)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit (MInst.LoadRev32 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.LoadRev64` instructions.
 (decl loadrev64 (MemArg) Reg)
 (rule (loadrev64 addr)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.LoadRev64 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.Store8` instructions.
 (decl store8 (Reg MemArg) SideEffectNoResult)
@@ -1583,28 +1583,28 @@
 (rule (fpu_rr ty op src)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.FpuRR op dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuRRR` instructions.
 (decl fpu_rrr (Type FPUOp2 Reg Reg) Reg)
 (rule (fpu_rrr ty op src1 src2)
       (let ((dst WritableReg (copy_writable_reg ty src1))
             (_ Unit (emit (MInst.FpuRRR op dst src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuRRRR` instructions.
 (decl fpu_rrrr (Type FPUOp3 Reg Reg Reg) Reg)
 (rule (fpu_rrrr ty op src1 src2 src3)
       (let ((dst WritableReg (copy_writable_reg ty src1))
             (_ Unit (emit (MInst.FpuRRRR op dst src2 src3))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuCopysign` instructions.
 (decl fpu_copysign (Type Reg Reg) Reg)
 (rule (fpu_copysign ty src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.FpuCopysign dst src1 src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuCmp32` instructions.
 (decl fpu_cmp32 (Reg Reg) ProducesFlags)
@@ -1621,70 +1621,70 @@
 (rule (fpu_to_int ty op src)
       (let ((dst WritableReg (temp_writable_reg ty)))
         (ProducesFlags.ProducesFlagsReturnsReg (MInst.FpuToInt op dst src)
-                                               (writable_reg_to_reg dst))))
+                                               dst)))
 
 ;; Helper for emitting `MInst.IntToFpu` instructions.
 (decl int_to_fpu (Type IntToFpuOp Reg) Reg)
 (rule (int_to_fpu ty op src)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.IntToFpu op dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuRound` instructions.
 (decl fpu_round (Type FpuRoundMode Reg) Reg)
 (rule (fpu_round ty mode src)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.FpuRound mode dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuVecRRR` instructions.
 (decl fpuvec_rrr (Type FPUOp2 Reg Reg) Reg)
 (rule (fpuvec_rrr ty op src1 src2)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit (MInst.FpuVecRRR op dst src1 src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovToFpr` instructions.
 (decl mov_to_fpr (Reg) Reg)
 (rule (mov_to_fpr src)
       (let ((dst WritableReg (temp_writable_reg $F64))
             (_ Unit (emit (MInst.MovToFpr dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.MovFromFpr` instructions.
 (decl mov_from_fpr (Reg) Reg)
 (rule (mov_from_fpr src)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.MovFromFpr dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuLoad32` instructions.
 (decl fpu_load32 (MemArg) Reg)
 (rule (fpu_load32 addr)
       (let ((dst WritableReg (temp_writable_reg $F32))
             (_ Unit (emit (MInst.FpuLoad32 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuLoad64` instructions.
 (decl fpu_load64 (MemArg) Reg)
 (rule (fpu_load64 addr)
       (let ((dst WritableReg (temp_writable_reg $F64))
             (_ Unit (emit (MInst.FpuLoad64 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuLoadRev32` instructions.
 (decl fpu_loadrev32 (MemArg) Reg)
 (rule (fpu_loadrev32 addr)
       (let ((dst WritableReg (temp_writable_reg $F32))
             (_ Unit (emit (MInst.FpuLoadRev32 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuLoadRev64` instructions.
 (decl fpu_loadrev64 (MemArg) Reg)
 (rule (fpu_loadrev64 addr)
       (let ((dst WritableReg (temp_writable_reg $F64))
             (_ Unit (emit (MInst.FpuLoadRev64 dst addr))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.FpuStore32` instructions.
 (decl fpu_store32 (Reg MemArg) SideEffectNoResult)
@@ -1712,14 +1712,14 @@
       (let ((dst WritableReg (temp_writable_reg $I64))
             (boxed_name BoxExternalName (box_external_name name))
             (_ Unit (emit (MInst.LoadExtNameFar dst boxed_name offset))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.LoadAddr` instructions.
 (decl load_addr (MemArg) Reg)
 (rule (load_addr mem)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit (MInst.LoadAddr dst mem))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Helper for emitting `MInst.Jump` instructions.
 (decl jump_impl (MachLabel) SideEffectNoResult)
@@ -1784,45 +1784,45 @@
 (decl push_alu_reg (VecMInstBuilder ALUOp WritableReg Reg Reg) Reg)
 (rule (push_alu_reg ib op (real_reg dst) src1 src2)
       (let ((_ Unit (inst_builder_push ib (MInst.AluRRR op dst src1 src2))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Push a `MInst.AluRUImm32Shifted` instruction to a sequence.
 (decl push_alu_uimm32shifted (VecMInstBuilder ALUOp WritableReg Reg UImm32Shifted) Reg)
 (rule (push_alu_uimm32shifted ib op (real_reg dst) (same_reg <dst) imm)
       (let ((_ Unit (inst_builder_push ib (MInst.AluRUImm32Shifted op dst imm))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Push a `MInst.ShiftRR` instruction to a sequence.
 (decl push_shift (VecMInstBuilder ShiftOp WritableReg Reg u8 Reg) Reg)
 (rule (push_shift ib op (real_reg dst) src shift_imm shift_reg)
       (let ((_ Unit (inst_builder_push ib
                       (MInst.ShiftRR op dst src shift_imm shift_reg))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Push a `MInst.RxSBG` instruction to a sequence.
 (decl push_rxsbg (VecMInstBuilder RxSBGOp WritableReg Reg Reg u8 u8 i8) Reg)
 (rule (push_rxsbg ib op (real_reg dst) (same_reg <dst) src start_bit end_bit rotate_amt)
       (let ((_ Unit (inst_builder_push ib
                       (MInst.RxSBG op dst src start_bit end_bit rotate_amt))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Push a `MInst.UnaryRR` instruction to a sequence.
 (decl push_unary (VecMInstBuilder UnaryOp WritableReg Reg) Reg)
 (rule (push_unary ib op (real_reg dst) src)
       (let ((_ Unit (inst_builder_push ib (MInst.UnaryRR op dst src))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Push a `MInst.AtomicCas32` instruction to a sequence.
 (decl push_atomic_cas32 (VecMInstBuilder WritableReg Reg MemArg) Reg)
 (rule (push_atomic_cas32 ib (real_reg dst_src1) src2 mem)
       (let ((_ Unit (inst_builder_push ib (MInst.AtomicCas32 dst_src1 src2 mem))))
-        (writable_reg_to_reg dst_src1)))
+        dst_src1))
 
 ;; Push a `MInst.AtomicCas64` instruction to a sequence.
 (decl push_atomic_cas64 (VecMInstBuilder WritableReg Reg MemArg) Reg)
 (rule (push_atomic_cas64 ib (real_reg dst_src1) src2 mem)
       (let ((_ Unit (inst_builder_push ib (MInst.AtomicCas64 dst_src1 src2 mem))))
-        (writable_reg_to_reg dst_src1)))
+        dst_src1))
 
 ;; Push instructions to break out of the loop if condition is met.
 (decl push_break_if (VecMInstBuilder ProducesFlags Cond) Reg)
@@ -1863,7 +1863,7 @@
 
 ;; Likewise, but returning a Reg instead of a WritableReg.
 (decl copy_reg (Type Reg) Reg)
-(rule (copy_reg ty reg) (writable_reg_to_reg (copy_writable_reg ty reg)))
+(rule (copy_reg ty reg) (copy_writable_reg ty reg))
 
 ;; Move from memory location into destination.
 (decl emit_load (Type WritableReg MemArg) Unit)
@@ -1938,7 +1938,7 @@
 (rule (imm ty n)
       (let ((dst WritableReg (temp_writable_reg ty))
             (_ Unit (emit_imm ty dst n)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Place an immediate into the low half of a register pair.
 ;; The high half is taken from the input.
@@ -1946,7 +1946,7 @@
 (rule (imm_regpair_lo ty n regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_imm ty (writable_regpair_lo dst) n)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Place an immediate into the high half of a register pair.
 ;; The low half is taken from the input.
@@ -1954,7 +1954,7 @@
 (rule (imm_regpair_hi ty n regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_imm ty (writable_regpair_hi dst) n)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 
 ;; Helpers for generating extensions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2003,7 +2003,7 @@
 (rule (zext32_reg ty src)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit_zext32_reg dst ty src)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Sign-extend a register from a smaller `Type` into a 32-bit register.
 ;; This handles both integer and boolean input types (except $B1).
@@ -2011,7 +2011,7 @@
 (rule (sext32_reg ty src)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit_sext32_reg dst ty src)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Zero-extend a register from a smaller `Type` into a 64-bit register.
 ;; This handles both integer and boolean input types (except $B1).
@@ -2019,7 +2019,7 @@
 (rule (zext64_reg ty src)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit_zext64_reg dst ty src)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Sign-extend a register from a smaller `Type` into a 64-bit register.
 ;; This handles both integer and boolean input types (except $B1).
@@ -2027,7 +2027,7 @@
 (rule (sext64_reg ty src)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit_sext64_reg dst ty src)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 
 ;; Zero-extend memory from a smaller `Type` into a 32-bit destination.  (Non-SSA form.)
@@ -2057,28 +2057,28 @@
 (rule (zext32_mem ty mem)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit_zext32_mem dst ty mem)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Sign-extend memory from a smaller `Type` into a 32-bit register.
 (decl sext32_mem (Type MemArg) Reg)
 (rule (sext32_mem ty mem)
       (let ((dst WritableReg (temp_writable_reg $I32))
             (_ Unit (emit_sext32_mem dst ty mem)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Zero-extend memory from a smaller `Type` into a 64-bit register.
 (decl zext64_mem (Type MemArg) Reg)
 (rule (zext64_mem ty mem)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit_zext64_mem dst ty mem)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Sign-extend memory from a smaller `Type` into a 64-bit register.
 (decl sext64_mem (Type MemArg) Reg)
 (rule (sext64_mem ty mem)
       (let ((dst WritableReg (temp_writable_reg $I64))
             (_ Unit (emit_sext64_mem dst ty mem)))
-        (writable_reg_to_reg dst)))
+        dst))
 
 
 ;; Place `Value` into destination, zero-extending to 32 bits if smaller.  (Non-SSA form.)
@@ -2175,7 +2175,7 @@
 (rule (put_in_regpair_lo_zext32 val regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_put_in_reg_zext32 (writable_regpair_lo dst) val)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Place `Value` into the low half of a register pair, sign-extending
 ;; to 32 bits if smaller.  The high half is taken from the input.
@@ -2183,7 +2183,7 @@
 (rule (put_in_regpair_lo_sext32 val regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_put_in_reg_sext32 (writable_regpair_lo dst) val)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Place `Value` into the low half of a register pair, zero-extending
 ;; to 64 bits if smaller.  The high half is taken from the input.
@@ -2191,7 +2191,7 @@
 (rule (put_in_regpair_lo_zext64 val regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_put_in_reg_zext64 (writable_regpair_lo dst) val)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Place `Value` into the low half of a register pair, sign-extending
 ;; to 64 bits if smaller.  The high half is taken from the input.
@@ -2199,7 +2199,7 @@
 (rule (put_in_regpair_lo_sext64 val regpair)
       (let ((dst WritableRegPair (copy_writable_regpair regpair))
             (_ Unit (emit_put_in_reg_sext64 (writable_regpair_lo dst) val)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 
 ;; Helpers for generating conditional moves ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2208,10 +2208,10 @@
 (decl emit_cmov_imm (Type WritableReg Cond i16) ConsumesFlags)
 (rule (emit_cmov_imm (gpr32_ty _ty) dst cond imm)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov32SImm16 dst cond imm)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 (rule (emit_cmov_imm (gpr64_ty _ty) dst cond imm)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov64SImm16 dst cond imm)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 
 ;; Conditionally select between immediate and source register.
 (decl cmov_imm (Type Cond i16 Reg) ConsumesFlags)
@@ -2226,7 +2226,7 @@
       (let ((dst WritableRegPair (copy_writable_regpair src))
             (consumer ConsumesFlags (emit_cmov_imm ty (writable_regpair_lo dst) cond imm))
             (_ Reg (with_flags_reg producer consumer)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Conditionally modify the high word of a register pair.
 ;; This cannot be ConsumesFlags since the return value is not a register.
@@ -2235,22 +2235,22 @@
       (let ((dst WritableRegPair (copy_writable_regpair src))
             (consumer ConsumesFlags (emit_cmov_imm ty (writable_regpair_hi dst) cond imm))
             (_ Reg (with_flags_reg producer consumer)))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; Conditionally select between two source registers.  (Non-SSA form.)
 (decl emit_cmov_reg (Type WritableReg Cond Reg) ConsumesFlags)
 (rule (emit_cmov_reg (gpr32_ty _ty) dst cond src)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov32 dst cond src)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 (rule (emit_cmov_reg (gpr64_ty _ty) dst cond src)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.CMov64 dst cond src)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 (rule (emit_cmov_reg $F32 dst cond src)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.FpuCMov32 dst cond src)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 (rule (emit_cmov_reg $F64 dst cond src)
       (ConsumesFlags.ConsumesFlagsReturnsReg (MInst.FpuCMov64 dst cond src)
-                                             (writable_reg_to_reg dst)))
+                                             dst))
 
 ;; Conditionally select between two source registers.
 (decl cmov_reg (Type Cond Reg Reg) ConsumesFlags)
@@ -2339,7 +2339,7 @@
             (_1 Unit (emit_producer producer))
             (_2 Unit (emit_mov ty dst reg_false))
             (_3 Unit (emit_consumer (emit_cmov_reg ty dst cond reg_true))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Use a boolean condition to select between two immediate values.
 (decl select_bool_imm (Type ProducesBool i16 u64) Reg)
@@ -2348,7 +2348,7 @@
             (_1 Unit (emit_producer producer))
             (_2 Unit (emit_imm ty dst imm_false))
             (_3 Unit (emit_consumer (emit_cmov_imm ty dst cond imm_true))))
-        (writable_reg_to_reg dst)))
+        dst))
 
 ;; Lower a boolean condition to a boolean type.  The value used to represent
 ;; "true" is -1 for all result types except for $B1, which uses 1.
@@ -2504,7 +2504,7 @@
 (rule (clz_reg 64 x)
       (let ((dst WritableRegPair (temp_writable_regpair))
             (_ Unit (emit (MInst.Flogr x))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 ;; If another zero return value was requested, we need to override the flogr
 ;; result.  This cannot use any of the normal flags mechanisms because we need
@@ -2515,7 +2515,7 @@
             (_1 Unit (emit (MInst.Flogr x)))
             (_2 Unit (emit (MInst.CMov64SImm16 (writable_regpair_hi dst)
                               (intcc_as_cond (IntCC.Equal)) zeroval))))
-        (writable_regpair_to_regpair dst)))
+        dst))
 
 
 ;; Helpers for generating `add` instructions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -3243,3 +3243,7 @@
 (decl fcmp_reg (Type Reg Reg) ProducesFlags)
 (rule (fcmp_reg $F32 src1 src2) (fpu_cmp32 src1 src2))
 (rule (fcmp_reg $F64 src1 src2) (fpu_cmp64 src1 src2))
+
+;; Implicit conversions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(convert WritableRegPair RegPair writable_regpair_to_regpair)

cranelift/codegen/src/isa/s390x/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle 9ea75a6f790b5c03
-src/prelude.isle 980b300b3ec3e338
+src/prelude.isle 8bf92e18323e7041
-src/isa/s390x/inst.isle b0f53fcf0cdadde1
+src/isa/s390x/inst.isle d91a16074ab186a8
-src/isa/s390x/lower.isle 59264a7442cf6e1c
+src/isa/s390x/lower.isle 5626c0ef61594d61

cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs

@@ -8210,21 +8210,18 @@ pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<ValueReg
             match pattern2_0 {
                 &Opcode::Copy => {
                     // Rule at src/isa/s390x/lower.isle line 53.
-                    let expr0_0 = C::put_in_reg(ctx, pattern2_1);
+                    let expr0_0 = C::put_in_regs(ctx, pattern2_1);
-                    let expr1_0 = C::value_reg(ctx, expr0_0);
+                    return Some(expr0_0);
-                    return Some(expr1_0);
                 }
                 &Opcode::Breduce => {
                     // Rule at src/isa/s390x/lower.isle line 752.
-                    let expr0_0 = C::put_in_reg(ctx, pattern2_1);
+                    let expr0_0 = C::put_in_regs(ctx, pattern2_1);
-                    let expr1_0 = C::value_reg(ctx, expr0_0);
+                    return Some(expr0_0);
-                    return Some(expr1_0);
                 }
                 &Opcode::Ireduce => {
                     // Rule at src/isa/s390x/lower.isle line 596.
-                    let expr0_0 = C::put_in_reg(ctx, pattern2_1);
+                    let expr0_0 = C::put_in_regs(ctx, pattern2_1);
-                    let expr1_0 = C::value_reg(ctx, expr0_0);
+                    return Some(expr0_0);
-                    return Some(expr1_0);
                 }
                 _ => {}
             }

cranelift/codegen/src/isa/x64/inst.isle

@@ -162,27 +162,27 @@
        ;; GPR conditional move with the `OR` of two conditions; overwrites
        ;; the destination register.
        (CmoveOr (size OperandSize)
-              (cc1 CC)
+                (cc1 CC)
-              (cc2 CC)
+                (cc2 CC)
-              (consequent GprMem)
+                (consequent GprMem)
-              (alternative Gpr)
+                (alternative Gpr)
-              (dst WritableGpr))
+                (dst WritableGpr))
 
        ;; XMM conditional move; overwrites the destination register.
        (XmmCmove (size OperandSize)
-              (cc CC)
+                 (cc CC)
-              (consequent XmmMem)
+                 (consequent XmmMem)
-              (alternative Xmm)
+                 (alternative Xmm)
-              (dst WritableXmm))
+                 (dst WritableXmm))
 
        ;; XMM conditional move with the `OR` of two conditions; overwrites
        ;; the destination register.
        (XmmCmoveOr (size OperandSize)
-              (cc1 CC)
+                   (cc1 CC)
-              (cc2 CC)
+                   (cc2 CC)
-              (consequent XmmMem)
+                   (consequent XmmMem)
-              (alternative Xmm)
+                   (alternative Xmm)
-              (dst WritableXmm))
+                   (dst WritableXmm))
 
        ;; =========================================
        ;; Stack manipulation.
@@ -960,6 +960,13 @@
 (decl reg_to_gpr_mem (Reg) GprMem)
 (extern constructor reg_to_gpr_mem reg_to_gpr_mem)
 
+;; Construct a `GprMemImm` from a `Reg`.
+;;
+;; Asserts that the `Reg` is a GPR.
+(decl reg_to_gpr_mem_imm (Reg) GprMemImm)
+(rule (reg_to_gpr_mem_imm r)
+      (gpr_to_gpr_mem_imm (gpr_new r)))
+
 ;; Put a value into a GPR.
 ;;
 ;; Asserts that the value goes into a GPR.
@@ -1188,44 +1195,41 @@
 ;; that everything is equal to itself.
 (decl vector_all_ones (Type) Xmm)
 (rule (vector_all_ones ty)
-      (let ((wr WritableXmm (temp_writable_xmm))
+      (let ((r WritableXmm (temp_writable_xmm))
-            (r Xmm (writable_xmm_to_xmm wr))
             (_ Unit (emit (MInst.XmmRmR (sse_cmp_op $I32X4)
                                         r
-                                        (xmm_to_xmm_mem r)
+                                        r
-                                        wr))))
+                                        r))))
         r))
 
 ;; Helper for creating an SSE register holding an `i64x2` from two `i64` values.
 (decl make_i64x2_from_lanes (GprMem GprMem) Xmm)
 (rule (make_i64x2_from_lanes lo hi)
-      (let ((dst_xmm_w WritableXmm (temp_writable_xmm))
+      (let ((dst_xmm WritableXmm (temp_writable_xmm))
-            (dst_reg_w WritableReg (writable_xmm_to_reg dst_xmm_w))
+            (dst_reg WritableReg dst_xmm)
-            (dst_xmm_r Xmm (writable_xmm_to_xmm dst_xmm_w))
+            (_0 Unit (emit (MInst.XmmUninitializedValue dst_xmm)))
-            (dst_reg_r Reg (xmm_to_reg dst_xmm_r))
-            (_0 Unit (emit (MInst.XmmUninitializedValue dst_xmm_w)))
             (_1 Unit (emit (MInst.XmmRmRImm (SseOpcode.Pinsrd)
-                                            dst_reg_r
+                                            dst_reg
-                                            (gpr_mem_to_reg_mem lo)
+                                            lo
-                                            dst_reg_w
+                                            dst_reg
                                             0
                                             (OperandSize.Size64))))
             (_2 Unit (emit (MInst.XmmRmRImm (SseOpcode.Pinsrd)
-                                            dst_reg_r
+                                            dst_reg
-                                            (gpr_mem_to_reg_mem hi)
+                                            hi
-                                            dst_reg_w
+                                            dst_reg
                                             1
                                             (OperandSize.Size64)))))
-        dst_xmm_r))
+        dst_xmm))
 
 ;; Move a `RegMemImm.Reg` operand to an XMM register, if necessary.
 (decl mov_rmi_to_xmm (RegMemImm) XmmMemImm)
 (rule (mov_rmi_to_xmm rmi @ (RegMemImm.Mem _)) (xmm_mem_imm_new rmi))
 (rule (mov_rmi_to_xmm rmi @ (RegMemImm.Imm _)) (xmm_mem_imm_new rmi))
 (rule (mov_rmi_to_xmm (RegMemImm.Reg r))
-      (xmm_to_xmm_mem_imm (gpr_to_xmm (SseOpcode.Movd)
+      (gpr_to_xmm (SseOpcode.Movd)
-                                      (reg_to_gpr_mem r)
+                  r
-                                      (OperandSize.Size32))))
+                  (OperandSize.Size32)))
 
 ;;;; Helpers for Emitting Loads ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -1233,34 +1237,34 @@
 (decl x64_load (Type SyntheticAmode ExtKind) Reg)
 
 (rule (x64_load (fits_in_32 ty) addr (ExtKind.SignExtend))
-      (gpr_to_reg (movsx ty
+      (movsx ty
-                         (ext_mode (ty_bytes ty) 8)
+             (ext_mode (ty_bytes ty) 8)
-                         (reg_mem_to_gpr_mem (synthetic_amode_to_reg_mem addr)))))
+             addr))
 
 (rule (x64_load $I64 addr _ext_kind)
       (let ((dst WritableGpr (temp_writable_gpr))
             (_ Unit (emit (MInst.Mov64MR addr dst))))
-        (gpr_to_reg (writable_gpr_to_gpr dst))))
+        dst))
 
 (rule (x64_load $F32 addr _ext_kind)
-      (xmm_to_reg (xmm_unary_rm_r (SseOpcode.Movss)
+      (xmm_unary_rm_r (SseOpcode.Movss)
-                                  (reg_mem_to_xmm_mem (synthetic_amode_to_reg_mem addr)))))
+                      addr))
 
 (rule (x64_load $F64 addr _ext_kind)
-      (xmm_to_reg (xmm_unary_rm_r (SseOpcode.Movsd)
+      (xmm_unary_rm_r (SseOpcode.Movsd)
-                                  (reg_mem_to_xmm_mem (synthetic_amode_to_reg_mem addr)))))
+                      addr))
 
 (rule (x64_load $F32X4 addr _ext_kind)
-      (xmm_to_reg (xmm_unary_rm_r (SseOpcode.Movups)
+      (xmm_unary_rm_r (SseOpcode.Movups)
-                                  (reg_mem_to_xmm_mem (synthetic_amode_to_reg_mem addr)))))
+                      addr))
 
 (rule (x64_load $F64X2 addr _ext_kind)
-      (xmm_to_reg (xmm_unary_rm_r (SseOpcode.Movupd)
+      (xmm_unary_rm_r (SseOpcode.Movupd)
-                                  (reg_mem_to_xmm_mem (synthetic_amode_to_reg_mem addr)))))
+                      addr))
 
 (rule (x64_load (multi_lane _bits _lanes) addr _ext_kind)
-      (xmm_to_reg (xmm_unary_rm_r (SseOpcode.Movdqu)
+      (xmm_unary_rm_r (SseOpcode.Movdqu)
-                                  (reg_mem_to_xmm_mem (synthetic_amode_to_reg_mem addr)))))
+                      addr))
 
 ;;;; Instruction Constructors ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
@@ -1274,7 +1278,7 @@
       (let ((dst WritableGpr (temp_writable_gpr))
             (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.AluRmiR size opcode src1 src2 dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for emitting `add` instructions.
 (decl add (Type Gpr GprMemImm) Gpr)
@@ -1294,7 +1298,7 @@
                         src1
                         src2
                         dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 ;; Helper for creating `adc` instructions.
 (decl adc_paired (Type Gpr GprMemImm) ConsumesFlags)
@@ -1306,7 +1310,7 @@
                         src1
                         src2
                         dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 ;; Helper for emitting `sub` instructions.
 (decl sub (Type Gpr GprMemImm) Gpr)
@@ -1326,7 +1330,7 @@
                         src1
                         src2
                         dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 ;; Helper for creating `sbb` instructions.
 (decl sbb_paired (Type Gpr GprMemImm) ConsumesFlags)
@@ -1338,7 +1342,7 @@
                         src1
                         src2
                         dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 ;; Helper for creating `mul` instructions.
 (decl mul (Type Gpr GprMemImm) Gpr)
@@ -1380,19 +1384,19 @@
       (let ((dst WritableGpr (temp_writable_gpr))
             (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.Imm size simm64 dst))))
-        (gpr_to_reg (writable_gpr_to_gpr dst))))
+        dst))
 
 ;; `f32` immediates.
 (rule (imm $F32 bits)
-      (xmm_to_reg (gpr_to_xmm (SseOpcode.Movd)
+      (gpr_to_xmm (SseOpcode.Movd)
-                              (reg_mem_to_gpr_mem (RegMem.Reg (imm $I32 bits)))
+                  (imm $I32 bits)
-                              (OperandSize.Size32))))
+                  (OperandSize.Size32)))
 
 ;; `f64` immediates.
 (rule (imm $F64 bits)
-      (xmm_to_reg (gpr_to_xmm (SseOpcode.Movq)
+      (gpr_to_xmm (SseOpcode.Movq)
-                              (reg_mem_to_gpr_mem (RegMem.Reg (imm $I64 bits)))
+                  (imm $I64 bits)
-                              (OperandSize.Size64))))
+                  (OperandSize.Size64)))
 
 (decl nonzero_u64_fits_in_u32 (u64) u64)
 (extern extractor nonzero_u64_fits_in_u32 nonzero_u64_fits_in_u32)
@@ -1402,17 +1406,17 @@
 (rule (imm $I64 (nonzero_u64_fits_in_u32 x))
       (let ((dst WritableGpr (temp_writable_gpr))
             (_ Unit (emit (MInst.Imm (OperandSize.Size32) x dst))))
-        (gpr_to_reg (writable_gpr_to_gpr dst))))
+        dst))
 
 ;; Special case for integer zero immediates: turn them into an `xor r, r`.
 (rule (imm (fits_in_64 ty) 0)
       (let ((wgpr WritableGpr (temp_writable_gpr))
-            (g Gpr (writable_gpr_to_gpr wgpr))
+            (g Gpr wgpr)
             (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.AluRmiR size
                                          (AluRmiROpcode.Xor)
                                          g
-                                         (gpr_to_gpr_mem_imm g)
+                                         g
                                          wgpr))))
         (gpr_to_reg g)))
 
@@ -1420,20 +1424,20 @@
 ;; specific to the vector type.
 (rule (imm ty @ (multi_lane _bits _lanes) 0)
       (let ((wr WritableXmm (temp_writable_xmm))
-            (r Xmm (writable_xmm_to_xmm wr))
+            (r Xmm wr)
             (_ Unit (emit (MInst.XmmRmR (sse_xor_op ty)
                                         r
-                                        (xmm_to_xmm_mem r)
+                                        r
                                         wr))))
         (xmm_to_reg r)))
 
 ;; Special case for `f32` zero immediates to use `xorps`.
 (rule (imm $F32 0)
       (let ((wr WritableXmm (temp_writable_xmm))
-            (r Xmm (writable_xmm_to_xmm wr))
+            (r Xmm wr)
             (_ Unit (emit (MInst.XmmRmR (SseOpcode.Xorps)
                                         r
-                                        (xmm_to_xmm_mem r)
+                                        r
                                         wr))))
         (xmm_to_reg r)))
 
@@ -1442,10 +1446,10 @@
 ;; Special case for `f64` zero immediates to use `xorpd`.
 (rule (imm $F64 0)
       (let ((wr WritableXmm (temp_writable_xmm))
-            (r Xmm (writable_xmm_to_xmm wr))
+            (r Xmm wr)
             (_ Unit (emit (MInst.XmmRmR (SseOpcode.Xorpd)
                                         r
-                                        (xmm_to_xmm_mem r)
+                                        r
                                         wr))))
         (xmm_to_reg r)))
 
@@ -1459,7 +1463,7 @@
             ;; rely on their shift-amount-masking semantics.
             (size OperandSize (raw_operand_size_of_type ty))
             (_ Unit (emit (MInst.ShiftR size kind src1 src2 dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for creating `rotl` instructions.
 (decl x64_rotl (Type Gpr Imm8Gpr) Gpr)
@@ -1528,7 +1532,7 @@
             (size OperandSize (operand_size_of_type_32_64 ty)))
         (ConsumesFlags.ConsumesFlagsReturnsReg
          (MInst.Cmove size cc consequent alternative dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 (decl cmove_xmm (Type CC XmmMem Xmm) ConsumesFlags)
 (rule (cmove_xmm ty cc consequent alternative)
@@ -1536,38 +1540,38 @@
             (size OperandSize (operand_size_of_type_32_64 ty)))
         (ConsumesFlags.ConsumesFlagsReturnsReg
          (MInst.XmmCmove size cc consequent alternative dst)
-         (xmm_to_reg (writable_xmm_to_xmm dst)))))
+         dst)))
 
 ;; Helper for creating `cmove` instructions directly from values. This allows us
 ;; to special-case the `I128` types and default to the `cmove` helper otherwise.
 ;; It also eliminates some `put_in_reg*` boilerplate in the lowering ISLE code.
 (decl cmove_from_values (Type CC Value Value) ConsumesFlags)
 (rule (cmove_from_values $I128 cc consequent alternative)
-      (let ((cons ValueRegs (put_in_regs consequent))
+      (let ((cons ValueRegs consequent)
-            (alt ValueRegs (put_in_regs alternative))
+            (alt ValueRegs alternative)
             (dst1 WritableGpr (temp_writable_gpr))
             (dst2 WritableGpr (temp_writable_gpr))
             (size OperandSize (OperandSize.Size64))
             (lower_cmove MInst (MInst.Cmove
                                 size cc
-                                (gpr_to_gpr_mem (value_regs_get_gpr cons 0))
+                                (value_regs_get_gpr cons 0)
-                                (value_regs_get_gpr alt 0) dst1))
+                                (value_regs_get_gpr alt 0)
+                                dst1))
             (upper_cmove MInst (MInst.Cmove
                                 size cc
-                                (gpr_to_gpr_mem (value_regs_get_gpr cons 1))
+                                (value_regs_get_gpr cons 1)
-                                (value_regs_get_gpr alt 1) dst2)))
+                                (value_regs_get_gpr alt 1)
+                                dst2)))
         (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs
          lower_cmove
          upper_cmove
-         (value_regs
+         (value_regs dst1 dst2))))
-          (gpr_to_reg (writable_gpr_to_gpr dst1))
-          (gpr_to_reg (writable_gpr_to_gpr dst2))))))
 
 (rule (cmove_from_values (is_gpr_type (is_single_register_type ty)) cc consequent alternative)
-      (cmove ty cc (put_in_gpr_mem consequent) (put_in_gpr alternative)))
+      (cmove ty cc consequent alternative))
 
 (rule (cmove_from_values (is_xmm_type (is_single_register_type ty)) cc consequent alternative)
-      (cmove_xmm ty cc (put_in_xmm_mem consequent) (put_in_xmm alternative)))
+      (cmove_xmm ty cc consequent alternative))
 
 ;; Helper for creating `cmove` instructions with the logical OR of multiple
 ;; flags. Note that these instructions will always result in more than one
@@ -1578,7 +1582,7 @@
             (size OperandSize (operand_size_of_type_32_64 ty)))
         (ConsumesFlags.ConsumesFlagsReturnsReg
          (MInst.CmoveOr size cc1 cc2 consequent alternative dst)
-         (gpr_to_reg (writable_gpr_to_gpr dst)))))
+         dst)))
 
 (decl cmove_or_xmm (Type CC CC XmmMem Xmm) ConsumesFlags)
 (rule (cmove_or_xmm ty cc1 cc2 consequent alternative)
@@ -1586,52 +1590,51 @@
             (size OperandSize (operand_size_of_type_32_64 ty)))
         (ConsumesFlags.ConsumesFlagsReturnsReg
          (MInst.XmmCmoveOr size cc1 cc2 consequent alternative dst)
-         (xmm_to_reg (writable_xmm_to_xmm dst)))))
+         dst)))
 
 ;; Helper for creating `cmove_or` instructions directly from values. This allows
 ;; us to special-case the `I128` types and default to the `cmove_or` helper
 ;; otherwise.
 (decl cmove_or_from_values (Type CC CC Value Value) ConsumesFlags)
 (rule (cmove_or_from_values $I128 cc1 cc2 consequent alternative)
-      (let ((cons ValueRegs (put_in_regs consequent))
+      (let ((cons ValueRegs consequent)
-            (alt ValueRegs (put_in_regs alternative))
+            (alt ValueRegs alternative)
             (dst1 WritableGpr (temp_writable_gpr))
             (dst2 WritableGpr (temp_writable_gpr))
             (size OperandSize (OperandSize.Size64))
-            (lower_cmove MInst (MInst.CmoveOr size cc1 cc2 (gpr_to_gpr_mem (value_regs_get_gpr cons 0)) (value_regs_get_gpr alt 0) dst1))
+            (lower_cmove MInst (MInst.CmoveOr size cc1 cc2 (value_regs_get_gpr cons 0) (value_regs_get_gpr alt 0) dst1))
-            (upper_cmove MInst (MInst.CmoveOr size cc1 cc2 (gpr_to_gpr_mem (value_regs_get_gpr cons 1)) (value_regs_get_gpr alt 1) dst2)))
+            (upper_cmove MInst (MInst.CmoveOr size cc1 cc2 (value_regs_get_gpr cons 1) (value_regs_get_gpr alt 1) dst2)))
         (ConsumesFlags.ConsumesFlagsTwiceReturnsValueRegs
          lower_cmove
          upper_cmove
-         (value_regs (gpr_to_reg (writable_gpr_to_gpr dst1))
+         (value_regs dst1 dst2))))
-                     (gpr_to_reg (writable_gpr_to_gpr dst2))))))
 
 (rule (cmove_or_from_values (is_gpr_type (is_single_register_type ty)) cc1 cc2 consequent alternative)
-      (cmove_or ty cc1 cc2 (put_in_gpr_mem consequent) (put_in_gpr alternative)))
+      (cmove_or ty cc1 cc2 consequent alternative))
 
 (rule (cmove_or_from_values (is_xmm_type (is_single_register_type ty)) cc1 cc2 consequent alternative)
-      (cmove_or_xmm ty cc1 cc2 (put_in_xmm_mem consequent) (put_in_xmm alternative)))
+      (cmove_or_xmm ty cc1 cc2 consequent alternative))
 
 ;; Helper for creating `MInst.MovzxRmR` instructions.
 (decl movzx (Type ExtMode GprMem) Gpr)
 (rule (movzx ty mode src)
       (let ((dst WritableGpr (temp_writable_gpr))
             (_ Unit (emit (MInst.MovzxRmR mode src dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for creating `MInst.MovsxRmR` instructions.
 (decl movsx (Type ExtMode GprMem) Gpr)
 (rule (movsx ty mode src)
       (let ((dst WritableGpr (temp_writable_gpr))
             (_ Unit (emit (MInst.MovsxRmR mode src dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for creating `MInst.XmmRmR` instructions.
 (decl xmm_rm_r (Type SseOpcode Xmm XmmMem) Xmm)
 (rule (xmm_rm_r ty op src1 src2)
       (let ((dst WritableXmm (temp_writable_xmm))
             (_ Unit (emit (MInst.XmmRmR op src1 src2 dst))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `paddb` instructions.
 (decl paddb (Xmm XmmMem) Xmm)
@@ -1857,7 +1860,7 @@
       ;; `Inst` itself.)
       (let ((mask2 WritableXmm (xmm0))
             (_ Unit (emit (MInst.XmmUnaryRmR (SseOpcode.Movapd)
-                                             (xmm_to_xmm_mem mask)
+                                             mask
                                              mask2))))
         (xmm_rm_r $F64X2 (SseOpcode.Blendvpd) src1 src2)))
 
@@ -1953,17 +1956,17 @@
             (_ Unit (emit (MInst.XmmRmRImm op
                                            src1
                                            src2
-                                           (writable_xmm_to_reg dst)
+                                           dst
                                            imm
                                            size))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `palignr` instructions.
 (decl palignr (Xmm XmmMem u8 OperandSize) Xmm)
 (rule (palignr src1 src2 imm size)
       (xmm_rm_r_imm (SseOpcode.Palignr)
-                    (xmm_to_reg src1)
+                    src1
-                    (xmm_mem_to_reg_mem src2)
+                    src2
                     imm
                     size))
 
@@ -1971,8 +1974,8 @@
 (decl cmpps (Xmm XmmMem FcmpImm) Xmm)
 (rule (cmpps src1 src2 imm)
       (xmm_rm_r_imm (SseOpcode.Cmpps)
-                    (xmm_to_reg src1)
+                    src1
-                    (xmm_mem_to_reg_mem src2)
+                    src2
                     (encode_fcmp_imm imm)
                     (OperandSize.Size32)))
 
@@ -1980,8 +1983,8 @@
 (decl pinsrb (Xmm GprMem u8) Xmm)
 (rule (pinsrb src1 src2 lane)
       (xmm_rm_r_imm (SseOpcode.Pinsrb)
-                    (xmm_to_reg src1)
+                    src1
-                    (gpr_mem_to_reg_mem src2)
+                    src2
                     lane
                     (OperandSize.Size32)))
 
@@ -1989,8 +1992,8 @@
 (decl pinsrw (Xmm GprMem u8) Xmm)
 (rule (pinsrw src1 src2 lane)
       (xmm_rm_r_imm (SseOpcode.Pinsrw)
-                    (xmm_to_reg src1)
+                    src1
-                    (gpr_mem_to_reg_mem src2)
+                    src2
                     lane
                     (OperandSize.Size32)))
 
@@ -1998,8 +2001,8 @@
 (decl pinsrd (Xmm GprMem u8 OperandSize) Xmm)
 (rule (pinsrd src1 src2 lane size)
       (xmm_rm_r_imm (SseOpcode.Pinsrd)
-                    (xmm_to_reg src1)
+                    src1
-                    (gpr_mem_to_reg_mem src2)
+                    src2
                     lane
                     size))
 
@@ -2007,20 +2010,19 @@
 (decl insertps (Xmm XmmMem u8) Xmm)
 (rule (insertps src1 src2 lane)
       (xmm_rm_r_imm (SseOpcode.Insertps)
-                    (xmm_to_reg src1)
+                    src1
-                    (xmm_mem_to_reg_mem src2)
+                    src2
                     lane
                     (OperandSize.Size32)))
 
 ;; Helper for creating `pshufd` instructions.
 (decl pshufd (XmmMem u8 OperandSize) Xmm)
 (rule (pshufd src imm size)
-      (let ((w_dst WritableXmm (temp_writable_xmm))
+      (let ((dst WritableXmm (temp_writable_xmm))
-            (dst Xmm (writable_xmm_to_xmm w_dst))
             (_ Unit (emit (MInst.XmmRmRImm (SseOpcode.Pshufd)
-                                           (xmm_to_reg dst)
+                                           dst
-                                           (xmm_mem_to_reg_mem src)
+                                           src
-                                           (writable_xmm_to_reg w_dst)
+                                           dst
                                            imm
                                            size))))
         dst))
@@ -2030,7 +2032,7 @@
 (rule (xmm_unary_rm_r op src)
       (let ((dst WritableXmm (temp_writable_xmm))
             (_ Unit (emit (MInst.XmmUnaryRmR op src dst))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `pmovsxbw` instructions.
 (decl pmovsxbw (XmmMem) Xmm)
@@ -2062,7 +2064,7 @@
 (rule (xmm_unary_rm_r_evex op src)
       (let ((dst WritableXmm (temp_writable_xmm))
             (_ Unit (emit (MInst.XmmUnaryRmREvex op src dst))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `vpabsq` instructions.
 (decl vpabsq (XmmMem) Xmm)
@@ -2077,7 +2079,7 @@
                                             src1
                                             src2
                                             dst))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `vpmullq` instructions.
 ;;
@@ -2102,8 +2104,7 @@
                                        src2
                                        dst_lo
                                        dst_hi))))
-        (value_gprs (writable_gpr_to_gpr dst_lo)
+        (value_gprs dst_lo dst_hi)))
-                    (writable_gpr_to_gpr dst_hi))))
 
 ;; Helper for creating `mul` instructions that return both the lower and
 ;; (unsigned) higher halves of the result.
@@ -2119,7 +2120,7 @@
                                            src1
                                            src2
                                            dst))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `psllw` instructions.
 (decl psllw (Xmm XmmMemImm) Xmm)
@@ -2164,15 +2165,14 @@
 ;; Helper for creating `pextrd` instructions.
 (decl pextrd (Type Xmm u8) Gpr)
 (rule (pextrd ty src lane)
-      (let ((w_dst WritableGpr (temp_writable_gpr))
+      (let ((dst WritableGpr (temp_writable_gpr))
-            (r_dst Gpr (writable_gpr_to_gpr w_dst))
             (_ Unit (emit (MInst.XmmRmRImm (SseOpcode.Pextrd)
-                                           (gpr_to_reg r_dst)
+                                           dst
-                                           (RegMem.Reg (xmm_to_reg src))
+                                           src
-                                           (writable_gpr_to_reg w_dst)
+                                           dst
                                            lane
                                            (operand_size_of_type_32_64 (lane_type ty))))))
-        r_dst))
+        dst))
 
 ;; Helper for creating `cmppd` instructions.
 ;;
@@ -2182,8 +2182,8 @@
 (decl cmppd (Xmm XmmMem FcmpImm) Xmm)
 (rule (cmppd src1 src2 imm)
       (xmm_rm_r_imm (SseOpcode.Cmppd)
-                    (xmm_to_reg src1)
+                    src1
-                    (xmm_mem_to_reg_mem src2)
+                    src2
                     (encode_fcmp_imm imm)
                     (OperandSize.Size32)))
 
@@ -2192,7 +2192,7 @@
 (rule (gpr_to_xmm op src size)
       (let ((dst WritableXmm (temp_writable_xmm))
             (_ Unit (emit (MInst.GprToXmm op src dst size))))
-        (writable_xmm_to_xmm dst)))
+        dst))
 
 ;; Helper for creating `not` instructions.
 (decl not (Type Gpr) Gpr)
@@ -2200,7 +2200,7 @@
       (let ((dst WritableGpr (temp_writable_gpr))
             (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.Not size src dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for creating `neg` instructions.
 (decl neg (Type Gpr) Gpr)
@@ -2208,15 +2208,84 @@
       (let ((dst WritableGpr (temp_writable_gpr))
             (size OperandSize (operand_size_of_type_32_64 ty))
             (_ Unit (emit (MInst.Neg size src dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 (decl lea (SyntheticAmode) Gpr)
 (rule (lea addr)
       (let ((dst WritableGpr (temp_writable_gpr))
             (_ Unit (emit (MInst.LoadEffectiveAddress addr dst))))
-        (writable_gpr_to_gpr dst)))
+        dst))
 
 ;; Helper for creating `ud2` instructions.
 (decl ud2 (TrapCode) SideEffectNoResult)
 (rule (ud2 code)
       (SideEffectNoResult.Inst (MInst.Ud2 code)))
+
+;;;; Automatic conversions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(convert Gpr ValueRegs value_gpr)
+(convert Value Gpr put_in_gpr)
+(convert Value GprMem put_in_gpr_mem)
+(convert Value GprMemImm put_in_gpr_mem_imm)
+(convert Value RegMem put_in_reg_mem)
+(convert Value RegMemImm put_in_reg_mem_imm)
+(convert Gpr GprMemImm gpr_to_gpr_mem_imm)
+(convert Gpr GprMem gpr_to_gpr_mem)
+(convert Gpr Reg gpr_to_reg)
+(convert GprMem RegMem gpr_mem_to_reg_mem)
+(convert Reg Gpr gpr_new)
+(convert WritableGpr Gpr writable_gpr_to_gpr)
+(convert RegMemImm GprMemImm gpr_mem_imm_new)
+(convert RegMem GprMem reg_mem_to_gpr_mem)
+(convert Reg GprMem reg_to_gpr_mem)
+(convert Reg GprMemImm reg_to_gpr_mem_imm)
+(convert WritableGpr WritableReg writable_gpr_to_reg)
+(convert WritableGpr Reg writable_gpr_to_r_reg)
+
+(convert Xmm ValueRegs value_xmm)
+(convert Value Xmm put_in_xmm)
+(convert Value XmmMem put_in_xmm_mem)
+(convert Value XmmMemImm put_in_xmm_mem_imm)
+(convert Xmm Reg xmm_to_reg)
+(convert Xmm RegMem xmm_to_reg_mem)
+(convert Reg Xmm xmm_new)
+(convert Reg XmmMem reg_to_xmm_mem)
+(convert RegMem XmmMem reg_mem_to_xmm_mem)
+(convert RegMemImm XmmMemImm mov_rmi_to_xmm)
+(convert Xmm XmmMem xmm_to_xmm_mem)
+(convert Xmm XmmMemImm xmm_to_xmm_mem_imm)
+(convert XmmMem RegMem xmm_mem_to_reg_mem)
+(convert WritableXmm Xmm writable_xmm_to_xmm)
+(convert WritableXmm WritableReg writable_xmm_to_reg)
+(convert WritableXmm Reg writable_xmm_to_r_reg)
+(convert WritableXmm XmmMem writable_xmm_to_xmm_mem)
+
+(convert Gpr Imm8Gpr gpr_to_imm8_gpr)
+
+(convert Amode SyntheticAmode amode_to_synthetic_amode)
+(convert SyntheticAmode GprMem synthetic_amode_to_gpr_mem)
+(convert SyntheticAmode XmmMem synthetic_amode_to_xmm_mem)
+
+(decl reg_to_xmm_mem (Reg) XmmMem)
+(rule (reg_to_xmm_mem r)
+      (xmm_to_xmm_mem (xmm_new r)))
+(decl xmm_to_reg_mem (Reg) XmmMem)
+(rule (xmm_to_reg_mem r)
+      (RegMem.Reg (xmm_to_reg r)))
+
+(decl writable_gpr_to_r_reg (WritableGpr) Reg)
+(rule (writable_gpr_to_r_reg w_gpr)
+      (writable_reg_to_reg (writable_gpr_to_reg w_gpr)))
+(decl writable_xmm_to_r_reg (WritableXmm) Reg)
+(rule (writable_xmm_to_r_reg w_xmm)
+      (writable_reg_to_reg (writable_xmm_to_reg w_xmm)))
+(decl writable_xmm_to_xmm_mem (WritableXmm) XmmMem)
+(rule (writable_xmm_to_xmm_mem w_xmm)
+      (xmm_to_xmm_mem (writable_xmm_to_xmm w_xmm)))
+
+(decl synthetic_amode_to_gpr_mem (SyntheticAmode) GprMem)
+(rule (synthetic_amode_to_gpr_mem amode)
+      (synthetic_amode_to_reg_mem amode))
+(decl synthetic_amode_to_xmm_mem (SyntheticAmode) XmmMem)
+(rule (synthetic_amode_to_xmm_mem amode)
+      (synthetic_amode_to_reg_mem amode))

cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle 9ea75a6f790b5c03
-src/prelude.isle 980b300b3ec3e338
+src/prelude.isle 8bf92e18323e7041
-src/isa/x64/inst.isle ac88a0ae153ed210
+src/isa/x64/inst.isle 1948445a25530d71
-src/isa/x64/lower.isle 1ebdd4469355e2cf
+src/isa/x64/lower.isle d1ee574941be387

cranelift/codegen/src/prelude.isle

@@ -431,4 +431,10 @@
 (decl reloc_distance_near () RelocDistance)
 (extern extractor reloc_distance_near reloc_distance_near)
 
+;;;; Automatic conversions ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
+(convert Inst Value def_inst)
+(convert Reg ValueRegs value_reg)
+(convert Value Reg put_in_reg)
+(convert Value ValueRegs put_in_regs)
+(convert WritableReg Reg writable_reg_to_reg)